Patchwork powerpc, perf: Change PMU flag representation from decimal to hex

login
register
mail settings
Submitter Anshuman Khandual
Date Nov. 19, 2012, 6:03 a.m.
Message ID <1353305023-7511-1-git-send-email-khandual@linux.vnet.ibm.com>
Download mbox | patch
Permalink /patch/199929/
State Superseded
Headers show

Comments

Anshuman Khandual - Nov. 19, 2012, 6:03 a.m.
Change the representation of the PMU flags from decimal to hex since they
are bitfields which are easier to read in hex.

Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
---
 arch/powerpc/include/asm/perf_event_server.h | 20 +++++++++++++++-----
 1 file changed, 15 insertions(+), 5 deletions(-)

Patch

diff --git a/arch/powerpc/include/asm/perf_event_server.h b/arch/powerpc/include/asm/perf_event_server.h
index 9710be3..c77bb4e 100644
--- a/arch/powerpc/include/asm/perf_event_server.h
+++ b/arch/powerpc/include/asm/perf_event_server.h
@@ -45,11 +45,21 @@  struct power_pmu {
 /*
  * Values for power_pmu.flags
  */
-#define PPMU_LIMITED_PMC5_6	1	/* PMC5/6 have limited function */
-#define PPMU_ALT_SIPR		2	/* uses alternate posn for SIPR/HV */
-#define PPMU_NO_SIPR		4	/* no SIPR/HV in MMCRA at all */
-#define PPMU_NO_CONT_SAMPLING	8	/* no continuous sampling */
-#define PPMU_SIAR_VALID		16	/* Processor has SIAR Valid bit */
+
+#define PPMU_LIMITED_PMC5_6 \
+	0x0000000000000001UL /* PMC5/6 have limited function */
+
+#define PPMU_ALT_SIPR \
+	0x0000000000000002UL /* uses alternate posn for SIPR/HV */
+
+#define PPMU_NO_SIPR \
+	0x0000000000000004UL /* no SIPR/HV in MMCRA at all */
+
+#define PPMU_NO_CONT_SAMPLING \
+	0x0000000000000008UL /* no continuous sampling */
+
+#define PPMU_SIAR_VALID \
+	0x0000000000000010UL /* Processor has SIAR Valid bit */
 
 /*
  * Values for flags to get_alternatives()