| Message ID | 138e6f406aef20f6257a8f90af45865bd9c88092.1353107865.git.marvin24@gmx.de |
|---|---|
| State | Rejected, archived |
| Headers | show |
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts index 6a93d14..8a14e1d 100644 --- a/arch/arm/boot/dts/tegra20-paz00.dts +++ b/arch/arm/boot/dts/tegra20-paz00.dts @@ -10,6 +10,15 @@ reg = <0x00000000 0x20000000>; }; + host1x { + dc@54200000 { + rgb { + status = "okay"; + nvidia,ddc-i2c-bus = <&lvds_ddc>; + }; + }; + }; + pinmux { pinctrl-names = "default"; pinctrl-0 = <&state_default>; @@ -240,7 +249,7 @@ clock-frequency = <216000000>; }; - i2c@7000c000 { + lvds_ddc: i2c@7000c000 { status = "okay"; clock-frequency = <400000>;
This adds host1x support which includes LVDS support. HDMI is disabled for now as the tegra drm cannot handle two different display timings at the same time. Signed-off-by: Marc Dietrich <marvin24@gmx.de> --- V4: rebase against for-3.8/DT V3: move host1x up, revert hdmi ddc clock change arch/arm/boot/dts/tegra20-paz00.dts | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-)