From patchwork Fri Nov 16 22:59:04 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Dietrich X-Patchwork-Id: 199803 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id B5A812C0080 for ; Sat, 17 Nov 2012 09:59:45 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753782Ab2KPW7o (ORCPT ); Fri, 16 Nov 2012 17:59:44 -0500 Received: from mailout-de.gmx.net ([213.165.64.22]:41536 "HELO mailout-de.gmx.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with SMTP id S1753796Ab2KPW7o (ORCPT ); Fri, 16 Nov 2012 17:59:44 -0500 Received: (qmail invoked by alias); 16 Nov 2012 22:59:42 -0000 Received: from pD9E5C9D8.dip0.t-ipconnect.de (EHLO ax5200p.fritz.box) [217.229.201.216] by mail.gmx.net (mp040) with SMTP; 16 Nov 2012 23:59:42 +0100 X-Authenticated: #9962044 X-Provags-ID: V01U2FsdGVkX1/E5IE9VbvEhJ7ivHhQHBDleBSiH/ZzrG//h6JIgU d3BGTFerANh/ei From: Marc Dietrich To: linux-tegra@vger.kernel.org Cc: Stephen Warren Subject: [PATCH v3 2/2] ARM: tegra: paz00: enable backlight Date: Fri, 16 Nov 2012 23:59:04 +0100 Message-Id: X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <0a45efce28b667f334b682a6b8b056e4c7a5d486.1353106697.git.marvin24@gmx.de> References: <0a45efce28b667f334b682a6b8b056e4c7a5d486.1353106697.git.marvin24@gmx.de> In-Reply-To: <0a45efce28b667f334b682a6b8b056e4c7a5d486.1353106697.git.marvin24@gmx.de> References: <0a45efce28b667f334b682a6b8b056e4c7a5d486.1353106697.git.marvin24@gmx.de> X-Y-GMX-Trusted: 0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org This enables backlight using power sequences. Signed-off-by: Marc Dietrich --- arch/arm/boot/dts/tegra20-paz00.dts | 72 +++++++++++++++++++++++++++++++++++ 1 file changed, 72 insertions(+) diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts index 6cc6215..57c740a 100644 --- a/arch/arm/boot/dts/tegra20-paz00.dts +++ b/arch/arm/boot/dts/tegra20-paz00.dts @@ -19,6 +19,10 @@ rgb { status = "okay"; nvidia,ddc-i2c-bus = <&lvds_ddc>; + + display { + nvidia,backlight = <&backlight>; + }; }; }; }; @@ -493,6 +497,74 @@ }; }; + backlight: backlight { + compatible = "pwm-backlight"; + brightness-levels = <0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 255>; + default-brightness-level = <12>; + + /* resources used by the power sequences */ + pwms = <&pwm 0 5000000>; + pwm-names = "backlight"; + + power-sequences { + power-on { + step0 { + type = "pwm"; + id = "backlight"; + enable; + }; + step1 { + type = "gpio"; + gpio = <&gpio 4 0>; /* gpio PA4, en_vdd_pnl */ + value = <1>; + }; + step2 { + type = "gpio"; + gpio = <&gpio 176 0>; /* gpio PW0, bl_vdd */ + value = <1>; + }; + step3 { + type = "gpio"; + gpio = <&gpio 102 0>; /* gpio PM6, lvds_shdn */ + value = <1>; + }; + step4 { + type = "gpio"; + gpio = <&gpio 164 0>; /* gpio PU4, bl_enb */ + value = <1>; + }; + }; + + power-off { + step4 { + type = "gpio"; + gpio = <&gpio 164 0>; /* gpio PU4, bl_enb */ + value = <0>; + }; + step0 { + type = "gpio"; + gpio = <&gpio 102 0>; /* gpio PM6, lvds_shdn */ + value = <0>; + }; + step1 { + type = "gpio"; + gpio = <&gpio 176 0>; /* gpio PW0, bl_vdd */ + value = <0>; + }; + step2 { + type = "gpio"; + gpio = <&gpio 4 0>; /* gpio PA4, en_vdd_pnl */ + value = <0>; + }; + step3 { + type = "pwm"; + id = "backlight"; + disable; + }; + }; + }; + }; + regulators { compatible = "simple-bus"; #address-cells = <1>;