From patchwork Fri Nov 16 21:19:59 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 199762 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 68F4A2C0085 for ; Sat, 17 Nov 2012 08:33:50 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3B7434A0AB; Fri, 16 Nov 2012 22:33:15 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id HDXr9Iu9E6vx; Fri, 16 Nov 2012 22:33:14 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 51F5E4A209; Fri, 16 Nov 2012 22:30:33 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 02CCC4A18C for ; Fri, 16 Nov 2012 22:29:19 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id BHElsUfw-+-G for ; Fri, 16 Nov 2012 22:29:16 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-vc0-f202.google.com (mail-vc0-f202.google.com [209.85.220.202]) by theia.denx.de (Postfix) with ESMTPS id 093D34A1A7 for ; Fri, 16 Nov 2012 22:28:51 +0100 (CET) Received: by mail-vc0-f202.google.com with SMTP id fy27so349306vcb.3 for ; Fri, 16 Nov 2012 13:28:49 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=eyqUaG3HSJZD58Y+YssoANNDj5CGDb9+jIcy6BJ9huY=; b=BQ9dArGvKg/222zeNRSoZOKEBGVmEWOX41XOmqclsRqr2+GEN3sS4RIH93w3EGqmkQ Fdiwpzmq1TgKyh1yyDxux1wnc0mTHj3SvU04PmZ7HiOzXZ/vX3Y2NMebFLoLV7ohXoLK ofqkhvWmRWfDOPFOyjhlOnof30uw59yHm/FSiGmExvWWv0znSbcSgPjyyTLiqomVjWZo CT5VJzSHHxXNkOBTM8WIgEBYtSUyUhoqd8LQ0MOoNOTaJYYRn+n7VMA82sYa/7flCvUh l9YUJJsa7nMQdXpT9nrdFtdl67ggfbC2RLDp5F2nJ+61bIrMwWH971dC5o1KRrZAP2ZM gUMA== Received: by 10.236.48.99 with SMTP id u63mr3776203yhb.46.1353101329014; Fri, 16 Nov 2012 13:28:49 -0800 (PST) Received: from wpzn3.hot.corp.google.com (216-239-44-65.google.com [216.239.44.65]) by gmr-mx.google.com with ESMTPS id r10si113803ann.1.2012.11.16.13.28.48 (version=TLSv1/SSLv3 cipher=AES128-SHA); Fri, 16 Nov 2012 13:28:49 -0800 (PST) Received: from kaka.mtv.corp.google.com (kaka.mtv.corp.google.com [172.22.73.79]) by wpzn3.hot.corp.google.com (Postfix) with ESMTP id B7D96100047; Fri, 16 Nov 2012 13:28:48 -0800 (PST) Received: by kaka.mtv.corp.google.com (Postfix, from userid 121222) id 972DD16086A; Fri, 16 Nov 2012 13:28:48 -0800 (PST) From: Simon Glass To: U-Boot Mailing List Date: Fri, 16 Nov 2012 13:19:59 -0800 Message-Id: <1353100842-20126-15-git-send-email-sjg@chromium.org> X-Mailer: git-send-email 1.7.7.3 In-Reply-To: <1353100842-20126-1-git-send-email-sjg@chromium.org> References: <1353100842-20126-1-git-send-email-sjg@chromium.org> X-Gm-Message-State: ALoCoQn2fMdtBMfDJFheKGdMgUseEExrk7/2MK9DZeYJOL2CreIqrUkzrBn8AhV06mIyQUQoigwenZGLRP347YEMTyZu9BKo10QsMdqfbqWhkOBB9AUwyQC0WzGcX7aFWNwcpsixi/2lEbtPslTtx6kXR47Usxmqm3eOb4LcDta3HRGk9y315GNa6wH7+vtz87Mryt0O5rwb Cc: Kim Phillips , Kumar Gala , Andy Fleming , Tom Rini , Stefan Roese Subject: [U-Boot] [PATCH 14/57] ppc: Move brg_clk to arch_global_data X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass --- arch/powerpc/cpu/mpc8260/commproc.c | 2 +- arch/powerpc/cpu/mpc8260/i2c.c | 2 +- arch/powerpc/cpu/mpc8260/speed.c | 4 ++-- arch/powerpc/cpu/mpc83xx/speed.c | 5 +++-- arch/powerpc/cpu/mpc85xx/commproc.c | 2 +- arch/powerpc/cpu/mpc85xx/speed.c | 4 ++-- arch/powerpc/cpu/mpc8xx/fdt.c | 2 +- arch/powerpc/cpu/mpc8xx/speed.c | 2 +- arch/powerpc/include/asm/global_data.h | 14 +++++++++----- arch/powerpc/lib/board.c | 2 +- common/cmd_immap.c | 2 +- drivers/qe/fdt.c | 4 ++-- drivers/qe/qe.c | 2 +- 13 files changed, 26 insertions(+), 21 deletions(-) diff --git a/arch/powerpc/cpu/mpc8260/commproc.c b/arch/powerpc/cpu/mpc8260/commproc.c index 082957e..e5bfed1 100644 --- a/arch/powerpc/cpu/mpc8260/commproc.c +++ b/arch/powerpc/cpu/mpc8260/commproc.c @@ -101,7 +101,7 @@ m8260_cpm_hostalloc(uint size, uint align) * Baud rate clocks are zero-based in the driver code (as that maps * to port numbers). Documentation uses 1-based numbering. */ -#define BRG_INT_CLK gd->brg_clk +#define BRG_INT_CLK gd->arch.brg_clk #define BRG_UART_CLK (BRG_INT_CLK / 16) /* This function is used by UARTs, or anything else that uses a 16x diff --git a/arch/powerpc/cpu/mpc8260/i2c.c b/arch/powerpc/cpu/mpc8260/i2c.c index 7382cba..b720b1f 100644 --- a/arch/powerpc/cpu/mpc8260/i2c.c +++ b/arch/powerpc/cpu/mpc8260/i2c.c @@ -259,7 +259,7 @@ void i2c_init(int speed, int slaveadd) * divide BRGCLK by 1) */ debug("[I2C] Setting rate...\n"); - i2c_setrate(gd->brg_clk, CONFIG_SYS_I2C_SPEED); + i2c_setrate(gd->arch.brg_clk, CONFIG_SYS_I2C_SPEED); /* Set I2C controller in master mode */ i2c->i2c_i2com = 0x01; diff --git a/arch/powerpc/cpu/mpc8260/speed.c b/arch/powerpc/cpu/mpc8260/speed.c index bb50dee..4ad1ec2 100644 --- a/arch/powerpc/cpu/mpc8260/speed.c +++ b/arch/powerpc/cpu/mpc8260/speed.c @@ -145,7 +145,7 @@ int get_clocks (void) gd->cpm_clk = gd->vco_out / 2; gd->bus_clk = clkin; gd->scc_clk = gd->vco_out / 4; - gd->brg_clk = gd->vco_out / (1 << (2 * (dfbrg + 1))); + gd->arch.brg_clk = gd->vco_out / (1 << (2 * (dfbrg + 1))); if (cp->b2c_mult > 0) { gd->cpu_clk = (clkin * cp->b2c_mult) / 2; @@ -231,7 +231,7 @@ int prt_8260_clks (void) plldf, pllmf, pcidf); printf (" - vco_out %10ld, scc_clk %10ld, brg_clk %10ld\n", - gd->vco_out, gd->scc_clk, gd->brg_clk); + gd->vco_out, gd->scc_clk, gd->arch.brg_clk); printf (" - cpu_clk %10ld, cpm_clk %10ld, bus_clk %10ld\n", gd->cpu_clk, gd->cpm_clk, gd->bus_clk); diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c index b8c05d1..21e8b0a 100644 --- a/arch/powerpc/cpu/mpc83xx/speed.c +++ b/arch/powerpc/cpu/mpc83xx/speed.c @@ -496,7 +496,7 @@ int get_clocks(void) #endif #if defined(CONFIG_QE) gd->qe_clk = qe_clk; - gd->brg_clk = brg_clk; + gd->arch.brg_clk = brg_clk; #endif #if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ defined(CONFIG_MPC837x) @@ -540,7 +540,8 @@ static int do_clocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) printf(" Coherent System Bus: %-4s MHz\n", strmhz(buf, gd->csb_clk)); #if defined(CONFIG_QE) printf(" QE: %-4s MHz\n", strmhz(buf, gd->qe_clk)); - printf(" BRG: %-4s MHz\n", strmhz(buf, gd->brg_clk)); + printf(" BRG: %-4s MHz\n", + strmhz(buf, gd->arch.brg_clk)); #endif printf(" Local Bus Controller:%-4s MHz\n", strmhz(buf, gd->lbiu_clk)); printf(" Local Bus: %-4s MHz\n", strmhz(buf, gd->lclk_clk)); diff --git a/arch/powerpc/cpu/mpc85xx/commproc.c b/arch/powerpc/cpu/mpc85xx/commproc.c index 292b723..7f10476 100644 --- a/arch/powerpc/cpu/mpc85xx/commproc.c +++ b/arch/powerpc/cpu/mpc85xx/commproc.c @@ -110,7 +110,7 @@ m8560_cpm_hostalloc(uint size, uint align) * Baud rate clocks are zero-based in the driver code (as that maps * to port numbers). Documentation uses 1-based numbering. */ -#define BRG_INT_CLK gd->brg_clk +#define BRG_INT_CLK gd->arch.brg_clk #define BRG_UART_CLK ((BRG_INT_CLK + 15) / 16) /* This function is used by UARTS, or anything else that uses a 16x diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index 801ee07..8a581ef 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -395,7 +395,7 @@ int get_clocks (void) #ifdef CONFIG_QE gd->qe_clk = sys_info.freqQE; - gd->brg_clk = gd->qe_clk / 2; + gd->arch.brg_clk = gd->qe_clk / 2; #endif /* * The base clock for I2C depends on the actual SOC. Unfortunately, @@ -438,7 +438,7 @@ int get_clocks (void) gd->vco_out = 2*sys_info.freqSystemBus; gd->cpm_clk = gd->vco_out / 2; gd->scc_clk = gd->vco_out / 4; - gd->brg_clk = gd->vco_out / (1 << (2 * (dfbrg + 1))); + gd->arch.brg_clk = gd->vco_out / (1 << (2 * (dfbrg + 1))); #endif if(gd->cpu_clk != 0) return (0); diff --git a/arch/powerpc/cpu/mpc8xx/fdt.c b/arch/powerpc/cpu/mpc8xx/fdt.c index 7130983..7edd7e4 100644 --- a/arch/powerpc/cpu/mpc8xx/fdt.c +++ b/arch/powerpc/cpu/mpc8xx/fdt.c @@ -37,7 +37,7 @@ void ft_cpu_setup(void *blob, bd_t *bd) do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, "clock-frequency", bd->bi_intfreq, 1); do_fixup_by_compat_u32(blob, "fsl,cpm-brg", "clock-frequency", - gd->brg_clk, 1); + gd->arch.brg_clk, 1); /* Fixup ethernet MAC addresses */ fdt_fixup_ethernet(blob); diff --git a/arch/powerpc/cpu/mpc8xx/speed.c b/arch/powerpc/cpu/mpc8xx/speed.c index 6e13e5d..091b49f 100644 --- a/arch/powerpc/cpu/mpc8xx/speed.c +++ b/arch/powerpc/cpu/mpc8xx/speed.c @@ -192,7 +192,7 @@ void get_brgclk(uint sccr) divider = 64; break; } - gd->brg_clk = gd->cpu_clk/divider; + gd->arch.brg_clk = gd->cpu_clk/divider; } #if !defined(CONFIG_8xx_CPUCLK_DEFAULT) diff --git a/arch/powerpc/include/asm/global_data.h b/arch/powerpc/include/asm/global_data.h index df621da..ac348c6 100644 --- a/arch/powerpc/include/asm/global_data.h +++ b/arch/powerpc/include/asm/global_data.h @@ -29,6 +29,15 @@ /* Architecture-specific global data */ struct arch_global_data { +#if defined(CONFIG_8xx) + unsigned long brg_clk; +#endif +#if defined(CONFIG_CPM2) + unsigned long brg_clk; +#endif +#if defined(CONFIG_QE) + u32 brg_clk; +#endif }; /* @@ -45,15 +54,11 @@ typedef struct global_data { unsigned int baudrate; unsigned long cpu_clk; /* CPU clock in Hz! */ unsigned long bus_clk; -#if defined(CONFIG_8xx) - unsigned long brg_clk; -#endif #if defined(CONFIG_CPM2) /* There are many clocks on the MPC8260 - see page 9-5 */ unsigned long vco_out; unsigned long cpm_clk; unsigned long scc_clk; - unsigned long brg_clk; #ifdef CONFIG_PCI unsigned long pci_clk; #endif @@ -106,7 +111,6 @@ typedef struct global_data { #endif #if defined(CONFIG_QE) u32 qe_clk; - u32 brg_clk; uint mp_alloc_base; uint mp_alloc_top; #endif /* CONFIG_QE */ diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c index 1b051e1..4174a73 100644 --- a/arch/powerpc/lib/board.c +++ b/arch/powerpc/lib/board.c @@ -581,7 +581,7 @@ void board_init_f(ulong bootflag) bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ #if defined(CONFIG_CPM2) bd->bi_cpmfreq = gd->cpm_clk; - bd->bi_brgfreq = gd->brg_clk; + bd->bi_brgfreq = gd->arch.brg_clk; bd->bi_sccfreq = gd->scc_clk; bd->bi_vco = gd->vco_out; #endif /* CONFIG_CPM2 */ diff --git a/common/cmd_immap.c b/common/cmd_immap.c index 1f59c1e..fdf9489 100644 --- a/common/cmd_immap.c +++ b/common/cmd_immap.c @@ -453,7 +453,7 @@ static void prbrg (int n, uint val) #if defined(CONFIG_8xx) ulong clock = gd->cpu_clk; #elif defined(CONFIG_8260) - ulong clock = gd->brg_clk; + ulong clock = gd->arch.brg_clk; #endif printf ("BRG%d:", n); diff --git a/drivers/qe/fdt.c b/drivers/qe/fdt.c index 73e9060..1a123b8 100644 --- a/drivers/qe/fdt.c +++ b/drivers/qe/fdt.c @@ -77,13 +77,13 @@ void ft_qe_setup(void *blob) do_fixup_by_prop_u32(blob, "device_type", "qe", 4, "bus-frequency", gd->qe_clk, 1); do_fixup_by_prop_u32(blob, "device_type", "qe", 4, - "brg-frequency", gd->brg_clk, 1); + "brg-frequency", gd->arch.brg_clk, 1); do_fixup_by_compat_u32(blob, "fsl,qe", "clock-frequency", gd->qe_clk, 1); do_fixup_by_compat_u32(blob, "fsl,qe", "bus-frequency", gd->qe_clk, 1); do_fixup_by_compat_u32(blob, "fsl,qe", - "brg-frequency", gd->brg_clk, 1); + "brg-frequency", gd->arch.brg_clk, 1); do_fixup_by_compat_u32(blob, "fsl,qe-gtm", "clock-frequency", gd->qe_clk / 2, 1); fdt_fixup_qe_firmware(blob); diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c index 345587b..72c585c 100644 --- a/drivers/qe/qe.c +++ b/drivers/qe/qe.c @@ -220,7 +220,7 @@ void qe_assign_page(uint snum, uint para_ram_base) from CLKn pin, we have te change the function. */ -#define BRG_CLK (gd->brg_clk) +#define BRG_CLK (gd->arch.brg_clk) int qe_set_brg(uint brg, uint rate) {