From patchwork Fri Nov 16 21:19:47 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 199735 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id C29C02C0091 for ; Sat, 17 Nov 2012 08:29:31 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5B0D84A18C; Fri, 16 Nov 2012 22:29:30 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id fDOMirqHhyCY; Fri, 16 Nov 2012 22:29:29 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C36F74A1B9; Fri, 16 Nov 2012 22:28:53 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A5FDA4A18A for ; Fri, 16 Nov 2012 22:28:51 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id G9Yt+JkNitAc for ; Fri, 16 Nov 2012 22:28:50 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-lb0-f202.google.com (mail-lb0-f202.google.com [209.85.217.202]) by theia.denx.de (Postfix) with ESMTPS id 3CC354A178 for ; Fri, 16 Nov 2012 22:28:49 +0100 (CET) Received: by mail-lb0-f202.google.com with SMTP id i15so237435lbo.3 for ; Fri, 16 Nov 2012 13:28:48 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=NWpxVYv7NzvyCwTiTOU1N2JnIIYVM8k+k+6TSx+smyw=; b=JfCKLyA7R0+0oFVp1dZfL9ZCWWcJL3MDvi0y6Mbq4Z9+2pX3c9ii9u4/PqRr1Oqt8v gjVpuZvQiOCGfPj8MZs3ZkXkqJSv8xUZXIplDOCakF/3Y+CkxewO74q4nZjXkDYV/a0j bkwbIC7REFOJBuBmNzgjjD2EHw2YMYUbE31bNw+PYozeG9jdBq/iKwOtURBjr1dYzREx IVGhjE3hucEkAN+nFl1MvOBKumur7s0uNSrlEsG3WHx7a/MA/rKc32JG4V2rbKmMMLA4 lQTYBywZWaDNoGZ1auYD2icmhRtSNohhM4b+4ZBq9SsRO0v4yKFaaDuSpJCAvGfNFt3t MCzQ== Received: by 10.14.209.66 with SMTP id r42mr466989eeo.1.1353101328537; Fri, 16 Nov 2012 13:28:48 -0800 (PST) Received: from hpza10.eem.corp.google.com ([74.125.121.33]) by gmr-mx.google.com with ESMTPS id z47si634019eel.0.2012.11.16.13.28.48 (version=TLSv1/SSLv3 cipher=AES128-SHA); Fri, 16 Nov 2012 13:28:48 -0800 (PST) Received: from kaka.mtv.corp.google.com (kaka.mtv.corp.google.com [172.22.73.79]) by hpza10.eem.corp.google.com (Postfix) with ESMTP id 03F1A200057; Fri, 16 Nov 2012 13:28:48 -0800 (PST) Received: by kaka.mtv.corp.google.com (Postfix, from userid 121222) id 50CBE160097; Fri, 16 Nov 2012 13:28:47 -0800 (PST) From: Simon Glass To: U-Boot Mailing List Date: Fri, 16 Nov 2012 13:19:47 -0800 Message-Id: <1353100842-20126-3-git-send-email-sjg@chromium.org> X-Mailer: git-send-email 1.7.7.3 In-Reply-To: <1353100842-20126-1-git-send-email-sjg@chromium.org> References: <1353100842-20126-1-git-send-email-sjg@chromium.org> X-Gm-Message-State: ALoCoQkjS5K9zhQd19OvUuuHCHd6b+cMKukkhgTEkxXMJTtLKDTNVHSvZ73/HRGv/FeouxB9gtQIJIwx5xMBQXqrUvP9FheK2ZI6xrPUCb2C3k18cVcrsjcBmUaguWd3xvXo8Qbx+GWfjjP5JD1U9Hlt6JcjldzHvZX7EcX367DGZqUgI/GAqU5EeyhvAEysTeZcBm5nOn8W Cc: Tom Rini Subject: [U-Boot] [PATCH 02/57] at91: Move at91 global data into arch_global_data X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Move these fields into arch_global_data. Signed-off-by: Simon Glass --- arch/arm/cpu/arm920t/at91/clock.c | 24 +++++++++++++----------- arch/arm/cpu/arm926ejs/at91/clock.c | 30 ++++++++++++++++-------------- arch/arm/cpu/arm926ejs/at91/timer.c | 2 +- arch/arm/include/asm/arch-at91/clk.h | 12 ++++++------ arch/arm/include/asm/global_data.h | 18 +++++++++--------- 5 files changed, 45 insertions(+), 41 deletions(-) diff --git a/arch/arm/cpu/arm920t/at91/clock.c b/arch/arm/cpu/arm920t/at91/clock.c index 09d2799..696200d 100644 --- a/arch/arm/cpu/arm920t/at91/clock.c +++ b/arch/arm/cpu/arm920t/at91/clock.c @@ -29,11 +29,11 @@ static unsigned long at91_css_to_rate(unsigned long css) case AT91_PMC_MCKR_CSS_SLOW: return CONFIG_SYS_AT91_SLOW_CLOCK; case AT91_PMC_MCKR_CSS_MAIN: - return gd->main_clk_rate_hz; + return gd->arch.main_clk_rate_hz; case AT91_PMC_MCKR_CSS_PLLA: - return gd->plla_rate_hz; + return gd->arch.plla_rate_hz; case AT91_PMC_MCKR_CSS_PLLB: - return gd->pllb_rate_hz; + return gd->arch.pllb_rate_hz; } return 0; @@ -124,10 +124,10 @@ int at91_clock_init(unsigned long main_clock) main_clock = tmp * (CONFIG_SYS_AT91_SLOW_CLOCK / 16); } #endif - gd->main_clk_rate_hz = main_clock; + gd->arch.main_clk_rate_hz = main_clock; /* report if PLLA is more than mildly overclocked */ - gd->plla_rate_hz = at91_pll_rate(main_clock, readl(&pmc->pllar)); + gd->arch.plla_rate_hz = at91_pll_rate(main_clock, readl(&pmc->pllar)); #ifdef CONFIG_USB_ATMEL /* @@ -136,9 +136,10 @@ int at91_clock_init(unsigned long main_clock) * * REVISIT: assumes MCK doesn't derive from PLLB! */ - gd->at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) | + gd->arch.at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) | AT91_PMC_PLLBR_USBDIV_2; - gd->pllb_rate_hz = at91_pll_rate(main_clock, gd->at91_pllb_usb_init); + gd->arch.pllb_rate_hz = at91_pll_rate(main_clock, + gd->arch.at91_pllb_usb_init); #endif /* @@ -146,13 +147,14 @@ int at91_clock_init(unsigned long main_clock) * For now, assume this parentage won't change. */ mckr = readl(&pmc->mckr); - gd->mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_MCKR_CSS_MASK); - freq = gd->mck_rate_hz; + gd->arch.mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_MCKR_CSS_MASK); + freq = gd->arch.mck_rate_hz; freq /= (1 << ((mckr & AT91_PMC_MCKR_PRES_MASK) >> 2)); /* prescale */ /* mdiv */ - gd->mck_rate_hz = freq / (1 + ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 8)); - gd->cpu_clk_rate_hz = freq; + gd->arch.mck_rate_hz = freq / + (1 + ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 8)); + gd->arch.cpu_clk_rate_hz = freq; return 0; } diff --git a/arch/arm/cpu/arm926ejs/at91/clock.c b/arch/arm/cpu/arm926ejs/at91/clock.c index dc5c6c4..f825388 100644 --- a/arch/arm/cpu/arm926ejs/at91/clock.c +++ b/arch/arm/cpu/arm926ejs/at91/clock.c @@ -29,11 +29,11 @@ static unsigned long at91_css_to_rate(unsigned long css) case AT91_PMC_MCKR_CSS_SLOW: return CONFIG_SYS_AT91_SLOW_CLOCK; case AT91_PMC_MCKR_CSS_MAIN: - return gd->main_clk_rate_hz; + return gd->arch.main_clk_rate_hz; case AT91_PMC_MCKR_CSS_PLLA: - return gd->plla_rate_hz; + return gd->arch.plla_rate_hz; case AT91_PMC_MCKR_CSS_PLLB: - return gd->pllb_rate_hz; + return gd->arch.pllb_rate_hz; } return 0; @@ -132,10 +132,10 @@ int at91_clock_init(unsigned long main_clock) main_clock = tmp * (CONFIG_SYS_AT91_SLOW_CLOCK / 16); } #endif - gd->main_clk_rate_hz = main_clock; + gd->arch.main_clk_rate_hz = main_clock; /* report if PLLA is more than mildly overclocked */ - gd->plla_rate_hz = at91_pll_rate(main_clock, readl(&pmc->pllar)); + gd->arch.plla_rate_hz = at91_pll_rate(main_clock, readl(&pmc->pllar)); #ifdef CONFIG_USB_ATMEL /* @@ -144,9 +144,10 @@ int at91_clock_init(unsigned long main_clock) * * REVISIT: assumes MCK doesn't derive from PLLB! */ - gd->at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) | + gd->arch.at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) | AT91_PMC_PLLBR_USBDIV_2; - gd->pllb_rate_hz = at91_pll_rate(main_clock, gd->at91_pllb_usb_init); + gd->arch.pllb_rate_hz = at91_pll_rate(main_clock, + gd->arch.at91_pllb_usb_init); #endif /* @@ -157,15 +158,15 @@ int at91_clock_init(unsigned long main_clock) #if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) \ || defined(CONFIG_AT91SAM9X5) /* plla divisor by 2 */ - gd->plla_rate_hz /= (1 << ((mckr & 1 << 12) >> 12)); + gd->arch.plla_rate_hz /= (1 << ((mckr & 1 << 12) >> 12)); #endif - gd->mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_MCKR_CSS_MASK); - freq = gd->mck_rate_hz; + gd->arch.mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_MCKR_CSS_MASK); + freq = gd->arch.mck_rate_hz; freq /= (1 << ((mckr & AT91_PMC_MCKR_PRES_MASK) >> 2)); /* prescale */ #if defined(CONFIG_AT91SAM9G20) /* mdiv ; (x >> 7) = ((x >> 8) * 2) */ - gd->mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) ? + gd->arch.mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) ? freq / ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 7) : freq; if (mckr & AT91_PMC_MCKR_MDIV_MASK) freq /= 2; /* processor clock division */ @@ -177,14 +178,15 @@ int at91_clock_init(unsigned long main_clock) * 2 <==> 4 * 3 <==> 3 */ - gd->mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) == + gd->arch.mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) == (AT91_PMC_MCKR_MDIV_2 | AT91_PMC_MCKR_MDIV_4) ? freq / 3 : freq / (1 << ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 8)); #else - gd->mck_rate_hz = freq / (1 << ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 8)); + gd->arch.mck_rate_hz = freq / + (1 << ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 8)); #endif - gd->cpu_clk_rate_hz = freq; + gd->arch.cpu_clk_rate_hz = freq; return 0; } diff --git a/arch/arm/cpu/arm926ejs/at91/timer.c b/arch/arm/cpu/arm926ejs/at91/timer.c index f70ce83..641ae3e 100644 --- a/arch/arm/cpu/arm926ejs/at91/timer.c +++ b/arch/arm/cpu/arm926ejs/at91/timer.c @@ -79,7 +79,7 @@ int timer_init(void) /* Enable PITC */ writel(TIMER_LOAD_VAL | AT91_PIT_MR_EN , &pit->mr); - gd->timer_rate_hz = gd->mck_rate_hz / 16; + gd->timer_rate_hz = gd->arch.mck_rate_hz / 16; gd->tbu = gd->tbl = 0; return 0; diff --git a/arch/arm/include/asm/arch-at91/clk.h b/arch/arm/include/asm/arch-at91/clk.h index 1e8522b..d4852a3 100644 --- a/arch/arm/include/asm/arch-at91/clk.h +++ b/arch/arm/include/asm/arch-at91/clk.h @@ -31,37 +31,37 @@ static inline unsigned long get_cpu_clk_rate(void) { DECLARE_GLOBAL_DATA_PTR; - return gd->cpu_clk_rate_hz; + return gd->arch.cpu_clk_rate_hz; } static inline unsigned long get_main_clk_rate(void) { DECLARE_GLOBAL_DATA_PTR; - return gd->main_clk_rate_hz; + return gd->arch.main_clk_rate_hz; } static inline unsigned long get_mck_clk_rate(void) { DECLARE_GLOBAL_DATA_PTR; - return gd->mck_rate_hz; + return gd->arch.mck_rate_hz; } static inline unsigned long get_plla_clk_rate(void) { DECLARE_GLOBAL_DATA_PTR; - return gd->plla_rate_hz; + return gd->arch.plla_rate_hz; } static inline unsigned long get_pllb_clk_rate(void) { DECLARE_GLOBAL_DATA_PTR; - return gd->pllb_rate_hz; + return gd->arch.pllb_rate_hz; } static inline u32 get_pllb_init(void) { DECLARE_GLOBAL_DATA_PTR; - return gd->at91_pllb_usb_init; + return gd->arch.at91_pllb_usb_init; } static inline unsigned long get_macb_pclk_rate(unsigned int dev_id) diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index 8ca45ca..ba7814a 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -26,6 +26,15 @@ /* Architecture-specific global data */ struct arch_global_data { +#ifdef CONFIG_AT91FAMILY + /* "static data" needed by at91's clock.c */ + unsigned long cpu_clk_rate_hz; + unsigned long main_clk_rate_hz; + unsigned long mck_rate_hz; + unsigned long plla_rate_hz; + unsigned long pllb_rate_hz; + unsigned long at91_pllb_usb_init; +#endif }; /* @@ -50,15 +59,6 @@ typedef struct global_data { #ifdef CONFIG_FSL_ESDHC unsigned long sdhc_clk; #endif -#ifdef CONFIG_AT91FAMILY - /* "static data" needed by at91's clock.c */ - unsigned long cpu_clk_rate_hz; - unsigned long main_clk_rate_hz; - unsigned long mck_rate_hz; - unsigned long plla_rate_hz; - unsigned long pllb_rate_hz; - unsigned long at91_pllb_usb_init; -#endif #ifdef CONFIG_ARM /* "static data" needed by most of timer.c on ARM platforms */ unsigned long timer_rate_hz;