Patchwork powerpc, perf: Change PMU flag values representation from decimal to hex

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Submitter Anshuman Khandual
Date Nov. 16, 2012, 8:59 a.m.
Message ID <1353056344-1392-1-git-send-email-khandual@linux.vnet.ibm.com>
Download mbox | patch
Permalink /patch/199525/
State Rejected
Headers show

Comments

Anshuman Khandual - Nov. 16, 2012, 8:59 a.m.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
---
 arch/powerpc/include/asm/perf_event_server.h | 21 ++++++++++++++++-----
 1 file changed, 16 insertions(+), 5 deletions(-)
Paul Mackerras - Nov. 16, 2012, 11:42 a.m.
On Fri, Nov 16, 2012 at 02:29:04PM +0530, Anshuman Khandual wrote:
> Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>

That's not a sufficient description of why you are making this
change.  In particular, what is the motivation for and impact of using
LONG_ASM_CONST?

Paul.
Anshuman Khandual - Nov. 19, 2012, 6:15 a.m.
On 11/16/2012 05:12 PM, Paul Mackerras wrote:
> On Fri, Nov 16, 2012 at 02:29:04PM +0530, Anshuman Khandual wrote:
>> Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
> 
> That's not a sufficient description of why you are making this
> change.  In particular, what is the motivation for and impact of using
> LONG_ASM_CONST?
> 
> Paul.

Hey Paul,

I have just sent out a revised patch where I have updated the description
and dropped the usage of LONG_ASM_CONST.

Regards
Anshuman

Patch

diff --git a/arch/powerpc/include/asm/perf_event_server.h b/arch/powerpc/include/asm/perf_event_server.h
index 9710be3..e3f10bb 100644
--- a/arch/powerpc/include/asm/perf_event_server.h
+++ b/arch/powerpc/include/asm/perf_event_server.h
@@ -11,6 +11,7 @@ 
 
 #include <linux/types.h>
 #include <asm/hw_irq.h>
+#include <asm/asm-compat.h>
 
 #define MAX_HWEVENTS		8
 #define MAX_EVENT_ALTERNATIVES	8
@@ -45,11 +46,21 @@  struct power_pmu {
 /*
  * Values for power_pmu.flags
  */
-#define PPMU_LIMITED_PMC5_6	1	/* PMC5/6 have limited function */
-#define PPMU_ALT_SIPR		2	/* uses alternate posn for SIPR/HV */
-#define PPMU_NO_SIPR		4	/* no SIPR/HV in MMCRA at all */
-#define PPMU_NO_CONT_SAMPLING	8	/* no continuous sampling */
-#define PPMU_SIAR_VALID		16	/* Processor has SIAR Valid bit */
+
+#define PPMU_LIMITED_PMC5_6	\
+	LONG_ASM_CONST(0x0000000000000001) /* PMC5/6 have limited function */
+
+#define PPMU_ALT_SIPR		\
+	LONG_ASM_CONST(0x0000000000000002) /* uses alternate posn for SIPR/HV */
+
+#define PPMU_NO_SIPR		\
+	LONG_ASM_CONST(0x0000000000000004) /* no SIPR/HV in MMCRA at all */
+
+#define PPMU_NO_CONT_SAMPLING	\
+	LONG_ASM_CONST(0x0000000000000008) /* no continuous sampling */
+
+#define PPMU_SIAR_VALID		\
+	LONG_ASM_CONST(0x0000000000000010) /* Processor has SIAR Valid bit */
 
 /*
  * Values for flags to get_alternatives()