diff mbox

target-mips: Add comments on POOL32Axf encoding

Message ID 20121116022947.GA50435@cs.nctu.edu.tw
State New
Headers show

Commit Message

陳韋任 Nov. 16, 2012, 2:29 a.m. UTC
Hi all,

  Current QEMU MIPS POOL32AXF encoding comes from microMIPS32
and microMIPS32 DSP. Add comment here to help reading.

  Please review, thanks.

Regards,
chenwj

Signed-off-by: Chen Wei-Ren <chenwj@iis.sinica.edu.tw>
---
 target-mips/translate.c |   17 +++++++++++++++++
 1 files changed, 17 insertions(+), 0 deletions(-)

Comments

Stefan Hajnoczi Nov. 16, 2012, 1:59 p.m. UTC | #1
On Fri, Nov 16, 2012 at 10:29:47AM +0800, 陳韋任 (Wei-Ren Chen) wrote:
>   Current QEMU MIPS POOL32AXF encoding comes from microMIPS32
> and microMIPS32 DSP. Add comment here to help reading.
> 
>   Please review, thanks.
> 
> Regards,
> chenwj
> 
> Signed-off-by: Chen Wei-Ren <chenwj@iis.sinica.edu.tw>
> ---
>  target-mips/translate.c |   17 +++++++++++++++++
>  1 files changed, 17 insertions(+), 0 deletions(-)

Please send this through Aurelien.  Perhaps there's more to discuss
about how the various MIPS instruction sets should be organized in QEMU.

Stefan
陳韋任 Nov. 18, 2012, 3:26 a.m. UTC | #2
On Fri, Nov 16, 2012 at 02:59:30PM +0100, Stefan Hajnoczi wrote:
> On Fri, Nov 16, 2012 at 10:29:47AM +0800, 陳韋任 (Wei-Ren Chen) wrote:
> >   Current QEMU MIPS POOL32AXF encoding comes from microMIPS32
> > and microMIPS32 DSP. Add comment here to help reading.
> > 
> >   Please review, thanks.
> > 
> > Regards,
> > chenwj
> > 
> > Signed-off-by: Chen Wei-Ren <chenwj@iis.sinica.edu.tw>
> > ---
> >  target-mips/translate.c |   17 +++++++++++++++++
> >  1 files changed, 17 insertions(+), 0 deletions(-)
> 
> Please send this through Aurelien.  Perhaps there's more to discuss
> about how the various MIPS instruction sets should be organized in QEMU.

  Got it. ;)
陳韋任 Nov. 20, 2012, 6:38 a.m. UTC | #3
ping?

On Fri, Nov 16, 2012 at 10:29:47AM +0800, 陳韋任 (Wei-Ren Chen) wrote:
> Hi all,
> 
>   Current QEMU MIPS POOL32AXF encoding comes from microMIPS32
> and microMIPS32 DSP. Add comment here to help reading.
> 
>   Please review, thanks.
> 
> Regards,
> chenwj
> 
> Signed-off-by: Chen Wei-Ren <chenwj@iis.sinica.edu.tw>
> ---
>  target-mips/translate.c |   17 +++++++++++++++++
>  1 files changed, 17 insertions(+), 0 deletions(-)
> 
> diff --git a/target-mips/translate.c b/target-mips/translate.c
> index 01b48fa..9d4b2c3 100644
> --- a/target-mips/translate.c
> +++ b/target-mips/translate.c
> @@ -10359,6 +10359,19 @@ enum {
>  
>  /* POOL32AXF encoding of minor opcode field extension */
>  
> +/*
> + *  1. MIPS Architecture for Programmers Volume II-B:
> + *       The microMIPS32 Instruction Set (Revision 3.05)
> + *
> + *     Table 6.5 POOL32Axf Encoding of Minor Opcode Extension Field  
> + *
> + *  2. MIPS Architecture for Programmers VolumeIV-e:
> + *       The MIPS DSP Application-Specific Extension
> + *         to the microMIPS32 Architecture (Revision 2.34)
> + *
> + *     Table 5.5 POOL32Axf Encoding of Minor Opcode Extension Field
> + */
> +
>  enum {
>      /* bits 11..6 */
>      TEQ = 0x00,
> @@ -10371,6 +10384,8 @@ enum {
>      MFC0 = 0x03,
>      MTC0 = 0x0b,
>  
> +    /* begin of microMIPS32 DSP */
> +
>      /* bits 13..12 for 0x01 */
>      MFHI_ACC = 0x0,
>      MFLO_ACC = 0x1,
> @@ -10387,6 +10402,8 @@ enum {
>      MULT_ACC = 0x0,
>      MULTU_ACC = 0x1,
>  
> +    /* end of microMIPS32 DSP */
> +
>      /* bits 15..12 for 0x2c */
>      SEB = 0x2,
>      SEH = 0x3,
> -- 
> 1.7.3.4
Eric Johnson Nov. 21, 2012, 4:56 a.m. UTC | #4
Hi Chen,

The contents of the patch are OK.

The formatting of the message is incorrect.  Anything before the first '---' will be used as the comment for the commit.  It should not have "Hi all," "Please review, thanks.  Regards, checnwj"

If you want to include these additional comments, put them after the first '---' and before changed file summary.

> ---

[Additional comments here]
>  target-mips/translate.c |   17 +++++++++++++++++


Please review the "SubmittingPatches 1.12" link on the http://wiki.qemu.org/Contribute/SubmitAPatch page.

-Eric

> -----Original Message-----

> From: 陳韋任 (Wei-Ren Chen) [mailto:chenwj@iis.sinica.edu.tw]

> Sent: Thursday, November 15, 2012 6:30 PM

> To: qemu-devel@nongnu.org; qemu-trivial@nongnu.org

> Cc: Johnson, Eric; Aurelien Jarno; Jia Liu

> Subject: [PATCH] target-mips: Add comments on POOL32Axf encoding

> 

> Hi all,

> 

>   Current QEMU MIPS POOL32AXF encoding comes from microMIPS32

> and microMIPS32 DSP. Add comment here to help reading.

> 

>   Please review, thanks.

> 

> Regards,

> chenwj

> 

> Signed-off-by: Chen Wei-Ren <chenwj@iis.sinica.edu.tw>

> ---

>  target-mips/translate.c |   17 +++++++++++++++++

>  1 files changed, 17 insertions(+), 0 deletions(-)

> 

> diff --git a/target-mips/translate.c b/target-mips/translate.c

> index 01b48fa..9d4b2c3 100644

> --- a/target-mips/translate.c

> +++ b/target-mips/translate.c

> @@ -10359,6 +10359,19 @@ enum {

> 

>  /* POOL32AXF encoding of minor opcode field extension */

> 

> +/*

> + *  1. MIPS Architecture for Programmers Volume II-B:

> + *       The microMIPS32 Instruction Set (Revision 3.05)

> + *

> + *     Table 6.5 POOL32Axf Encoding of Minor Opcode Extension Field

> + *

> + *  2. MIPS Architecture for Programmers VolumeIV-e:

> + *       The MIPS DSP Application-Specific Extension

> + *         to the microMIPS32 Architecture (Revision 2.34)

> + *

> + *     Table 5.5 POOL32Axf Encoding of Minor Opcode Extension Field

> + */

> +

>  enum {

>      /* bits 11..6 */

>      TEQ = 0x00,

> @@ -10371,6 +10384,8 @@ enum {

>      MFC0 = 0x03,

>      MTC0 = 0x0b,

> 

> +    /* begin of microMIPS32 DSP */

> +

>      /* bits 13..12 for 0x01 */

>      MFHI_ACC = 0x0,

>      MFLO_ACC = 0x1,

> @@ -10387,6 +10402,8 @@ enum {

>      MULT_ACC = 0x0,

>      MULTU_ACC = 0x1,

> 

> +    /* end of microMIPS32 DSP */

> +

>      /* bits 15..12 for 0x2c */

>      SEB = 0x2,

>      SEH = 0x3,

> --

> 1.7.3.4
陳韋任 Nov. 21, 2012, 5:52 a.m. UTC | #5
Hi Johnson,

  My bad. Will resend pacth later. ;)

Regards,
chenwj
diff mbox

Patch

diff --git a/target-mips/translate.c b/target-mips/translate.c
index 01b48fa..9d4b2c3 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -10359,6 +10359,19 @@  enum {
 
 /* POOL32AXF encoding of minor opcode field extension */
 
+/*
+ *  1. MIPS Architecture for Programmers Volume II-B:
+ *       The microMIPS32 Instruction Set (Revision 3.05)
+ *
+ *     Table 6.5 POOL32Axf Encoding of Minor Opcode Extension Field  
+ *
+ *  2. MIPS Architecture for Programmers VolumeIV-e:
+ *       The MIPS DSP Application-Specific Extension
+ *         to the microMIPS32 Architecture (Revision 2.34)
+ *
+ *     Table 5.5 POOL32Axf Encoding of Minor Opcode Extension Field
+ */
+
 enum {
     /* bits 11..6 */
     TEQ = 0x00,
@@ -10371,6 +10384,8 @@  enum {
     MFC0 = 0x03,
     MTC0 = 0x0b,
 
+    /* begin of microMIPS32 DSP */
+
     /* bits 13..12 for 0x01 */
     MFHI_ACC = 0x0,
     MFLO_ACC = 0x1,
@@ -10387,6 +10402,8 @@  enum {
     MULT_ACC = 0x0,
     MULTU_ACC = 0x1,
 
+    /* end of microMIPS32 DSP */
+
     /* bits 15..12 for 0x2c */
     SEB = 0x2,
     SEH = 0x3,