Patchwork [SH,committed] PR 53512 - Fix swapped sin and cos operands

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Submitter Oleg Endo
Date Nov. 12, 2012, 12:31 a.m.
Message ID <1352680296.8110.340.camel@yam-132-YW-E178-FTW>
Download mbox | patch
Permalink /patch/198312/
State New
Headers show

Comments

Oleg Endo - Nov. 12, 2012, 12:31 a.m.
Hello,

When refactoring the SH fsca patterns to use the sincos standard name
pattern I got the order of the sin and cos operands wrong.
This obvious patch fixes it.

Tested with 'make all-gcc' and 
make -k check-gcc RUNTESTFLAGS="sh.exp=sh4a-fprun* --target_board=sh-sim
\{-m4a/-ml,-m4a/-mb}"

Committed as rev 193423.

Cheers,
Oleg

ChangeLog:

	PR target/53512
	* config/sh/sh.md (sincossf3): Fix swapped sin and cos operands.

Patch

Index: gcc/config/sh/sh.md
===================================================================
--- gcc/config/sh/sh.md	(revision 193417)
+++ gcc/config/sh/sh.md	(working copy)
@@ -12433,11 +12433,10 @@ 
 ;; will be expanded to the sincos pattern and one of the output values will
 ;; remain unused.
 (define_expand "sincossf3"
-  [(set (match_operand:SF 0 "nonimmediate_operand" "")
-	(unspec:SF [(match_operand:SF 2 "fp_arith_reg_operand" "")]
-		   UNSPEC_FSINA))
-   (set (match_operand:SF 1 "nonimmediate_operand" "")
-	(unspec:SF [(match_dup 2)] UNSPEC_FCOSA))]
+  [(set (match_operand:SF 0 "nonimmediate_operand")
+	(unspec:SF [(match_operand:SF 2 "fp_arith_reg_operand")] UNSPEC_FCOSA))
+   (set (match_operand:SF 1 "nonimmediate_operand")
+	(unspec:SF [(match_dup 2)] UNSPEC_FSINA))]
   "TARGET_FPU_ANY && TARGET_FSCA"
 {
   rtx scaled = gen_reg_rtx (SFmode);
@@ -12450,8 +12449,8 @@ 
   emit_sf_insn (gen_fsca (fsca, truncated, sh_fsca_int2sf (),
 			  get_fpscr_rtx ()));
 
-  emit_move_insn (operands[0], gen_rtx_SUBREG (SFmode, fsca, 0));
-  emit_move_insn (operands[1], gen_rtx_SUBREG (SFmode, fsca, 4));
+  emit_move_insn (operands[0], gen_rtx_SUBREG (SFmode, fsca, 4));
+  emit_move_insn (operands[1], gen_rtx_SUBREG (SFmode, fsca, 0));
   DONE;
 })