From patchwork Fri Nov 9 17:43:29 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jimi Xenidis X-Patchwork-Id: 198140 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id D63ED2C03C0 for ; Sat, 10 Nov 2012 04:44:07 +1100 (EST) Received: from mail-ob0-f179.google.com (mail-ob0-f179.google.com [209.85.214.179]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 6E63F2C00B5 for ; Sat, 10 Nov 2012 04:43:37 +1100 (EST) Received: by mail-ob0-f179.google.com with SMTP id eq6so464843obc.38 for ; Fri, 09 Nov 2012 09:43:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:content-type:content-transfer-encoding:subject:date :message-id:cc:to:mime-version:x-mailer; bh=8Er17rk7mRcogUSunsdQPSUHOQ/bxHbX/9px60x2nSs=; b=Gxrh1p+/KgyV2yVEwa4IGvofPVEPuMnAD0OGPZXguWN37szJs738YjfJTIE7lbXPir hQG+TGuAx5F5G3znMxgR0hfklCkqu5AUvWa/giEXEIqB/ygM//3b/kmNhYYQ/0+IihtU 1Skw5rS2/8G3DkV+I3Ditd6qJSqG5EwmfMgkCNI30Gxk33pZErPzaQVTBdUPSKN8SCMg biWDD8Cwyn3lXzp39p6TG8XLZmYbCEMuWb6SPT6KSHIlaOLiroUXPPq7t322r7Hfn0FK rsZT9pOTVMXmZBJkGYd1k+UCdGAwuHtEnMDMof+S4BPm1YWAqEBylybVVjjW/OFj1rEM 7QMA== Received: by 10.182.52.105 with SMTP id s9mr9152371obo.25.1352483014338; Fri, 09 Nov 2012 09:43:34 -0800 (PST) Received: from [192.168.1.102] (99-58-56-194.lightspeed.austtx.sbcglobal.net. [99.58.56.194]) by mx.google.com with ESMTPS id zy9sm6192431oeb.4.2012.11.09.09.43.30 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 09 Nov 2012 09:43:33 -0800 (PST) From: Jimi Xenidis Subject: Hijacking CPU_FTR_VSX for BGQ QPX Date: Fri, 9 Nov 2012 11:43:29 -0600 Message-Id: <29970ED2-02E3-45F5-96FD-B4270385E3ED@pobox.com> To: Benjamin Herrenschmidt , Michael Neuling Mime-Version: 1.0 (Apple Message framework v1283) X-Mailer: Apple Mail (2.1283) Cc: linuxppc-dev X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" The CPU_FTR_* values are pretty tight (a few bits left) yes I need to save and restore the QPX registers. There are 32 QPX registers, each 32 bytes in size, it is otherwise managed by the FPSCR and MSR[FP] I was thinking that I could hijack the VSX, since there is no plan to add it to embedded yet. I could be explicit or create an alieas fo the same bit, but the basic effect (after increasing the save area size) would be something like the diff below. Thoughts? -jx diff --git a/arch/powerpc/kernel/fpu.S b/arch/powerpc/kernel/fpu.S index de36955..adb08af 100644 --- a/arch/powerpc/kernel/fpu.S +++ b/arch/powerpc/kernel/fpu.S @@ -25,14 +25,24 @@ #include #include -#ifdef CONFIG_VSX +#if defined (CONFIG_VSX) && defined(CONFIG_BGQ) +# error "This code depends on CONFIG_VSX and CONFIG_BGQ being exclusive +#elif defined (CONFIG_VSX) +# define _REST_32VSRS(n,c,base) REST_32VSRS(n,c,base) +# define _SAVE_32VSRS(n,c,base) SAVE_32VSRS(n,c,base) +#elif defined(CONFIG_BGQ) +# define _REST_32VSRS(n,c,base) REST_32QRS(n,c,base) +# define _SAVE_32VSRS(n,c,base) SAVE_32QRS(n,c,base) +#endif + +#if defined (CONFIG_VSX) || defined(CONFIG_BGQ) #define REST_32FPVSRS(n,c,base) \ BEGIN_FTR_SECTION \ b 2f; \ END_FTR_SECTION_IFSET(CPU_FTR_VSX); \ REST_32FPRS(n,base); \ b 3f; \ -2: REST_32VSRS(n,c,base); \ +2: _REST_32VSRS(n,c,base); \ 3: #define SAVE_32FPVSRS(n,c,base) \ @@ -41,7 +51,7 @@ BEGIN_FTR_SECTION \ END_FTR_SECTION_IFSET(CPU_FTR_VSX); \ SAVE_32FPRS(n,base); \ b 3f; \ -2: SAVE_32VSRS(n,c,base); \ +2: _SAVE_32VSRS(n,c,base); \ 3: #else #define REST_32FPVSRS(n,b,base) REST_32FPRS(n, base)