Patchwork [QEMU] microblaze: translate.c: Fix swaph decoding

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Submitter Peter Crosthwaite
Date Nov. 8, 2012, 4:01 a.m.
Message ID <1352347279-769-1-git-send-email-peter.crosthwaite@xilinx.com>
Download mbox | patch
Permalink /patch/197751/
State New
Headers show

Comments

Peter Crosthwaite - Nov. 8, 2012, 4:01 a.m.
The swaph instruction was not decoding correctly. s/1e1/1e2 on the
9 LSBs on the instruction decode.

Reported-by: David Holsgrove <david.holsgrove@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
---
 target-microblaze/translate.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
Edgar Iglesias - Nov. 9, 2012, 10:40 a.m.
On Thu, Nov 08, 2012 at 02:01:19PM +1000, Peter Crosthwaite wrote:
> The swaph instruction was not decoding correctly. s/1e1/1e2 on the
> 9 LSBs on the instruction decode.
> 
> Reported-by: David Holsgrove <david.holsgrove@xilinx.com>
> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
> ---
>  target-microblaze/translate.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
> index 7d864b1..6f27c24 100644
> --- a/target-microblaze/translate.c
> +++ b/target-microblaze/translate.c
> @@ -840,7 +840,7 @@ static void dec_bit(DisasContext *dc)
>              LOG_DIS("swapb r%d r%d\n", dc->rd, dc->ra);
>              tcg_gen_bswap32_i32(cpu_R[dc->rd], cpu_R[dc->ra]);
>              break;
> -        case 0x1e1:
> +        case 0x1e2:

Ouch.. I've applied the fix, thanks.

David, was this the bug that was causing the recent errors with the rebased
GCC port?

Cheers,
Edgar

Patch

diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index 7d864b1..6f27c24 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -840,7 +840,7 @@  static void dec_bit(DisasContext *dc)
             LOG_DIS("swapb r%d r%d\n", dc->rd, dc->ra);
             tcg_gen_bswap32_i32(cpu_R[dc->rd], cpu_R[dc->ra]);
             break;
-        case 0x1e1:
+        case 0x1e2:
             /*swaph */
             LOG_DIS("swaph r%d r%d\n", dc->rd, dc->ra);
             tcg_gen_rotri_i32(cpu_R[dc->rd], cpu_R[dc->ra], 16);