From patchwork Thu Nov 8 01:28:28 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Borkmann X-Patchwork-Id: 197743 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 024F92C00D0 for ; Thu, 8 Nov 2012 12:28:39 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754809Ab2KHB2g (ORCPT ); Wed, 7 Nov 2012 20:28:36 -0500 Received: from mail-ea0-f174.google.com ([209.85.215.174]:49892 "EHLO mail-ea0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754799Ab2KHB2d (ORCPT ); Wed, 7 Nov 2012 20:28:33 -0500 Received: by mail-ea0-f174.google.com with SMTP id c13so861407eaa.19 for ; Wed, 07 Nov 2012 17:28:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=date:from:to:cc:subject:message-id:mime-version:content-type :content-disposition:user-agent; bh=yQby0+mg03tDfMdzyqh0qPIw96EwzEfPdSCWue0ELM4=; b=IeUPCpMgqVtdX4q7pMjtSg3OHB4yux56kYLgJ/gYizJLtOEguW+WVMalEAjQGQlZpM eaQcJegM46hHrcTpaadT8zF49EEuPatHtjPqmKry6aISCvk9/gqI/w4hMnj1S40rcEb6 6bFhOC7d6cLWTMr2aL5lUiBurCMkodvPrl0sqXxSt+m9pevrd4Hzp3mlCU7Jf6nB7MpA Ciche2ihBhZZBF/gfb/tn+zbzIecW9gYoMUgaIcObNJIxoPvI/jej8+XrJa+jfuH1Vpr rHsuGQLoPAiQROKcZGjnrLGZEYDP0itMxHvphagQIHJ9S1JyonFIk5acxoUelEKDtdZ9 pWrg== Received: by 10.14.215.69 with SMTP id d45mr21694733eep.16.1352338112486; Wed, 07 Nov 2012 17:28:32 -0800 (PST) Received: from thinkbox (74-25.196-178.cust.bluewin.ch. [178.196.25.74]) by mx.google.com with ESMTPS id d44sm67259753eeo.10.2012.11.07.17.28.31 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 07 Nov 2012 17:28:32 -0800 (PST) Date: Thu, 8 Nov 2012 02:28:28 +0100 From: Daniel Borkmann To: davem@davemloft.net Cc: Mircea Gherzan , Arnd Bergmann , netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH net-next 1/2] ARM: net: bpf_jit_32: add XOR instruction for BPF JIT Message-ID: <20121108012828.GA23143@thinkbox> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.20 (2009-06-14) Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This patch is a follow-up for patch "filter: add XOR instruction for use with X/K" that implements BPF ARM JIT parts for the BPF XOR operation. Signed-off-by: Daniel Borkmann Cc: Mircea Gherzan Cc: Arnd Bergmann Acked-by: Mircea Gherzan --- arch/arm/net/bpf_jit_32.c | 15 ++++++++++----- arch/arm/net/bpf_jit_32.h | 2 ++ 2 files changed, 12 insertions(+), 5 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/net/bpf_jit_32.c b/arch/arm/net/bpf_jit_32.c index c641fb6..8be702d 100644 --- a/arch/arm/net/bpf_jit_32.c +++ b/arch/arm/net/bpf_jit_32.c @@ -646,6 +646,16 @@ load_ind: update_on_xread(ctx); emit(ARM_ORR_R(r_A, r_A, r_X), ctx); break; + case BPF_S_ALU_XOR_K: + /* A ^= K; */ + OP_IMM3(ARM_EOR, r_A, r_A, k, ctx); + break; + case BPF_S_ANC_ALU_XOR_X: + case BPF_S_ALU_XOR_X: + /* A ^= X */ + update_on_xread(ctx); + emit(ARM_EOR_R(r_A, r_A, r_X), ctx); + break; case BPF_S_ALU_AND_K: /* A &= K */ OP_IMM3(ARM_AND, r_A, r_A, k, ctx); @@ -762,11 +772,6 @@ b_epilogue: update_on_xread(ctx); emit(ARM_MOV_R(r_A, r_X), ctx); break; - case BPF_S_ANC_ALU_XOR_X: - /* A ^= X */ - update_on_xread(ctx); - emit(ARM_EOR_R(r_A, r_A, r_X), ctx); - break; case BPF_S_ANC_PROTOCOL: /* A = ntohs(skb->protocol) */ ctx->seen |= SEEN_SKB; diff --git a/arch/arm/net/bpf_jit_32.h b/arch/arm/net/bpf_jit_32.h index 7fa2f7d..afb8462 100644 --- a/arch/arm/net/bpf_jit_32.h +++ b/arch/arm/net/bpf_jit_32.h @@ -69,6 +69,7 @@ #define ARM_INST_CMP_I 0x03500000 #define ARM_INST_EOR_R 0x00200000 +#define ARM_INST_EOR_I 0x02200000 #define ARM_INST_LDRB_I 0x05d00000 #define ARM_INST_LDRB_R 0x07d00000 @@ -135,6 +136,7 @@ #define ARM_CMP_I(rn, imm) _AL3_I(ARM_INST_CMP, 0, rn, imm) #define ARM_EOR_R(rd, rn, rm) _AL3_R(ARM_INST_EOR, rd, rn, rm) +#define ARM_EOR_I(rd, rn, imm) _AL3_I(ARM_INST_EOR, rd, rn, imm) #define ARM_LDR_I(rt, rn, off) (ARM_INST_LDR_I | (rt) << 12 | (rn) << 16 \ | (off))