Patchwork [2/4] perf/Power7: Use macros to identify perf events

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Submitter sukadev@linux.vnet.ibm.com
Date Nov. 7, 2012, 7:18 p.m.
Message ID <20121107191846.GB16211@us.ibm.com>
Download mbox | patch
Permalink /patch/197719/
State Superseded
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Comments

sukadev@linux.vnet.ibm.com - Nov. 7, 2012, 7:18 p.m.
From 8a0dbd8f3fce2834292efa50c15ca64d4f6a6536 Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Date: Wed, 7 Nov 2012 09:36:14 -0800
Subject: [PATCH 2/4] perf/Power7: Use macros to identify perf events

Define and use macros to identify perf events codes This would make it
easier and more readable when these event codes need to be used in more
than one place.

Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
---
 arch/powerpc/perf/power7-pmu.c |   25 +++++++++++++++++--------
 1 files changed, 17 insertions(+), 8 deletions(-)

Patch

diff --git a/arch/powerpc/perf/power7-pmu.c b/arch/powerpc/perf/power7-pmu.c
index 441af08..256db4f 100644
--- a/arch/powerpc/perf/power7-pmu.c
+++ b/arch/powerpc/perf/power7-pmu.c
@@ -295,15 +295,24 @@  static void power7_disable_pmc(unsigned int pmc, unsigned long mmcr[])
 		mmcr[1] &= ~(0xffUL << MMCR1_PMCSEL_SH(pmc));
 }
 
+#define	PM_CYC				0x1e
+#define	PM_GCT_NOSLOT_CYC		0x100f8
+#define	PM_CMPLU_STALL			0x4000a
+#define	PM_INST_CMPL			0x2
+#define	PM_LD_REF_L1			0xc880
+#define	PM_LD_MISS_L1			0x400f0
+#define	PM_BRU_FIN			0x10068
+#define	PM_BRU_MPRED			0x400f6
+
 static int power7_generic_events[] = {
-	[PERF_COUNT_HW_CPU_CYCLES] = 0x1e,
-	[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x100f8, /* GCT_NOSLOT_CYC */
-	[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = 0x4000a,  /* CMPLU_STALL */
-	[PERF_COUNT_HW_INSTRUCTIONS] = 2,
-	[PERF_COUNT_HW_CACHE_REFERENCES] = 0xc880,	/* LD_REF_L1_LSU*/
-	[PERF_COUNT_HW_CACHE_MISSES] = 0x400f0,		/* LD_MISS_L1	*/
-	[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x10068,	/* BRU_FIN	*/
-	[PERF_COUNT_HW_BRANCH_MISSES] = 0x400f6,	/* BR_MPRED	*/
+	[PERF_COUNT_HW_CPU_CYCLES] = 			PM_CYC,
+	[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 	PM_GCT_NOSLOT_CYC,
+	[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = 	PM_CMPLU_STALL,
+	[PERF_COUNT_HW_INSTRUCTIONS] = 			PM_INST_CMPL,
+	[PERF_COUNT_HW_CACHE_REFERENCES] = 		PM_LD_REF_L1,
+	[PERF_COUNT_HW_CACHE_MISSES] = 			PM_LD_MISS_L1,
+	[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 		PM_BRU_FIN,
+	[PERF_COUNT_HW_BRANCH_MISSES] = 		PM_BRU_MPRED,
 };
 
 #define C(x)	PERF_COUNT_HW_CACHE_##x