Message ID | 1352136508-14198-20-git-send-email-l.majewski@samsung.com |
---|---|
State | Superseded |
Delegated to: | Minkyu Kang |
Headers | show |
On 06/11/12 02:28, Lukasz Majewski wrote: > When charging battery is necessary, the development board needs to > be turned into low power mode for better efficiency. > > Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> > Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> > Cc: Minkyu Kang <mk7.kang@samsung.com> > --- > Changes for v2: > - None > Changes for v3: > - None > Changes for v4: > - None > Changes for v5: > - None > --- > board/samsung/trats/trats.c | 41 +++++++++++++++++++++++++++++++++++++++++ > 1 files changed, 41 insertions(+), 0 deletions(-) > > diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c > index 5c23744..a8a97bf 100644 > --- a/board/samsung/trats/trats.c > +++ b/board/samsung/trats/trats.c > @@ -89,6 +89,47 @@ void i2c_init_board(void) > s5p_gpio_direction_output(&gpio2->y4, 1, 1); > } > > +static void trats_low_power_mode(void) > +{ > + struct exynos4_clock *clk = > + (struct exynos4_clock *)samsung_get_base_clock(); > + struct exynos4_power *pwr = > + (struct exynos4_power *)samsung_get_base_power(); > + > + /* Power down CORE1 */ > + writel(0x0, &pwr->arm_core1_configuration); > + > + /* Change the APLL frequency */ > + writel(0xa0c80604, &clk->apll_con0); Magic code? please define this codes or at least add some comments here. > + /* Change CPU0 clock divider */ > + writel(0x00000100, &clk->div_cpu0); > + /* CLK_DIV_STAT_CPU0 - wait until clock gets stable */ > + while (readl(&clk->div_stat_cpu0) & 0x1111111) > + ; > + > + /* Change clock divider ratio for DMC */ > + writel(0x13113117, &clk->div_dmc0); ditto. > + while (readl(&clk->div_stat_dmc0) & 0x11111111) > + ; > + > + /* Turn off unnecessary power domains */ > + writel(0x0, &pwr->xxti_configuration); /* XXTI */ > + writel(0x0, &pwr->cam_configuration); /* CAM */ > + writel(0x0, &pwr->tv_configuration); /* TV */ > + writel(0x0, &pwr->mfc_configuration); /* MFC */ > + writel(0x0, &pwr->g3d_configuration); /* G3D */ > + writel(0x0, &pwr->gps_configuration); /* GPS */ > + writel(0x0, &pwr->gps_alive_configuration); /* GPS_ALIVE */ > + > + /* Turn off unnecessary clocks */ > + writel(0x0, &clk->gate_ip_cam); /* CAM */ > + writel(0x0, &clk->gate_ip_tv); /* TV */ > + writel(0x0, &clk->gate_ip_mfc); /* MFC */ > + writel(0x0, &clk->gate_ip_g3d); /* G3D */ > + writel(0x0, &clk->gate_ip_image); /* IMAGE */ > + writel(0x0, &clk->gate_ip_gps); /* GPS */ > +} > + > static int pmic_init_max8997(void) > { > struct pmic *p = pmic_get("MAX8997_PMIC"); > Thanks. Minkyu Kang.
Hi Minkyu, > On 06/11/12 02:28, Lukasz Majewski wrote: > > When charging battery is necessary, the development board needs to > > be turned into low power mode for better efficiency. > > > > Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> > > Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> > > Cc: Minkyu Kang <mk7.kang@samsung.com> > > --- > > Changes for v2: > > - None > > Changes for v3: > > - None > > Changes for v4: > > - None > > Changes for v5: > > - None > > --- > > board/samsung/trats/trats.c | 41 > > +++++++++++++++++++++++++++++++++++++++++ 1 files changed, 41 > > insertions(+), 0 deletions(-) > > > > diff --git a/board/samsung/trats/trats.c > > b/board/samsung/trats/trats.c index 5c23744..a8a97bf 100644 > > --- a/board/samsung/trats/trats.c > > +++ b/board/samsung/trats/trats.c > > @@ -89,6 +89,47 @@ void i2c_init_board(void) > > s5p_gpio_direction_output(&gpio2->y4, 1, 1); > > } > > > > +static void trats_low_power_mode(void) > > +{ > > + struct exynos4_clock *clk = > > + (struct exynos4_clock *)samsung_get_base_clock(); > > + struct exynos4_power *pwr = > > + (struct exynos4_power *)samsung_get_base_power(); > > + > > + /* Power down CORE1 */ > > + writel(0x0, &pwr->arm_core1_configuration); > > + > > + /* Change the APLL frequency */ > > + writel(0xa0c80604, &clk->apll_con0); > > Magic code? > please define this codes or at least add some comments here. I will prepare comments for setting the APLL configuraiton. > > > + /* Change CPU0 clock divider */ > > + writel(0x00000100, &clk->div_cpu0); > > + /* CLK_DIV_STAT_CPU0 - wait until clock gets stable */ > > + while (readl(&clk->div_stat_cpu0) & 0x1111111) > > + ; > > + > > + /* Change clock divider ratio for DMC */ > > + writel(0x13113117, &clk->div_dmc0); > > ditto. > > > + while (readl(&clk->div_stat_dmc0) & 0x11111111) > > + ; > > + > > + /* Turn off unnecessary power domains */ > > + writel(0x0, &pwr->xxti_configuration); /* XXTI */ > > + writel(0x0, &pwr->cam_configuration); /* CAM */ > > + writel(0x0, &pwr->tv_configuration); /* TV */ > > + writel(0x0, &pwr->mfc_configuration); /* MFC */ > > + writel(0x0, &pwr->g3d_configuration); /* G3D */ > > + writel(0x0, &pwr->gps_configuration); /* GPS */ > > + writel(0x0, &pwr->gps_alive_configuration); /* > > GPS_ALIVE */ + > > + /* Turn off unnecessary clocks */ > > + writel(0x0, &clk->gate_ip_cam); /* CAM */ > > + writel(0x0, &clk->gate_ip_tv); /* TV */ > > + writel(0x0, &clk->gate_ip_mfc); /* MFC */ > > + writel(0x0, &clk->gate_ip_g3d); /* G3D */ > > + writel(0x0, &clk->gate_ip_image); /* IMAGE */ > > + writel(0x0, &clk->gate_ip_gps); /* GPS */ > > +} > > + > > static int pmic_init_max8997(void) > > { > > struct pmic *p = pmic_get("MAX8997_PMIC"); > > > > Thanks. > Minkyu Kang.
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c index 5c23744..a8a97bf 100644 --- a/board/samsung/trats/trats.c +++ b/board/samsung/trats/trats.c @@ -89,6 +89,47 @@ void i2c_init_board(void) s5p_gpio_direction_output(&gpio2->y4, 1, 1); } +static void trats_low_power_mode(void) +{ + struct exynos4_clock *clk = + (struct exynos4_clock *)samsung_get_base_clock(); + struct exynos4_power *pwr = + (struct exynos4_power *)samsung_get_base_power(); + + /* Power down CORE1 */ + writel(0x0, &pwr->arm_core1_configuration); + + /* Change the APLL frequency */ + writel(0xa0c80604, &clk->apll_con0); + /* Change CPU0 clock divider */ + writel(0x00000100, &clk->div_cpu0); + /* CLK_DIV_STAT_CPU0 - wait until clock gets stable */ + while (readl(&clk->div_stat_cpu0) & 0x1111111) + ; + + /* Change clock divider ratio for DMC */ + writel(0x13113117, &clk->div_dmc0); + while (readl(&clk->div_stat_dmc0) & 0x11111111) + ; + + /* Turn off unnecessary power domains */ + writel(0x0, &pwr->xxti_configuration); /* XXTI */ + writel(0x0, &pwr->cam_configuration); /* CAM */ + writel(0x0, &pwr->tv_configuration); /* TV */ + writel(0x0, &pwr->mfc_configuration); /* MFC */ + writel(0x0, &pwr->g3d_configuration); /* G3D */ + writel(0x0, &pwr->gps_configuration); /* GPS */ + writel(0x0, &pwr->gps_alive_configuration); /* GPS_ALIVE */ + + /* Turn off unnecessary clocks */ + writel(0x0, &clk->gate_ip_cam); /* CAM */ + writel(0x0, &clk->gate_ip_tv); /* TV */ + writel(0x0, &clk->gate_ip_mfc); /* MFC */ + writel(0x0, &clk->gate_ip_g3d); /* G3D */ + writel(0x0, &clk->gate_ip_image); /* IMAGE */ + writel(0x0, &clk->gate_ip_gps); /* GPS */ +} + static int pmic_init_max8997(void) { struct pmic *p = pmic_get("MAX8997_PMIC");