From patchwork Fri Nov 2 17:39:46 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vipin Kumar X-Patchwork-Id: 196721 X-Patchwork-Delegate: vipin.kumar@st.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id A24282C00C1 for ; Sat, 3 Nov 2012 05:20:24 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 52FE44ABC0; Fri, 2 Nov 2012 19:18:48 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id d1+bwBDRZeDY; Fri, 2 Nov 2012 19:18:48 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 37F214AEFA; Fri, 2 Nov 2012 19:17:08 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4B9084AEDF for ; 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Fri, 2 Nov 2012 17:43:48 +0000 (GMT) Received: from localhost (10.251.136.62) by Webmail-ap.st.com (10.80.176.7) with Microsoft SMTP Server (TLS) id 8.3.245.1; Sat, 3 Nov 2012 01:43:47 +0800 From: Vipin Kumar To: Date: Fri, 2 Nov 2012 23:09:46 +0530 Message-ID: X-Mailer: git-send-email 1.7.10.rc2.10.gb47606 In-Reply-To: References: MIME-Version: 1.0 Cc: sr@denx.de, spear-devel@list.st.com Subject: [U-Boot] [SPEAr Fixes PATCH 07/11] spear: Cleanup SoC area X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de - Place emi init in soc area - Move smi and emi controller initializations to arch_cpu_init Signed-off-by: Vipin Kumar --- arch/arm/cpu/arm926ejs/spear/Makefile | 2 + arch/arm/cpu/arm926ejs/spear/cpu.c | 37 +++++++++++++++- arch/arm/cpu/arm926ejs/spear/emi.c | 80 +++++++++++++++++++++++++++++++++++ arch/arm/cpu/arm926ejs/spear/spl.c | 35 --------------- board/st/spear/spear_common.c | 75 -------------------------------- 5 files changed, 118 insertions(+), 111 deletions(-) create mode 100644 arch/arm/cpu/arm926ejs/spear/emi.c diff --git a/arch/arm/cpu/arm926ejs/spear/Makefile b/arch/arm/cpu/arm926ejs/spear/Makefile index d06f03d..939f372 100644 --- a/arch/arm/cpu/arm926ejs/spear/Makefile +++ b/arch/arm/cpu/arm926ejs/spear/Makefile @@ -29,6 +29,8 @@ COBJS-y := cpu.o \ reset.o \ timer.o +COBJS-$(CONFIG_ST_EMI) += emi.o + ifdef CONFIG_SPL_BUILD COBJS-y += spl.o spl_boot.o COBJS-$(CONFIG_SPEAR600) += spear600.o diff --git a/arch/arm/cpu/arm926ejs/spear/cpu.c b/arch/arm/cpu/arm926ejs/spear/cpu.c index 311f31b..f03b2bb 100644 --- a/arch/arm/cpu/arm926ejs/spear/cpu.c +++ b/arch/arm/cpu/arm926ejs/spear/cpu.c @@ -22,16 +22,41 @@ */ #include +#include #include #include #include +#if defined(CONFIG_ARCH_SPEAR6XX) +static void mac_init(void) +{ + struct misc_regs *misc_p = (struct misc_regs *)CONFIG_SPEAR_MISCBASE; + + writel(readl(&misc_p->periph1_clken) & ~MISC_ETHENB, + &misc_p->periph1_clken); + + writel(MISC_SYNTH23, &misc_p->gmac_synth_clk); + writel(0x0, &misc_p->gmac_ctr_reg); + + writel(readl(&misc_p->periph1_clken) | MISC_ETHENB, + &misc_p->periph1_clken); + + writel(readl(&misc_p->periph1_rst) | MISC_ETHENB, + &misc_p->periph1_rst); + writel(readl(&misc_p->periph1_rst) & ~MISC_ETHENB, + &misc_p->periph1_rst); +} +#endif + int arch_cpu_init(void) { struct misc_regs *const misc_p = - (struct misc_regs *)CONFIG_SPEAR_MISCBASE; + (struct misc_regs *)CONFIG_SPEAR_MISCBASE; u32 periph1_clken, periph_clk_cfg; +#if defined(CONFIG_ARCH_SPEAR6XX) + mac_init(); +#endif periph1_clken = readl(&misc_p->periph1_clken); #if defined(CONFIG_ARCH_SPEAR3XX) @@ -65,6 +90,16 @@ int arch_cpu_init(void) #endif writel(periph1_clken, &misc_p->periph1_clken); + + /* Early driver initializations */ +#if defined(CONFIG_ST_SMI) + smi_init(); +#endif + +#ifdef CONFIG_ST_EMI + emi_init(); +#endif + return 0; } diff --git a/arch/arm/cpu/arm926ejs/spear/emi.c b/arch/arm/cpu/arm926ejs/spear/emi.c new file mode 100644 index 0000000..3a49410 --- /dev/null +++ b/arch/arm/cpu/arm926ejs/spear/emi.c @@ -0,0 +1,80 @@ +/* + * (C) Copyright 2009 + * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include + +struct cust_emi_para { + unsigned int tap; + unsigned int tsdp; + unsigned int tdpw; + unsigned int tdpr; + unsigned int tdcs; +}; + +/* EMI timing setting of m28w640hc of linux kernel */ +const struct cust_emi_para emi_timing_m28w640hc = { + .tap = 0x10, + .tsdp = 0x05, + .tdpw = 0x0a, + .tdpr = 0x0a, + .tdcs = 0x05, +}; + +/* EMI timing setting of bootrom */ +const struct cust_emi_para emi_timing_bootrom = { + .tap = 0xf, + .tsdp = 0x0, + .tdpw = 0xff, + .tdpr = 0x111, + .tdcs = 0x02, +}; + +void emi_init(void) +{ + const struct cust_emi_para *p = &emi_timing_m28w640hc; + struct emi_regs *emi_regs_p = (struct emi_regs *)CONFIG_SPEAR_EMIBASE; + unsigned int cs; + unsigned int val, tmp; + + val = readl(CONFIG_SPEAR_RASBASE); + + if (val & EMI_ACKMSK) + tmp = 0x3f; + else + tmp = 0x0; + + writel(tmp, &emi_regs_p->ack); + + for (cs = 0; cs < CONFIG_SYS_MAX_FLASH_BANKS; cs++) { + writel(p->tap, &emi_regs_p->bank_regs[cs].tap); + writel(p->tsdp, &emi_regs_p->bank_regs[cs].tsdp); + writel(p->tdpw, &emi_regs_p->bank_regs[cs].tdpw); + writel(p->tdpr, &emi_regs_p->bank_regs[cs].tdpr); + writel(p->tdcs, &emi_regs_p->bank_regs[cs].tdcs); + writel(EMI_CNTL_ENBBYTERW | ((val & 0x18) >> 3), + &emi_regs_p->bank_regs[cs].control); + } +} diff --git a/arch/arm/cpu/arm926ejs/spear/spl.c b/arch/arm/cpu/arm926ejs/spear/spl.c index c0e01ea..16ab82d 100644 --- a/arch/arm/cpu/arm926ejs/spear/spl.c +++ b/arch/arm/cpu/arm926ejs/spear/spl.c @@ -128,41 +128,6 @@ static void pll_init(void) ; } -static void mac_init(void) -{ - struct misc_regs *misc_p = (struct misc_regs *)CONFIG_SPEAR_MISCBASE; - - writel(readl(&misc_p->periph1_clken) & (~PERIPH_GMAC), - &misc_p->periph1_clken); - - writel(SYNTH23, &misc_p->gmac_synth_clk); - - switch (get_socrev()) { - case SOC_SPEAR600_AA: - case SOC_SPEAR600_AB: - case SOC_SPEAR600_BA: - case SOC_SPEAR600_BB: - case SOC_SPEAR600_BC: - case SOC_SPEAR600_BD: - writel(0x0, &misc_p->gmac_ctr_reg); - break; - - case SOC_SPEAR300: - case SOC_SPEAR310: - case SOC_SPEAR320: - writel(0x4, &misc_p->gmac_ctr_reg); - break; - } - - writel(readl(&misc_p->periph1_clken) | PERIPH_GMAC, - &misc_p->periph1_clken); - - writel(readl(&misc_p->periph1_rst) | PERIPH_GMAC, - &misc_p->periph1_rst); - writel(readl(&misc_p->periph1_rst) & (~PERIPH_GMAC), - &misc_p->periph1_rst); -} - static void sys_init(void) { struct misc_regs *misc_p = (struct misc_regs *)CONFIG_SPEAR_MISCBASE; diff --git a/board/st/spear/spear_common.c b/board/st/spear/spear_common.c index 71e9348..f274b6e 100644 --- a/board/st/spear/spear_common.c +++ b/board/st/spear/spear_common.c @@ -25,7 +25,6 @@ #include #include #include -#include #include #include #include @@ -48,80 +47,6 @@ int dram_init(void) return 0; } -int board_early_init_f() -{ -#if defined(CONFIG_ST_SMI) - smi_init(); -#endif - return 0; -} - -#ifdef CONFIG_SPEAR_EMI -struct cust_emi_para { - unsigned int tap; - unsigned int tsdp; - unsigned int tdpw; - unsigned int tdpr; - unsigned int tdcs; -}; - -/* EMI timing setting of m28w640hc of linux kernel */ -const struct cust_emi_para emi_timing_m28w640hc = { - .tap = 0x10, - .tsdp = 0x05, - .tdpw = 0x0a, - .tdpr = 0x0a, - .tdcs = 0x05, -}; - -/* EMI timing setting of bootrom */ -const struct cust_emi_para emi_timing_bootrom = { - .tap = 0xf, - .tsdp = 0x0, - .tdpw = 0xff, - .tdpr = 0x111, - .tdcs = 0x02, -}; - -void spear_emi_init(void) -{ - const struct cust_emi_para *p = &emi_timing_m28w640hc; - struct emi_regs *emi_regs_p = (struct emi_regs *)CONFIG_SPEAR_EMIBASE; - unsigned int cs; - unsigned int val, tmp; - - val = readl(CONFIG_SPEAR_RASBASE); - - if (val & EMI_ACKMSK) - tmp = 0x3f; - else - tmp = 0x0; - - writel(tmp, &emi_regs_p->ack); - - for (cs = 0; cs < CONFIG_SYS_MAX_FLASH_BANKS; cs++) { - writel(p->tap, &emi_regs_p->bank_regs[cs].tap); - writel(p->tsdp, &emi_regs_p->bank_regs[cs].tsdp); - writel(p->tdpw, &emi_regs_p->bank_regs[cs].tdpw); - writel(p->tdpr, &emi_regs_p->bank_regs[cs].tdpr); - writel(p->tdcs, &emi_regs_p->bank_regs[cs].tdcs); - writel(EMI_CNTL_ENBBYTERW | ((val & 0x18) >> 3), - &emi_regs_p->bank_regs[cs].control); - } -} -#endif - -int spear_board_init(ulong mach_type) -{ - /* adress of boot parameters */ - gd->bd->bi_boot_params = CONFIG_BOOT_PARAMS_ADDR; - -#ifdef CONFIG_SPEAR_EMI - spear_emi_init(); -#endif - return 0; -} - #if defined(CONFIG_SPEAR_MACID_IN_I2CMEM) && defined(CONFIG_CMD_NET) && \ defined(CONFIG_CMD_I2C) int i2c_read_mac(uchar *buffer)