From patchwork Thu Nov 1 23:42:01 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [U-Boot, 01/10] arm: Compile cache_disable() with -O2 to avoid failure Date: Thu, 01 Nov 2012 13:42:01 -0000 From: Simon Glass X-Patchwork-Id: 196414 Message-Id: <1351813330-23741-1-git-send-email-sjg@chromium.org> To: U-Boot Mailing List It is good to have these functions written in C instead of assembler, but with -O0 the cache_disable() function doesn't return. Rather than revert to assembler, this fix just forces this to be built with -O2. Signed-off-by: Simon Glass --- arch/arm/lib/cache-cp15.c | 10 ++++++++++ 1 files changed, 10 insertions(+), 0 deletions(-) diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c index 939de10..8f8385d 100644 --- a/arch/arm/lib/cache-cp15.c +++ b/arch/arm/lib/cache-cp15.c @@ -110,6 +110,16 @@ static void cache_enable(uint32_t cache_bit) set_cr(reg | cache_bit); } +/* + * Big hack warning! + * + * Devs like to compile with -O0 to get a nice debugging illusion. But this + * function does not survive that since -O0 causes the compiler to read the + * PC back from the stack after the dcache flush. Might it be possible to fix + * this by flushing the write buffer? + */ +static void cache_disable(uint32_t cache_bit) __attribute__ ((optimize(2))); + /* cache_bit must be either CR_I or CR_C */ static void cache_disable(uint32_t cache_bit) {