From patchwork Wed Oct 31 00:59:31 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 195704 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 38B352C0097 for ; Wed, 31 Oct 2012 13:20:02 +1100 (EST) Received: from localhost ([::1]:36116 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TTMgL-00010z-Cq for incoming@patchwork.ozlabs.org; Tue, 30 Oct 2012 21:01:21 -0400 Received: from eggs.gnu.org ([208.118.235.92]:60725) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TTMfe-0007yj-Dw for qemu-devel@nongnu.org; Tue, 30 Oct 2012 21:00:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TTMfX-0005Gq-FO for qemu-devel@nongnu.org; Tue, 30 Oct 2012 21:00:38 -0400 Received: from cantor2.suse.de ([195.135.220.15]:52334 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TTMfX-0005E3-5N for qemu-devel@nongnu.org; Tue, 30 Oct 2012 21:00:31 -0400 Received: from relay1.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id 54730A3A49; Wed, 31 Oct 2012 02:00:17 +0100 (CET) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Date: Wed, 31 Oct 2012 01:59:31 +0100 Message-Id: <1351645206-3041-1-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.7.10.4 MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4-2.6 X-Received-From: 195.135.220.15 Cc: Eduardo Habkost , Don Slutz , Alexander Graf , Max Filippov , anthony@codemonkey.ws, Igor Mammedov , =?UTF-8?q?Andreas=20F=C3=A4rber?= Subject: [Qemu-devel] [PULL] QOM CPUState patch queue 2012-10-31 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Hello Anthony, This is my current QOM CPUState queue. Please pull. This completes Igor's first step of x86 CPU hotplug roadmap: http://wiki.qemu.org/Features/CPUHotplug CPU-as-a-device is still under review and blocking CPU properties/subclasses; I hope to get that in during the Soft Freeze if no problems arise. Cc: Igor Mammedov Cc: Eduardo Habkost Cc: Don Slutz With Blue and Aurélien having applied sparc/mips prerequisites, I'm including: * CPUState part 4a series (CPU_COMMON -> CPUState field movements), * remaining xtensa and ppc prerequisites, * as well as the remainder of original CPUState part 4 series except for the final bit depending on TLB rework. Cc: Max Filippov Cc: Alexander Graf Regards, Andreas The following changes since commit aee0bf7d8d7564f8f2c40e4501695c492b7dd8d1: tap-win32: stubs to fix win32 build (2012-10-30 19:18:53 +0000) are available in the git repository at: git://github.com/afaerber/qemu-cpu.git qom-cpu for you to fetch changes up to 78585fedbd53b3629150bcf8ab4c9ff32d832460: target-i386: Pass X86CPU to kvm_handle_halt() (2012-10-31 01:02:46 +0100) ---------------------------------------------------------------- Andreas Färber (32): target-i386: Inline APIC cpu_env property setting apic: Store X86CPU in APICCommonState target-i386: Pass X86CPU to cpu_x86_load_seg_cache_sipi() cpus: Pass CPUState to qemu_cpu_is_self() cpus: Pass CPUState to qemu_cpu_kick_thread() cpu: Move created field to CPUState cpu: Move stop field to CPUState ppce500_spin: Store PowerPCCPU in SpinKick cpu: Move stopped field to CPUState cpus: Pass CPUState to cpu_is_stopped() cpus: Pass CPUState to cpu_can_run() cpu: Move halt_cond to CPUState cpus: Pass CPUState to qemu_tcg_cpu_thread_fn cpus: Pass CPUState to qemu_tcg_init_vcpu() ppc: Pass PowerPCCPU to {ppc6xx,ppc970,power7,ppc40x,ppce500}_set_irq() target-ppc: Rename kvm_kick_{env => cpu} and pass PowerPCCPU cpus: Pass CPUState to qemu_cpu_kick() cpu: Move queued_work_{first,last} to CPUState cpus: Pass CPUState to flush_queued_work() cpus: Pass CPUState to qemu_wait_io_event_common() xtensa_pic: Pass XtensaCPU to xtensa_ccompare_cb() target-ppc: Pass PowerPCCPU to powerpc_excp() target-ppc: Pass PowerPCCPU to cpu_ppc_hypercall spapr: Pass PowerPCCPU to spapr_hypercall() spapr: Pass PowerPCCPU to hypercalls cpus: Pass CPUState to [qemu_]cpu_has_work() target-i386: Pass X86CPU to kvm_mce_inject() target-i386: Pass X86CPU to cpu_x86_inject_mce() cpus: Pass CPUState to run_on_cpu() cpu: Move thread_id to CPUState target-i386: Pass X86CPU to kvm_get_mp_state() target-i386: Pass X86CPU to kvm_handle_halt() Igor Mammedov (3): target-i386: cpu_x86_register(): report error from property setter target-i386: If x86_cpu_realize() failed, report error and do cleanup target-i386: Initialize APIC at CPU level cpu-all.h | 4 - cpu-defs.h | 6 -- cpu-exec.c | 8 +- cpus.c | 193 +++++++++++++++++++++++----------------------- exec.c | 10 ++- hw/apic.c | 40 ++++++---- hw/apic_common.c | 5 +- hw/apic_internal.h | 3 +- hw/kvm/apic.c | 8 +- hw/kvmvapic.c | 6 +- hw/pc.c | 56 ++------------ hw/ppc.c | 59 ++++++++------ hw/ppce500_spin.c | 13 ++-- hw/spapr.c | 6 +- hw/spapr.h | 4 +- hw/spapr_hcall.c | 40 ++++++---- hw/spapr_iommu.c | 2 +- hw/spapr_llan.c | 10 +-- hw/spapr_rtas.c | 5 +- hw/spapr_vio.c | 10 +-- hw/spapr_vty.c | 4 +- hw/sun4m.c | 2 +- hw/sun4u.c | 2 +- hw/xics.c | 11 ++- hw/xtensa_pic.c | 9 ++- include/qemu/cpu.h | 58 ++++++++++++++ kvm-all.c | 13 +++- monitor.c | 6 +- qemu-common.h | 2 - target-alpha/cpu.c | 2 +- target-alpha/cpu.h | 4 +- target-arm/cpu.h | 4 +- target-cris/cpu.h | 4 +- target-i386/cpu.c | 63 ++++++++++++++- target-i386/cpu.h | 10 ++- target-i386/helper.c | 16 ++-- target-i386/kvm.c | 28 ++++--- target-lm32/cpu.h | 4 +- target-m68k/cpu.h | 4 +- target-microblaze/cpu.h | 4 +- target-mips/cpu.h | 11 +-- target-openrisc/cpu.h | 4 +- target-ppc/cpu.h | 6 +- target-ppc/excp_helper.c | 40 +++++----- target-ppc/kvm.c | 12 ++- target-s390x/cpu.h | 4 +- target-s390x/kvm.c | 2 +- target-sh4/cpu.h | 4 +- target-sparc/cpu.h | 4 +- target-unicore32/cpu.c | 2 +- target-unicore32/cpu.h | 4 +- target-xtensa/cpu.h | 4 +- 52 Dateien geändert, 501 Zeilen hinzugefügt(+), 334 Zeilen entfernt(-)