Patchwork [SH,committed] PR 54963

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Submitter Oleg Endo
Date Oct. 30, 2012, 9:24 a.m.
Message ID <1351589095.25600.23.camel@yam-132-YW-E178-FTW>
Download mbox | patch
Permalink /patch/195344/
State New
Headers show

Comments

Oleg Endo - Oct. 30, 2012, 9:24 a.m.
Hello,

This is the latest proposed patch from the PR.
Tested on rev 192482 with
make -k check RUNTESTFLAGS="--target_board=sh-sim
\{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}"

and no new failures.
Pre-approved by Kaz in the PR.
Committed as rev 192983.

Cheers,
Oleg

gcc/ChangeLog:

	PR target/54963
	* config/sh/iterators.md (SIDI): New mode iterator.
	* config/sh/sh.md (negdi2): Use parallel around operation and
	T_REG clobber in expander.
	(*negdi2): Mark output operand as early clobbered.
	Add T_REG clobber.  Split after reload.  Simplify split code.
	(abssi2, absdi2): Fold expanders into abs<mode>2.
	(*abssi2, *absdi2): Fold into *abs<mode>2 insn_and_split.
	Split insns before reload.
	(*negabssi2, *negabsdi2): Fold into *negabs<mode>2.
	Add T_REG clobber.  Split insns before reload.
	(negsi_cond): Reformat.  Use emit_move_insn instead of
	gen_movesi.
	(negdi_cond): Reformat.  Use emit_move_insn instead of a pair
	of gen_movsi.  Split insn before reload.

Patch

Index: gcc/config/sh/sh.md
===================================================================
--- gcc/config/sh/sh.md	(revision 192482)
+++ gcc/config/sh/sh.md	(working copy)
@@ -5177,28 +5177,25 @@ 
 ;; Don't expand immediately because otherwise neg:DI (abs:DI) will not be
 ;; combined.
 (define_expand "negdi2"
-  [(set (match_operand:DI 0 "arith_reg_dest" "")
-	(neg:DI (match_operand:DI 1 "arith_reg_operand" "")))
-   (clobber (reg:SI T_REG))]
-  "TARGET_SH1"
-  "")
+  [(parallel [(set (match_operand:DI 0 "arith_reg_dest")
+		   (neg:DI (match_operand:DI 1 "arith_reg_operand")))
+	      (clobber (reg:SI T_REG))])]
+  "TARGET_SH1")
 
 (define_insn_and_split "*negdi2"
-  [(set (match_operand:DI 0 "arith_reg_dest" "=r")
-	(neg:DI (match_operand:DI 1 "arith_reg_operand" "r")))]
+  [(set (match_operand:DI 0 "arith_reg_dest" "=&r")
+	(neg:DI (match_operand:DI 1 "arith_reg_operand" "r")))
+   (clobber (reg:SI T_REG))]
   "TARGET_SH1"
   "#"
-  "TARGET_SH1"
+  "&& reload_completed"
   [(const_int 0)]
 {
-  rtx low_src = gen_lowpart (SImode, operands[1]);
-  rtx high_src = gen_highpart (SImode, operands[1]);
-  rtx low_dst = gen_lowpart (SImode, operands[0]);
-  rtx high_dst = gen_highpart (SImode, operands[0]);
-
   emit_insn (gen_clrt ());
-  emit_insn (gen_negc (low_dst, low_src));
-  emit_insn (gen_negc (high_dst, high_src));
+  emit_insn (gen_negc (gen_lowpart (SImode, operands[0]),
+		       gen_lowpart (SImode, operands[1])));
+  emit_insn (gen_negc (gen_highpart (SImode, operands[0]),
+		       gen_highpart (SImode, operands[1])));
   DONE;
 })
 
@@ -5272,38 +5269,53 @@ 
 		(const_int -1)))]
   "TARGET_SHMEDIA" "")
 
-(define_expand "abssi2"
-  [(set (match_operand:SI 0 "arith_reg_dest" "")
-  	(abs:SI (match_operand:SI 1 "arith_reg_operand" "")))
+(define_expand "abs<mode>2"
+  [(parallel [(set (match_operand:SIDI 0 "arith_reg_dest")
+		   (abs:SIDI (match_operand:SIDI 1 "arith_reg_operand")))
+	      (clobber (reg:SI T_REG))])]
+  "TARGET_SH1")
+
+(define_insn_and_split "*abs<mode>2"
+  [(set (match_operand:SIDI 0 "arith_reg_dest")
+  	(abs:SIDI (match_operand:SIDI 1 "arith_reg_operand")))
    (clobber (reg:SI T_REG))]
   "TARGET_SH1"
-  "")
-
-(define_insn_and_split "*abssi2"
-  [(set (match_operand:SI 0 "arith_reg_dest" "=r")
-  	(abs:SI (match_operand:SI 1 "arith_reg_operand" "r")))]
-  "TARGET_SH1"
   "#"
-  "TARGET_SH1"
+  "&& can_create_pseudo_p ()"
   [(const_int 0)]
 {
-  emit_insn (gen_cmpgesi_t (operands[1], const0_rtx));
-  emit_insn (gen_negsi_cond (operands[0], operands[1], operands[1],
-		 const1_rtx));
+  if (<MODE>mode == SImode)
+    emit_insn (gen_cmpgesi_t (operands[1], const0_rtx));
+  else
+    {
+      rtx high_src = gen_highpart (SImode, operands[1]);
+      emit_insn (gen_cmpgesi_t (high_src, const0_rtx));
+    }
+
+  emit_insn (gen_neg<mode>_cond (operands[0], operands[1], operands[1],
+				 const1_rtx));
   DONE;
 })
 
-(define_insn_and_split "*negabssi2"
-  [(set (match_operand:SI 0 "arith_reg_dest" "=r")
-  	(neg:SI (abs:SI (match_operand:SI 1 "arith_reg_operand" "r"))))]
+(define_insn_and_split "*negabs<mode>2"
+  [(set (match_operand:SIDI 0 "arith_reg_dest")
+	(neg:SIDI (abs:SIDI (match_operand:SIDI 1 "arith_reg_operand"))))
+   (clobber (reg:SI T_REG))]
   "TARGET_SH1"
   "#"
-  "TARGET_SH1"
+  "&& can_create_pseudo_p ()"
   [(const_int 0)]
 {
-  emit_insn (gen_cmpgesi_t (operands[1], const0_rtx));
-  emit_insn (gen_negsi_cond (operands[0], operands[1], operands[1],
-		 const0_rtx));
+  if (<MODE>mode == SImode)
+    emit_insn (gen_cmpgesi_t (operands[1], const0_rtx));
+  else
+    {
+      rtx high_src = gen_highpart (SImode, operands[1]);
+      emit_insn (gen_cmpgesi_t (high_src, const0_rtx));
+    }
+
+  emit_insn (gen_neg<mode>_cond (operands[0], operands[1], operands[1],
+				 const0_rtx));
   DONE;
 })
 
@@ -5316,10 +5328,10 @@ 
 
 (define_insn_and_split "negsi_cond"
   [(set (match_operand:SI 0 "arith_reg_dest" "=r,r")
-	(if_then_else:SI (eq:SI (reg:SI T_REG)
-			  (match_operand:SI 3 "const_int_operand" "M,N"))
-	 (match_operand:SI 1 "arith_reg_operand" "0,0")
-	 (neg:SI (match_operand:SI 2 "arith_reg_operand" "r,r"))))]
+	(if_then_else
+	  (eq:SI (reg:SI T_REG) (match_operand:SI 3 "const_int_operand" "M,N"))
+	  (match_operand:SI 1 "arith_reg_operand" "0,0")
+	  (neg:SI (match_operand:SI 2 "arith_reg_operand" "r,r"))))]
   "TARGET_SH1 && TARGET_ZDCBRANCH"
 {
   static const char* alt[] =
@@ -5339,7 +5351,7 @@ 
 {
   rtx skip_neg_label = gen_label_rtx ();
 
-  emit_insn (gen_movsi (operands[0], operands[1]));
+  emit_move_insn (operands[0], operands[1]);
 
   emit_jump_insn (INTVAL (operands[3])
 		  ? gen_branch_true (skip_neg_label)
@@ -5352,63 +5364,21 @@ 
   [(set_attr "type" "arith") ;; poor approximation
    (set_attr "length" "4")])
 
-(define_expand "absdi2"
-  [(set (match_operand:DI 0 "arith_reg_dest" "")
-	(abs:DI (match_operand:DI 1 "arith_reg_operand" "")))
+(define_insn_and_split "negdi_cond"
+  [(set (match_operand:DI 0 "arith_reg_dest")
+	(if_then_else
+	  (eq:SI (reg:SI T_REG) (match_operand:SI 3 "const_int_operand"))
+	  (match_operand:DI 1 "arith_reg_operand")
+	  (neg:DI (match_operand:DI 2 "arith_reg_operand"))))
    (clobber (reg:SI T_REG))]
   "TARGET_SH1"
-  "")
-
-(define_insn_and_split "*absdi2"
-  [(set (match_operand:DI 0 "arith_reg_dest" "=r")
-	(abs:DI (match_operand:DI 1 "arith_reg_operand" "r")))]
-  "TARGET_SH1"
   "#"
-  "&& reload_completed"
+  "&& can_create_pseudo_p ()"
   [(const_int 0)]
 {
-  rtx high_src = gen_highpart (SImode, operands[1]);
-  emit_insn (gen_cmpgesi_t (high_src, const0_rtx));
-  emit_insn (gen_negdi_cond (operands[0], operands[1], operands[1],
-			     const1_rtx));
-  DONE;
-})
-
-(define_insn_and_split "*negabsdi2"
-  [(set (match_operand:DI 0 "arith_reg_dest" "=r")
-  	(neg:DI (abs:DI (match_operand:DI 1 "arith_reg_operand" "r"))))]
-  "TARGET_SH1"
-  "#"
-  "&& reload_completed"
-  [(const_int 0)]
-{
-  rtx high_src = gen_highpart (SImode, operands[1]);
-  emit_insn (gen_cmpgesi_t (high_src, const0_rtx));
-  emit_insn (gen_negdi_cond (operands[0], operands[1], operands[1],
-			     const0_rtx));
-  DONE;
-})
-
-(define_insn_and_split "negdi_cond"
-  [(set (match_operand:DI 0 "arith_reg_dest" "=r,r")
-	(if_then_else:DI (eq:SI (reg:SI T_REG)
-				(match_operand:SI 3 "const_int_operand" "M,N"))
-	 (match_operand:DI 1 "arith_reg_operand" "r,r")
-	 (neg:DI (match_operand:DI 2 "arith_reg_operand" "1,1"))))]
-  "TARGET_SH1"
-  "#"
-  "TARGET_SH1"
-  [(const_int 0)]
-{
-  rtx low_src = gen_lowpart (SImode, operands[1]);
-  rtx high_src = gen_highpart (SImode, operands[1]);
-  rtx low_dst = gen_lowpart (SImode, operands[0]);
-  rtx high_dst = gen_highpart (SImode, operands[0]);
-
   rtx skip_neg_label = gen_label_rtx ();
 
-  emit_insn (gen_movsi (low_dst, low_src));
-  emit_insn (gen_movsi (high_dst, high_src));
+  emit_move_insn (operands[0], operands[1]);
 
   emit_jump_insn (INTVAL (operands[3]) 
 		  ? gen_branch_true (skip_neg_label)
@@ -5417,8 +5387,11 @@ 
   if (!INTVAL (operands[3]))
     emit_insn (gen_clrt ());
 
-  emit_insn (gen_negc (low_dst, low_src));
-  emit_label_after (skip_neg_label, emit_insn (gen_negc (high_dst, high_src)));
+  emit_insn (gen_negc (gen_lowpart (SImode, operands[0]),
+		       gen_lowpart (SImode, operands[1])));
+  emit_label_after (skip_neg_label,
+		    emit_insn (gen_negc (gen_highpart (SImode, operands[0]),
+					 gen_highpart (SImode, operands[1]))));
   DONE;
 })
 
Index: gcc/config/sh/iterators.md
===================================================================
--- gcc/config/sh/iterators.md	(revision 192482)
+++ gcc/config/sh/iterators.md	(working copy)
@@ -22,6 +22,7 @@ 
 (define_mode_iterator QIHISI [QI HI SI])
 (define_mode_iterator QIHI [QI HI])
 (define_mode_iterator HISI [HI SI])
+(define_mode_iterator SIDI [SI DI])
 
 ;; Mode attributes that can be used as the instruction suffix for mode
 ;; variant instructions.