From patchwork Tue Oct 30 03:25:07 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 195279 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id B68CB2C00A4 for ; Tue, 30 Oct 2012 15:19:22 +1100 (EST) Received: from localhost ([::1]:54104 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TT2Re-0001il-3K for incoming@patchwork.ozlabs.org; Mon, 29 Oct 2012 23:24:50 -0400 Received: from eggs.gnu.org ([208.118.235.92]:40359) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TT2R1-0008Sb-Aw for qemu-devel@nongnu.org; Mon, 29 Oct 2012 23:24:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TT2Qu-0001Mf-K1 for qemu-devel@nongnu.org; Mon, 29 Oct 2012 23:24:11 -0400 Received: from ozlabs.org ([203.10.76.45]:34407) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TT2Qt-0001LH-W5; Mon, 29 Oct 2012 23:24:04 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 15FE92C00B1; Tue, 30 Oct 2012 14:23:58 +1100 (EST) From: David Gibson To: agraf@suse.de Date: Tue, 30 Oct 2012 14:25:07 +1100 Message-Id: <1351567512-17278-12-git-send-email-david@gibson.dropbear.id.au> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1351567512-17278-1-git-send-email-david@gibson.dropbear.id.au> References: <1351567512-17278-1-git-send-email-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 203.10.76.45 Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Subject: [Qemu-devel] [PATCH 11/16] pseries: Split xics irq configuration from state information X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Currently the XICS irq controller code has a per-irq state structure which amongst other things includes whether the interrupt is level or message triggered - this is configured by the platform code, and is not directly visible to the guest. This leads to a slightly awkward construct at reset time where we need to reset everything in the state structure _except_ the lsi/msi flag, which needs to retain the information given at platform init time. More importantly this flag will make matching the qemu state to the KVM state for the upcoming in-kernel XICS implementation more awkward. This patch, therefore, removes this flag from the per-irq state structure, instead adding a parallel array giving the lsi/msi configuration per irq. Signed-off-by: David Gibson --- hw/xics.c | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) diff --git a/hw/xics.c b/hw/xics.c index 403afdb..5e20f0f 100644 --- a/hw/xics.c +++ b/hw/xics.c @@ -179,13 +179,13 @@ struct ics_irq_state { #define XICS_STATUS_REJECTED 0x4 #define XICS_STATUS_MASKED_PENDING 0x8 uint8_t status; - bool lsi; }; struct ics_state { int nr_irqs; int offset; qemu_irq *qirqs; + bool *islsi; struct ics_irq_state *irqs; struct icp_state *icp; }; @@ -254,9 +254,8 @@ static void set_irq_lsi(struct ics_state *ics, int srcno, int val) static void ics_set_irq(void *opaque, int srcno, int val) { struct ics_state *ics = (struct ics_state *)opaque; - struct ics_irq_state *irq = ics->irqs + srcno; - if (irq->lsi) { + if (ics->islsi[srcno]) { set_irq_lsi(ics, srcno, val); } else { set_irq_msi(ics, srcno, val); @@ -293,7 +292,7 @@ static void ics_write_xive(struct ics_state *ics, int nr, int server, trace_xics_ics_write_xive(nr, srcno, server, priority); - if (irq->lsi) { + if (ics->islsi[srcno]) { write_xive_lsi(ics, srcno); } else { write_xive_msi(ics, srcno); @@ -314,10 +313,8 @@ static void ics_resend(struct ics_state *ics) int i; for (i = 0; i < ics->nr_irqs; i++) { - struct ics_irq_state *irq = ics->irqs + i; - /* FIXME: filter by server#? */ - if (irq->lsi) { + if (ics->islsi[i]) { resend_lsi(ics, i); } else { resend_msi(ics, i); @@ -332,7 +329,7 @@ static void ics_eoi(struct ics_state *ics, int nr) trace_xics_ics_eoi(nr); - if (irq->lsi) { + if (ics->islsi[srcno]) { irq->status &= ~XICS_STATUS_SENT; } } @@ -354,7 +351,7 @@ void xics_set_irq_type(struct icp_state *icp, int irq, bool lsi) { assert(ics_valid_irq(icp->ics, irq)); - icp->ics->irqs[irq - icp->ics->offset].lsi = lsi; + icp->ics->islsi[irq - icp->ics->offset] = lsi; } static target_ulong h_cppr(CPUPPCState *env, sPAPREnvironment *spapr, @@ -515,10 +512,8 @@ static void xics_reset(void *opaque) qemu_set_irq(icp->ss[i].output, 0); } + memset(ics->irqs, 0, sizeof(struct ics_irq_state) * ics->nr_irqs); for (i = 0; i < ics->nr_irqs; i++) { - /* Reset everything *except* the type */ - ics->irqs[i].server = 0; - ics->irqs[i].status = 0; ics->irqs[i].priority = 0xff; ics->irqs[i].saved_priority = 0xff; } @@ -559,6 +554,7 @@ struct icp_state *xics_system_init(int nr_servers, int nr_irqs) ics->nr_irqs = nr_irqs; ics->offset = XICS_IRQ_BASE; ics->irqs = g_malloc0(nr_irqs * sizeof(struct ics_irq_state)); + ics->islsi = g_malloc0(nr_irqs * sizeof(bool)); icp->ics = ics; ics->icp = icp;