From patchwork Mon Oct 29 23:10:34 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 195143 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 381742C008C for ; Tue, 30 Oct 2012 10:10:48 +1100 (EST) Comment: DKIM? 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Lu" To: Vladimir Makarov Cc: GCC Patches , rdsandiford@googlemail.com X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org On Mon, Oct 29, 2012 at 9:38 AM, Vladimir Makarov wrote: > On 12-10-29 12:21 PM, Richard Sandiford wrote: >> >> Vladimir Makarov writes: >>> >>> H.J. in >>> >>> http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55116 >>> >>> reported an interesting address >>> >>> (and:DI (subreg:DI (plus:SI (ashift:SI (reg:SI 96 [ glob_vol_int.22 ]) >>> (const_int 2 [0x2])) >>> (symbol_ref:SI ("glob_vol_int_arr") >> 0x7ffff03c2720 glob_vol_int_arr>)) 0) >>> (const_int 4294967295 [0xffffffff])) >>> >>> which can not be correctly extracted. Here `and' with `subreg' >>> behaves as an address mutation. >>> >>> The following patch fixes the problem. >>> >>> Ok to commit, Richard? >> >> Heh, I wondered if subregs might still be used like that, and was almost >> tempted to add them just in case. >> >> I think this particular case is really a failed canonicalisation and that: >> >> (and:DI (subreg:DI (foo:SI ...) 0) (const_int 0xffffffff)) >> >> ought to be: >> >> (zero_extend:DI (foo:SI ...)) > > Yes, that was my thought too. > >> But I know I've approved MIPS patches to accept >> (and:DI ... (const_int 0xffffffff)) as an alternative. >> >>> Index: rtlanal.c >>> =================================================================== >>> --- rtlanal.c (revision 192942) >>> +++ rtlanal.c (working copy) >>> @@ -5459,6 +5459,11 @@ strip_address_mutations (rtx *loc, enum >>> else if (code == AND && CONST_INT_P (XEXP (*loc, 1))) >>> /* (and ... (const_int -X)) is used to align to X bytes. */ >>> loc = &XEXP (*loc, 0); >>> + else if (code == SUBREG >>> + && ! REG_P (XEXP (*loc, 0)) && ! MEM_P (XEXP (*loc, 0))) >>> + /* (subreg (operator ...) ...) usually inside and is used for >>> + mode conversion too. */ >>> + loc = &XEXP (*loc, 0); >> >> I think the condition should be: >> >> else if (code == SUBREG >> && !OBJECT_P (SUBREG_REG (*loc)) >> && subreg_lowpart (*loc)) >> >> OK with that change, if it works. >> > Yes, it works. > I've submitted the following patch. > I checked in this testcase. Thanks. Index: ChangeLog =================================================================== --- ChangeLog (revision 192966) +++ ChangeLog (working copy) @@ -1,3 +1,8 @@ +2012-10-29 H.J. Lu + + PR middle-end/55116 + * gcc.target/i386/pr55116.c: New file. + 2012-10-29 Manuel López-Ibáñez PR c/53066 Index: gcc.target/i386/pr55116.c =================================================================== --- gcc.target/i386/pr55116.c (revision 0) +++ gcc.target/i386/pr55116.c (working copy) @@ -0,0 +1,11 @@ +/* { dg-do compile { target { ! { ia32 } } } } */ +/* { dg-options "-O2 -mx32 -maddress-mode=long" } */ + +int glob_int_arr[100]; +int glob_int = 4; + +void +expr_global (void) +{ + __builtin_prefetch (glob_int_arr + glob_int, 0, 0); +}