From patchwork Mon Oct 29 15:23:49 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 195050 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id DF7A42C0085 for ; Tue, 30 Oct 2012 02:32:47 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8FDCA4A302; Mon, 29 Oct 2012 16:29:02 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id oL27BdgL5MlN; Mon, 29 Oct 2012 16:29:02 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 745D04A020; Mon, 29 Oct 2012 16:25:21 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 997E14A097 for ; Mon, 29 Oct 2012 16:25:11 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id hbBalEKyZgsn for ; Mon, 29 Oct 2012 16:25:05 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-vc0-f202.google.com (mail-vc0-f202.google.com [209.85.220.202]) by theia.denx.de (Postfix) with ESMTPS id 53C064A087 for ; Mon, 29 Oct 2012 16:24:25 +0100 (CET) Received: by mail-vc0-f202.google.com with SMTP id fy27so648035vcb.3 for ; Mon, 29 Oct 2012 08:24:20 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=Sb2XXOyivv5zcPhBCsZh/REa7sI90CXLiWaL2zKlN/E=; b=AKNBJhDgfNTypl87HcbpvNCpQWJZqfzdQEg5liYKfzAp/sYY3bsKPD53kYI3t4mKGR Ni2jwe0z8m5gxUCcuqutWu7PnjT0k6TQQZZa51Al5J1/H0tq6P6rOXcEsQCTpaIE1zI1 dRlvvmPtnUK/SzueIY5hi+Rg9Gi4Ix1QktD7qmGh6zSvVUkDXGkRCvH7R7QIeCP0uEZQ 2FV+KmoWEstVF6xi8coDviN8HmbQN5LoFXZG7+RlWiz8bFb3ujTU1a1zV1zq0Lftg4tc 1xSdQ+tVRQjpstsOE1221AWJzrKluepaYj7JPiYXDTCmWZj4Pb3kqNQf4SjPexkFcJPR GaUg== Received: by 10.236.175.7 with SMTP id y7mr21636027yhl.14.1351524260196; Mon, 29 Oct 2012 08:24:20 -0700 (PDT) Received: from wpzn4.hot.corp.google.com (216-239-44-65.google.com [216.239.44.65]) by gmr-mx.google.com with ESMTPS id l20si713955yhi.2.2012.10.29.08.24.20 (version=TLSv1/SSLv3 cipher=AES128-SHA); Mon, 29 Oct 2012 08:24:20 -0700 (PDT) Received: from kaka.mtv.corp.google.com (kaka.mtv.corp.google.com [172.22.73.79]) by wpzn4.hot.corp.google.com (Postfix) with ESMTP id 1B8FE1E0048; Mon, 29 Oct 2012 08:24:20 -0700 (PDT) Received: by kaka.mtv.corp.google.com (Postfix, from userid 121222) id CE317160E84; Mon, 29 Oct 2012 08:24:19 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Date: Mon, 29 Oct 2012 08:23:49 -0700 Message-Id: <1351524245-19584-7-git-send-email-sjg@chromium.org> X-Mailer: git-send-email 1.7.7.3 In-Reply-To: <1351524245-19584-1-git-send-email-sjg@chromium.org> References: <1351524245-19584-1-git-send-email-sjg@chromium.org> X-Gm-Message-State: ALoCoQmzrrpnrFJzPu6A3XjisTTAddE52W3L4oEMpBf5n3CAKpDh7FRPqgxC0qRVfnwicooOq9RAWeTwLaMTm8I1tfHH0cm3xv+JDk6AT74tx8NN5E4slDLpdjNys0T8dcJ4ddF4cmsFzJTtazupDrbhNYsRr64GtpkX2DlEH7d4Y5A45fwnYelHdLOOnIydlS6xo3PF8zPS Cc: Tom Rini , Stefan Reinauer , Rob Herring Subject: [U-Boot] [PATCH v3 06/22] ahci: Optimise AHCI controller reset and start-up X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Stefan Reinauer The existing code waits a whole second for the AHCI controller to reset. Instead, let's poll the status register to see if the reset has succeeded and return earlier if possible. This brings down the time for AHCI probing from 1s to 20ms. Signed-off-by: Stefan Reinauer Signed-off-by: Simon Glass --- drivers/block/ahci.c | 24 +++++++++++++++--------- 1 files changed, 15 insertions(+), 9 deletions(-) diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c index d94da1f..ad397dc 100644 --- a/drivers/block/ahci.c +++ b/drivers/block/ahci.c @@ -110,13 +110,15 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent) /* reset must complete within 1 second, or * the hardware should be considered fried. */ - ssleep(1); - - tmp = readl(mmio + HOST_CTL); - if (tmp & HOST_RESET) { - debug("controller reset failed (0x%x)\n", tmp); - return -1; - } + i = 1000; + do { + udelay(1000); + tmp = readl(mmio + HOST_CTL); + if (!i--) { + debug("controller reset failed (0x%x)\n", tmp); + return -1; + } + } while (tmp & HOST_RESET); writel_with_flush(HOST_AHCI_EN, mmio + HOST_CTL); writel(cap_save, mmio + HOST_CAP); @@ -164,13 +166,17 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent) writel(PORT_CMD_SPIN_UP, port_mmio + PORT_CMD); j = 0; - while (j < 100) { - msleep(10); + while (j < 1000) { tmp = readl(port_mmio + PORT_SCR_STAT); if ((tmp & 0xf) == 0x3) break; + udelay(1000); j++; } + if (j == 1000) + debug("timeout.\n"); + else + debug("ok.\n"); tmp = readl(port_mmio + PORT_SCR_ERR); debug("PORT_SCR_ERR 0x%x\n", tmp);