From patchwork Mon Oct 29 10:25:52 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 194960 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id E63902C0089 for ; Mon, 29 Oct 2012 21:46:46 +1100 (EST) Received: from localhost ([::1]:46186 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TSmYy-0001Xk-Cc for incoming@patchwork.ozlabs.org; Mon, 29 Oct 2012 06:27:20 -0400 Received: from eggs.gnu.org ([208.118.235.92]:44433) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TSmY7-00085W-Sc for qemu-devel@nongnu.org; Mon, 29 Oct 2012 06:26:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TSmXx-0007ZV-7k for qemu-devel@nongnu.org; Mon, 29 Oct 2012 06:26:27 -0400 Received: from cantor2.suse.de ([195.135.220.15]:50632 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TSmXx-0007ZR-1T; Mon, 29 Oct 2012 06:26:17 -0400 Received: from relay1.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id 8C2B2A0FED; Mon, 29 Oct 2012 11:26:16 +0100 (CET) From: Alexander Graf To: qemu-devel qemu-devel Date: Mon, 29 Oct 2012 11:25:52 +0100 Message-Id: <1351506371-23632-4-git-send-email-agraf@suse.de> X-Mailer: git-send-email 1.6.0.2 In-Reply-To: <1351506371-23632-1-git-send-email-agraf@suse.de> References: <1351506371-23632-1-git-send-email-agraf@suse.de> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4-2.6 X-Received-From: 195.135.220.15 Cc: Blue Swirl , "qemu-ppc@nongnu.org List" , Aurelien Jarno Subject: [Qemu-devel] [PATCH 03/22] PPC: 440: Emulate DCBR0 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The DCBR0 register on 440 is used to implement system reset. The same register is used on 405 as well, so just reuse the code. Signed-off-by: Alexander Graf --- target-ppc/translate_init.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index a972287..ad54985 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -1498,7 +1498,7 @@ static void gen_spr_BookE (CPUPPCState *env, uint64_t ivor_mask) /* XXX : not implemented */ spr_register(env, SPR_BOOKE_DBCR0, "DBCR0", SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, + &spr_read_generic, &spr_write_40x_dbcr0, 0x00000000); /* XXX : not implemented */ spr_register(env, SPR_BOOKE_DBCR1, "DBCR1",