From patchwork Mon Oct 29 01:34:37 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Crosthwaite X-Patchwork-Id: 194781 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 23B282C00A7 for ; Mon, 29 Oct 2012 13:11:49 +1100 (EST) Received: from localhost ([::1]:59367 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TSeGc-00038E-Ua for incoming@patchwork.ozlabs.org; Sun, 28 Oct 2012 21:35:50 -0400 Received: from eggs.gnu.org ([208.118.235.92]:53110) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TSeG8-0002NC-N8 for qemu-devel@nongnu.org; Sun, 28 Oct 2012 21:35:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TSeG7-0003qR-99 for qemu-devel@nongnu.org; Sun, 28 Oct 2012 21:35:20 -0400 Received: from mail-da0-f45.google.com ([209.85.210.45]:35338) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TSeG7-0003pW-3G for qemu-devel@nongnu.org; Sun, 28 Oct 2012 21:35:19 -0400 Received: by mail-da0-f45.google.com with SMTP id n15so2040481dad.4 for ; Sun, 28 Oct 2012 18:35:18 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:in-reply-to:references:x-gm-message-state; bh=4LCav48/w413Ha/8c481HWd7JmQNlHEQWjgzVb/TtaM=; b=CL9YW9RxAqgiWGqV5A/IxZHqLV18fnMUHpCt39VDkiTpSUZgFPWZmIQ+4BR5PhxPzh SBNB3/KjrdvNR31DIXGi4/9zZyk84tqbXjoh+8BYdg4kyL5KjYf2dE3z+MD5DVcqzKp2 ceNEO5vXZ34N9+oe4Gu8z5iul930ZXHy4OSSCSYKzacLCxOMOKWS1AWg0mdS/KGTKBxw llo3Gb9WGmZbY8g9qPvoVrJlYhVOka+5wEtQNVaj0VLKkzoy1f4G8o7VNqYACYi+606A pC0Wbg6774rijyx2N8JpaVs7aX66iLN+zNqmFcLtD13H3a37ZPFvqD+ww6sQj/TS08gr ShVw== Received: by 10.66.81.138 with SMTP id a10mr79232925pay.53.1351474518713; Sun, 28 Oct 2012 18:35:18 -0700 (PDT) Received: from localhost ([124.148.20.9]) by mx.google.com with ESMTPS id ht5sm5081867pbc.18.2012.10.28.18.35.15 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 28 Oct 2012 18:35:18 -0700 (PDT) From: Peter Crosthwaite To: qemu-devel@nongnu.org Date: Mon, 29 Oct 2012 11:34:37 +1000 Message-Id: <2db4e6717385b7d957b9c10653587e8c5cb630e0.1351473902.git.peter.crosthwaite@xilinx.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: References: In-Reply-To: References: X-Gm-Message-State: ALoCoQlzttnKEFu6J2OEM+RJPwzKiEUpafwJ4sl4ignpoZiAknUQP1wLAZ45Jc02KK/Nas/67oT/ X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.210.45 Cc: vineshp@xilinx.com, peter.maydell@linaro.org, Peter Crosthwaite , john.williams@xilinx.com, kraxel@redhat.com, edgar.iglesias@gmail.com, afaerber@suse.de Subject: [Qemu-devel] [PATCH v3 6/8] usb/ehci: Add Sysbus variant and Xilinx Zynq USB X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Add QOM class definition helpers for sysbus attached EHCI implementations and added Xilinx Zynq USB implementation. Signed-off-by: Peter Crosthwaite --- changed from v2: Squashed Xilinx zynq Defintion into this patch. Otherwise complie fails due to werror and unsued ehci_sysbus_class_init fn. Duplicated state struct (as EHCISysBusState) - no more union. changed from v1: Dont create a QOM definition for Sysbus EHCI, rather just add all the bits and pieces. (Multiple) sysbus EHCI defs can be created by adding to the type_info[] table. Use dma_context_memory for sysbus DMA (PMM review) hw/usb/hcd-ehci.c | 65 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 65 insertions(+), 0 deletions(-) diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c index df224b2..7948146 100644 --- a/hw/usb/hcd-ehci.c +++ b/hw/usb/hcd-ehci.c @@ -35,6 +35,8 @@ #include "trace.h" #include "dma.h" #include "sysemu.h" +#include "hw/sysbus.h" +#include "exec-memory.h" #define EHCI_DEBUG 0 @@ -450,6 +452,11 @@ typedef struct EHCIPCIState { EHCIState ehci; } EHCIPCIState; +typedef struct EHCISysBusState { + SysBusDevice busdev; + EHCIState ehci; +} EHCISysBusState; + #define SET_LAST_RUN_CLOCK(s) \ (s)->last_run_ns = qemu_get_clock_ns(vm_clock); @@ -2544,6 +2551,7 @@ static const MemoryRegionOps ehci_mmio_port_ops = { }; static int usb_ehci_pci_initfn(PCIDevice *dev); +static int usb_ehci_sysbus_initfn(SysBusDevice *dev); static USBPortOps ehci_port_ops = { .attach = ehci_attach, @@ -2650,11 +2658,26 @@ static const VMStateDescription vmstate_ehci_pci = { } }; +static const VMStateDescription vmstate_ehci_sysbus = { + .name = "ehci-sysbus", + .version_id = 2, + .minimum_version_id = 1, + .fields = (VMStateField[]) { + VMSTATE_STRUCT(ehci, EHCISysBusState, 2, vmstate_ehci, EHCIState), + VMSTATE_END_OF_LIST() + } +}; + static Property ehci_pci_properties[] = { DEFINE_PROP_UINT32("maxframes", EHCIPCIState, ehci.maxframes, 128), DEFINE_PROP_END_OF_LIST(), }; +static Property ehci_sysbus_properties[] = { + DEFINE_PROP_UINT32("maxframes", EHCISysBusState, ehci.maxframes, 128), + DEFINE_PROP_END_OF_LIST(), +}; + typedef struct EHCIInfo { uint16_t capabase; uint16_t opregbase; @@ -2665,6 +2688,11 @@ typedef struct EHCIPCIClass { EHCIInfo ehci; } EHCIPCIClass; +typedef struct EHCISysBusClass { + SysBusDeviceClass sdc; + EHCIInfo ehci; +} EHCISysBusClass; + static void ehci_pci_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); @@ -2681,6 +2709,18 @@ static void ehci_pci_class_init(ObjectClass *klass, void *data) dc->props = ehci_pci_properties; } +static void ehci_sysbus_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + EHCISysBusClass *k = (EHCISysBusClass *)klass; + EHCISysBusClass *template = data; + + k->sdc.init = usb_ehci_sysbus_initfn; + k->ehci = template->ehci; + dc->vmsd = &vmstate_ehci_sysbus; + dc->props = ehci_sysbus_properties; +} + static TypeInfo ehci_info[] = { { .name = "usb-ehci", @@ -2708,6 +2748,16 @@ static TypeInfo ehci_info[] = { .ehci.capabase = 0x0, .ehci.opregbase = 0x20, } } + }, { + .name = "xlnx,ps7-usb", + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(EHCISysBusState), + .class_init = ehci_sysbus_class_init, + .class_size = sizeof(EHCISysBusClass), + .class_data = (EHCISysBusClass[]) {{ + .ehci.capabase = 0x100, + .ehci.opregbase = 0x140, + } } }, }; @@ -2761,6 +2811,21 @@ static void usb_ehci_initfn(EHCIState *s, DeviceState *dev, EHCIInfo *ei) &s->mem_ports); } +static int usb_ehci_sysbus_initfn(SysBusDevice *dev) +{ + EHCISysBusState *i = FROM_SYSBUS(EHCISysBusState, dev); + EHCISysBusClass *c = (EHCISysBusClass *)object_get_class(OBJECT(dev)); + EHCIState *s = &i->ehci; + + s->dma = &dma_context_memory; + + usb_ehci_initfn(s, DEVICE(dev), &c->ehci); + sysbus_init_irq(dev, &s->irq); + sysbus_init_mmio(dev, &s->mem); + + return 0; +} + static int usb_ehci_pci_initfn(PCIDevice *dev) { EHCIPCIState *i = DO_UPCAST(EHCIPCIState, pcidev, dev);