Patchwork [4/5] target-xtensa: avoid using cpu_single_env

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Submitter Blue Swirl
Date Oct. 28, 2012, 3:03 p.m.
Message ID <2134135d337e4836e51e5507d126eb837b593a79.1351436501.git.blauwirbel@gmail.com>
Download mbox | patch
Permalink /patch/194711/
State New
Headers show

Comments

Blue Swirl - Oct. 28, 2012, 3:03 p.m.
Pass around CPUState instead of using global cpu_single_env.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
---
 target-xtensa/translate.c |   10 +++++-----
 1 files changed, 5 insertions(+), 5 deletions(-)
Max Filippov - Oct. 29, 2012, 5:58 a.m.
On Sun, Oct 28, 2012 at 7:03 PM, Blue Swirl <blauwirbel@gmail.com> wrote:
> Pass around CPUState instead of using global cpu_single_env.
>
> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
> ---
>  target-xtensa/translate.c |   10 +++++-----
>  1 files changed, 5 insertions(+), 5 deletions(-)

Acked-by: Max Filippov <jcmvbkbc@gmail.com>
Andreas Färber - Oct. 31, 2012, 3:28 a.m.
Am 28.10.2012 16:03, schrieb Blue Swirl:
> Pass around CPUState instead of using global cpu_single_env.
> 
> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
> ---
>  target-xtensa/translate.c |   10 +++++-----
>  1 files changed, 5 insertions(+), 5 deletions(-)

Reviewed-by: Andreas Färber <afaerber@suse.de>

ditto about "CPUState".

Andreas

Patch

diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index 82e8ccc..3c03775 100644
--- a/target-xtensa/translate.c
+++ b/target-xtensa/translate.c
@@ -810,7 +810,7 @@  static TCGv_i32 gen_mac16_m(TCGv_i32 v, bool hi, bool is_unsigned)
     return m;
 }
 
-static void disas_xtensa_insn(DisasContext *dc)
+static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc)
 {
 #define HAS_OPTION_BITS(opt) do { \
         if (!option_bits_enabled(dc, opt)) { \
@@ -900,8 +900,8 @@  static void disas_xtensa_insn(DisasContext *dc)
 
 #define RSR_SR (b1)
 
-    uint8_t b0 = cpu_ldub_code(cpu_single_env, dc->pc);
-    uint8_t b1 = cpu_ldub_code(cpu_single_env, dc->pc + 1);
+    uint8_t b0 = cpu_ldub_code(env, dc->pc);
+    uint8_t b1 = cpu_ldub_code(env, dc->pc + 1);
     uint8_t b2 = 0;
 
     static const uint32_t B4CONST[] = {
@@ -917,7 +917,7 @@  static void disas_xtensa_insn(DisasContext *dc)
         HAS_OPTION(XTENSA_OPTION_CODE_DENSITY);
     } else {
         dc->next_pc = dc->pc + 3;
-        b2 = cpu_ldub_code(cpu_single_env, dc->pc + 2);
+        b2 = cpu_ldub_code(env, dc->pc + 2);
     }
 
     switch (OP0) {
@@ -2931,7 +2931,7 @@  static void gen_intermediate_code_internal(
             gen_ibreak_check(env, &dc);
         }
 
-        disas_xtensa_insn(&dc);
+        disas_xtensa_insn(env, &dc);
         ++insn_count;
         if (dc.icount) {
             tcg_gen_mov_i32(cpu_SR[ICOUNT], dc.next_icount);