Patchwork Ping / update: RFA: replace #ifdef with if/#if for HAVE_ATTR_*

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Submitter Joern Rennecke
Date Oct. 28, 2012, 1:04 a.m.
Message ID <20121027210440.hv4e56gco4wgksc4-nzlynne@webmail.spamcop.net>
Download mbox | patch
Permalink /patch/194643/
State New
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Comments

Joern Rennecke - Oct. 28, 2012, 1:04 a.m.
With the lra branch merged, I had to update the patch, because of new uses of
HAVE_ATTTR_enabled.  While looking at the conflicts, I also found that it
was often hard to tell if macros were used for performance reasons, or
just because there was no other interface available. lra itself is probably
one of the last files that we want to wean from tm.h, because it's use of
FIRST_PSEUDO_REGISTER, but some of the macros it uses in #ifdefs are used
in other files with much more tenous connections to tm.h.  So, for these to
use, I added a few new piece-of-data members in the target structure.

bootstrapped in revision 192840 on i686-pc-linux-gnu.
tested iin revision 192840 with config.list.mk on i686-pc-linux-gnu.
2012-10-27  Joern Rennecke  <joern.rennecke@embecosm.com>

        * doc/md.texi (Defining Attributes): Document that we are defining
        HAVE_ATTR_name macors as 1 for defined attributes, and as 0
        for undefined special attributes.
	* doc/tm.texi.in: Add @hook TARGET_HAVE_CC0.
	* doc/tm.texi: Regenerate.
        * final.c (asm_insn_count, align_fuzz): Always define.
        (insn_current_reference_address): Likewise.
        (init_insn_lengths): Use if (HAVE_ATTR_length) instead of
        #ifdef HAVE_ATTR_length.
        (get_attr_length_1, shorten_branches, final): Likewise.
        (final_scan_insn, output_asm_name): Likewise.
        * genattr.c (gen_attr): Define HAVE_ATTR_name macros for
        defined attributes as 1.
        Remove ancient get_attr_alternative compatibility code.
        For special purpose attributes not provided, define HAVE_ATTR_name
        as 0.
        In case no length attribute is given, provide stub definitions
        for insn_*_length* functions, and also include insn-addr.h.
	In case no enabled attribute is given, provide stub definition.
        * genattrtab.c (write_length_unit_log): Always write a definition.
	* hooks.c (hook_int_rtx_1): New function.
	* hooks.h (hook_int_rtx_1): Declare.
	* lra-int.h (struct lra_insn_recog_data): Make member
	alternative_enabled_p unconditional.
	* lra.c (free_insn_recog_data): Use if (HAVE_ATTR_length) instead of
        #ifdef HAVE_ATTR_length.
	(lra_set_insn_recog_data): Likewise.  Make initialization of
	alternative_enabled_p unconditional.
	(lra_update_insn_recog_data): Use #if instead of #ifdef for
	HAVE_ATTR_enabled.
        * recog.c [!HAVE_ATTR_enabled] (get_attr_enabled): Don't define.
	(extract_insn): Check HAVE_ATTR_enabled.
	(gate_handle_split_before_regstack): Use #if instead of
	#if defined for HAVE_ATTR_length.
	* gcc/target-def.h: Provide definitions for TARGET_HAVE_CC0,
	TARGET_AUTO_INC_DEC, TARGET_STACK_REGS, TARGET_HAVE_ATTR_LENGTH
	and TARGET_HAVE_ATTR_ENABLED.
	* target.def (have_cc0, auto_inc_dec): New flags in target structure.
	(stack_regs, have_attr_enabled, have_attr_length): Likewise.
Andreas Schwab - Oct. 28, 2012, 7:41 a.m.
Joern Rennecke <joern.rennecke@embecosm.com> writes:

> Index: gcc/doc/tm.texi
> ===================================================================
> --- gcc/doc/tm.texi	(revision 192840)
> +++ gcc/doc/tm.texi	(working copy)
> @@ -11333,3 +11333,11 @@ @deftypefn {Target Hook} {unsigned HOST_
>  @deftypevr {Target Hook} {unsigned char} TARGET_ATOMIC_TEST_AND_SET_TRUEVAL
>  This value should be set if the result written by @code{atomic_test_and_set} is not exactly 1, i.e. the @code{bool} @code{true}.
>  @end deftypevr
> +
> +@deftypevr {Target Hook} bool TARGET_HAVE_CC0
> +@deftypevrx {Target Hook} {bool} TARGET_AUTO_INC_DEC
> +@deftypevrx {Target Hook} {bool} TARGET_STACK_REGS
> +@deftypevrx {Target Hook} {bool} TARGET_HAVE_ATTR_ENABLED
> +@deftypevrx {Target Hook} {bool} TARGET_HAVE_ATTR_LENGTH
> +These flags are automatically generated;  you should not override them in tm.c:

Typo: s/:$/./, also @file{tm.c}.

Andreas.

Patch

Index: gcc/doc/md.texi
===================================================================
--- gcc/doc/md.texi	(revision 192840)
+++ gcc/doc/md.texi	(working copy)
@@ -7558,7 +7558,7 @@  (define_attr "type" "branch,fp,load,stor
 the following lines will be written to the file @file{insn-attr.h}.
 
 @smallexample
-#define HAVE_ATTR_type
+#define HAVE_ATTR_type 1
 enum attr_type @{TYPE_BRANCH, TYPE_FP, TYPE_LOAD,
                  TYPE_STORE, TYPE_ARITH@};
 extern enum attr_type get_attr_type ();
@@ -7583,6 +7583,10 @@  extern enum attr_type get_attr_type ();
 generation. @xref{Disable Insn Alternatives}.
 @end table
 
+For each of these special attributes, the corresponding
+@samp{HAVE_ATTR_@var{name}} @samp{#define} is also written when the
+attribute is not defined; in that case, it is defined as @samp{0}.
+
 @findex define_enum_attr
 @anchor{define_enum_attr}
 Another way of defining an attribute is to use:
Index: gcc/doc/tm.texi
===================================================================
--- gcc/doc/tm.texi	(revision 192840)
+++ gcc/doc/tm.texi	(working copy)
@@ -11333,3 +11333,11 @@  @deftypefn {Target Hook} {unsigned HOST_
 @deftypevr {Target Hook} {unsigned char} TARGET_ATOMIC_TEST_AND_SET_TRUEVAL
 This value should be set if the result written by @code{atomic_test_and_set} is not exactly 1, i.e. the @code{bool} @code{true}.
 @end deftypevr
+
+@deftypevr {Target Hook} bool TARGET_HAVE_CC0
+@deftypevrx {Target Hook} {bool} TARGET_AUTO_INC_DEC
+@deftypevrx {Target Hook} {bool} TARGET_STACK_REGS
+@deftypevrx {Target Hook} {bool} TARGET_HAVE_ATTR_ENABLED
+@deftypevrx {Target Hook} {bool} TARGET_HAVE_ATTR_LENGTH
+These flags are automatically generated;  you should not override them in tm.c:
+@end deftypevr
Index: gcc/doc/tm.texi.in
===================================================================
--- gcc/doc/tm.texi.in	(revision 192840)
+++ gcc/doc/tm.texi.in	(working copy)
@@ -11173,3 +11173,5 @@  @hook TARGET_MEMMODEL_CHECK
 @end deftypefn
 
 @hook TARGET_ATOMIC_TEST_AND_SET_TRUEVAL
+
+@hook TARGET_HAVE_CC0
Index: gcc/final.c
===================================================================
--- gcc/final.c	(revision 192840)
+++ gcc/final.c	(working copy)
@@ -204,9 +204,7 @@  Software Foundation; either version 3, o
 /* True if printing into -fdump-final-insns= dump.  */   
 bool final_insns_dump_p;
 
-#ifdef HAVE_ATTR_length
 static int asm_insn_count (rtx);
-#endif
 static void profile_function (FILE *);
 static void profile_after_prologue (FILE *);
 static bool notice_source_line (rtx, bool *);
@@ -224,9 +222,7 @@  static int alter_cond (rtx);
 #ifndef ADDR_VEC_ALIGN
 static int final_addr_vec_align (rtx);
 #endif
-#ifdef HAVE_ATTR_length
 static int align_fuzz (rtx, rtx, int, unsigned);
-#endif
 
 /* Initialize data in final at the beginning of a compilation.  */
 
@@ -362,9 +358,8 @@  init_insn_lengths (void)
       insn_lengths = 0;
       insn_lengths_max_uid = 0;
     }
-#ifdef HAVE_ATTR_length
-  INSN_ADDRESSES_FREE ();
-#endif
+  if (HAVE_ATTR_length)
+    INSN_ADDRESSES_FREE ();
   if (uid_align)
     {
       free (uid_align);
@@ -376,14 +371,15 @@  init_insn_lengths (void)
    get its actual length.  Otherwise, use FALLBACK_FN to calculate the
    length.  */
 static inline int
-get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED,
-		   int (*fallback_fn) (rtx) ATTRIBUTE_UNUSED)
+get_attr_length_1 (rtx insn, int (*fallback_fn) (rtx))
 {
-#ifdef HAVE_ATTR_length
   rtx body;
   int i;
   int length = 0;
 
+  if (!HAVE_ATTR_length)
+    return 0;
+
   if (insn_lengths_max_uid > INSN_UID (insn))
     return insn_lengths[INSN_UID (insn)];
   else
@@ -432,11 +428,6 @@  get_attr_length_1 (rtx insn ATTRIBUTE_UN
   ADJUST_INSN_LENGTH (insn, length);
 #endif
   return length;
-#else /* not HAVE_ATTR_length */
-  return 0;
-#define insn_default_length 0
-#define insn_min_length 0
-#endif /* not HAVE_ATTR_length */
 }
 
 /* Obtain the current length of an insn.  If branch shortening has been done,
@@ -583,7 +574,6 @@  label_to_max_skip (rtx label)
   return 0;
 }
 
-#ifdef HAVE_ATTR_length
 /* The differences in addresses
    between a branch and its target might grow or shrink depending on
    the alignment the start insn of the range (the branch for a forward
@@ -686,7 +676,6 @@  insn_current_reference_address (rtx bran
 	      + align_fuzz (dest, seq, length_unit_log, ~0));
     }
 }
-#endif /* HAVE_ATTR_length */
 
 /* Compute branch alignments based on frequency information in the
    CFG.  */
@@ -850,14 +839,13 @@  struct rtl_opt_pass pass_compute_alignme
    slots.  */
 
 void
-shorten_branches (rtx first ATTRIBUTE_UNUSED)
+shorten_branches (rtx first)
 {
   rtx insn;
   int max_uid;
   int i;
   int max_log;
   int max_skip;
-#ifdef HAVE_ATTR_length
 #define MAX_CODE_ALIGN 16
   rtx seq;
   int something_changed = 1;
@@ -866,8 +854,6 @@  shorten_branches (rtx first ATTRIBUTE_UN
   int uid;
   rtx align_tab[MAX_CODE_ALIGN];
 
-#endif
-
   /* Compute maximum UID and allocate label_align / uid_shuid.  */
   max_uid = get_max_uid ();
 
@@ -974,7 +960,8 @@  shorten_branches (rtx first ATTRIBUTE_UN
 	      }
 	}
     }
-#ifdef HAVE_ATTR_length
+  if (!HAVE_ATTR_length)
+    return;
 
   /* Allocate the rest of the arrays.  */
   insn_lengths = XNEWVEC (int, max_uid);
@@ -1420,11 +1407,8 @@  shorten_branches (rtx first ATTRIBUTE_UN
     }
 
   free (varying_length);
-
-#endif /* HAVE_ATTR_length */
 }
 
-#ifdef HAVE_ATTR_length
 /* Given the body of an INSN known to be generated by an ASM statement, return
    the number of machine instructions likely to be generated for this insn.
    This is used to compute its length.  */
@@ -1441,7 +1425,6 @@  asm_insn_count (rtx body)
 
   return asm_str_count (templ);
 }
-#endif
 
 /* Return the number of machine instructions likely to be generated for the
    inline-asm template. */
@@ -1902,17 +1885,18 @@  final (rtx first, FILE *file, int optimi
   /* Output the insns.  */
   for (insn = first; insn;)
     {
-#ifdef HAVE_ATTR_length
-      if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
+      if (HAVE_ATTR_length)
 	{
-	  /* This can be triggered by bugs elsewhere in the compiler if
-	     new insns are created after init_insn_lengths is called.  */
-	  gcc_assert (NOTE_P (insn));
-	  insn_current_address = -1;
+	  if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
+	    {
+	      /* This can be triggered by bugs elsewhere in the compiler if
+		 new insns are created after init_insn_lengths is called.  */
+	      gcc_assert (NOTE_P (insn));
+	      insn_current_address = -1;
+	    }
+	  else
+	    insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
 	}
-      else
-	insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
-#endif /* HAVE_ATTR_length */
 
       dump_basic_block_info (file, insn, start_to_bb, end_to_bb,
                              bb_map_size, &bb_seqn);
@@ -2853,12 +2837,13 @@  final_scan_insn (rtx insn, FILE *file, i
 	    if (new_rtx == insn && PATTERN (new_rtx) == body)
 	      fatal_insn ("could not split insn", insn);
 
-#ifdef HAVE_ATTR_length
-	    /* This instruction should have been split in shorten_branches,
-	       to ensure that we would have valid length info for the
-	       splitees.  */
-	    gcc_unreachable ();
-#endif
+	    if (HAVE_ATTR_length)
+	      {
+		/* This instruction should have been split in shorten_branches,
+		   to ensure that we would have valid length info for the
+		   splitees.  */
+		gcc_unreachable ();
+	      }
 
 	    return new_rtx;
 	  }
@@ -3292,10 +3277,11 @@  output_asm_name (void)
 	       insn_data[num].name);
       if (insn_data[num].n_alternatives > 1)
 	fprintf (asm_out_file, "/%d", which_alternative + 1);
-#ifdef HAVE_ATTR_length
-      fprintf (asm_out_file, "\t[length = %d]",
-	       get_attr_length (debug_insn));
-#endif
+
+      if (HAVE_ATTR_length)
+	fprintf (asm_out_file, "\t[length = %d]",
+		 get_attr_length (debug_insn));
+
       /* Clear this so only the first assembler insn
 	 of any rtl insn will get the special comment for -dp.  */
       debug_insn = 0;
Index: gcc/genattr.c
===================================================================
--- gcc/genattr.c	(revision 192840)
+++ gcc/genattr.c	(working copy)
@@ -44,7 +44,7 @@  gen_attr (rtx attr)
   if (is_const)
     VEC_safe_push (rtx, heap, const_attrs, attr);
 
-  printf ("#define HAVE_ATTR_%s\n", XSTR (attr, 0));
+  printf ("#define HAVE_ATTR_%s 1\n", XSTR (attr, 0));
 
   /* If numeric attribute, don't need to write an enum.  */
   if (GET_CODE (attr) == DEFINE_ENUM_ATTR)
@@ -159,12 +159,6 @@  main (int argc, char **argv)
 
   puts ("#include \"insn-attr-common.h\"\n");
 
-  /* For compatibility, define the attribute `alternative', which is just
-     a reference to the variable `which_alternative'.  */
-
-  puts ("#define HAVE_ATTR_alternative");
-  puts ("#define get_attr_alternative(insn) which_alternative");
-
   /* Read the machine description.  */
 
   while (1)
@@ -342,6 +336,29 @@  main (int argc, char **argv)
       printf ("typedef void *state_t;\n\n");
     }
 
+  /* Special-purpose atributes should be tested with if, not #ifdef.  */
+  const char * const special_attrs[] = { "length", "enabled", 0 };
+  for (const char * const *p = special_attrs; *p; p++)
+    {
+      printf ("#ifndef HAVE_ATTR_%s\n"
+	      "#define HAVE_ATTR_%s 0\n"
+	      "#endif\n", *p, *p);
+    }
+  /* We make an exception here to provide stub definitions for
+     insn_*_length* / get_attr_enabled functions.  */
+  puts ("#if !HAVE_ATTR_length\n"
+	"extern int hook_int_rtx_0 (rtx);\n"
+	"#define insn_default_length hook_int_rtx_0\n"
+	"#define insn_min_length hook_int_rtx_0\n"
+	"#define insn_variable_length_p hook_int_rtx_0\n"
+	"#define insn_current_length hook_int_rtx_0\n"
+	"#include \"insn-addr.h\"\n"
+	"#endif\n"
+	"#if !HAVE_ATTR_enabled\n"
+	"extern int hook_int_rtx_1 (rtx);\n"
+	"#define get_attr_enabled hook_int_rtx_1\n"
+	"#endif\n");
+
   /* Output flag masks for use by reorg.
 
      Flags are used to hold branch direction for use by eligible_for_...  */
Index: gcc/genattrtab.c
===================================================================
--- gcc/genattrtab.c	(revision 192840)
+++ gcc/genattrtab.c	(working copy)
@@ -1636,14 +1636,15 @@  write_length_unit_log (FILE *outf)
   unsigned int length_unit_log, length_or;
   int unknown = 0;
 
-  if (length_attr == 0)
-    return;
-  length_or = or_attr_value (length_attr->default_val->value, &unknown);
-  for (av = length_attr->first_value; av; av = av->next)
-    for (ie = av->first_insn; ie; ie = ie->next)
-      length_or |= or_attr_value (av->value, &unknown);
+  if (length_attr)
+    {
+      length_or = or_attr_value (length_attr->default_val->value, &unknown);
+      for (av = length_attr->first_value; av; av = av->next)
+	for (ie = av->first_insn; ie; ie = ie->next)
+	  length_or |= or_attr_value (av->value, &unknown);
+    }
 
-  if (unknown)
+  if (length_attr == NULL || unknown)
     length_unit_log = 0;
   else
     {
Index: gcc/hooks.c
===================================================================
--- gcc/hooks.c	(revision 192840)
+++ gcc/hooks.c	(working copy)
@@ -203,6 +203,12 @@  hook_int_rtx_0 (rtx a ATTRIBUTE_UNUSED)
 }
 
 int
+hook_int_rtx_1 (rtx a ATTRIBUTE_UNUSED)
+{
+  return 1;
+}
+
+int
 hook_int_rtx_bool_0 (rtx a ATTRIBUTE_UNUSED, bool b ATTRIBUTE_UNUSED)
 {
   return 0;
Index: gcc/hooks.h
===================================================================
--- gcc/hooks.h	(revision 192840)
+++ gcc/hooks.h	(working copy)
@@ -75,6 +75,7 @@  extern int hook_int_uint_mode_1 (unsigne
 extern int hook_int_const_tree_0 (const_tree);
 extern int hook_int_const_tree_const_tree_1 (const_tree, const_tree);
 extern int hook_int_rtx_0 (rtx);
+extern int hook_int_rtx_1 (rtx);
 extern int hook_int_rtx_bool_0 (rtx, bool);
 extern int hook_int_rtx_mode_as_bool_0 (rtx, enum machine_mode, addr_space_t,
 					bool);
Index: gcc/lra-int.h
===================================================================
--- gcc/lra-int.h	(revision 192840)
+++ gcc/lra-int.h	(working copy)
@@ -227,10 +227,8 @@  struct lra_insn_recog_data
      value can be NULL or points to array of the hard register numbers
      ending with a negative value.  */
   int *arg_hard_regs;
-#ifdef HAVE_ATTR_enabled
   /* Alternative enabled for the insn.	NULL for debug insns.  */
   bool *alternative_enabled_p;
-#endif
   /* The alternative should be used for the insn, -1 if invalid, or we
      should try to use any alternative, or the insn is a debug
      insn.  */
Index: gcc/lra.c
===================================================================
--- gcc/lra.c	(revision 192840)
+++ gcc/lra.c	(working copy)
@@ -671,10 +671,8 @@  free_insn_recog_data (lra_insn_recog_dat
     free (data->dup_loc);
   if (data->arg_hard_regs != NULL)
     free (data->arg_hard_regs);
-#ifdef HAVE_ATTR_enabled
-  if (data->alternative_enabled_p != NULL)
+  if (HAVE_ATTR_enabled && data->alternative_enabled_p != NULL)
     free (data->alternative_enabled_p);
-#endif
   if (data->icode < 0 && NONDEBUG_INSN_P (data->insn))
     {
       if (data->insn_static_data->operand_alternative != NULL)
@@ -1020,9 +1018,7 @@  lra_set_insn_recog_data (rtx insn)
       data->insn_static_data = &debug_insn_static_data;
       data->dup_loc = NULL;
       data->arg_hard_regs = NULL;
-#ifdef HAVE_ATTR_enabled
       data->alternative_enabled_p = NULL;
-#endif
       data->operand_loc = XNEWVEC (rtx *, 1);
       data->operand_loc[0] = &INSN_VAR_LOCATION_LOC (insn);
       return data;
@@ -1075,9 +1071,7 @@  lra_set_insn_recog_data (rtx insn)
 	  = (insn_static_data->operand[i].constraint[0] == '=' ? OP_OUT
 	     : insn_static_data->operand[i].constraint[0] == '+' ? OP_INOUT
 	     : OP_IN);
-#ifdef HAVE_ATTR_enabled
       data->alternative_enabled_p = NULL;
-#endif
     }
   else
     {
@@ -1104,28 +1098,27 @@  lra_set_insn_recog_data (rtx insn)
 	  memcpy (locs, recog_data.dup_loc, n * sizeof (rtx *));
 	}
       data->dup_loc = locs;
-#ifdef HAVE_ATTR_enabled
-      {
-	bool *bp;
+      if (HAVE_ATTR_enabled)
+	{
+	  bool *bp;
 
-	n = insn_static_data->n_alternatives;
-	lra_assert (n >= 0);
-	data->alternative_enabled_p = bp = XNEWVEC (bool, n);
-	/* Cache the insn because we don't want to call extract_insn
-	   from get_attr_enabled as extract_insn modifies
-	   which_alternative.  The attribute enabled should not depend
-	   on insn operands, operand modes, operand types, and operand
-	   constraints.	 It should depend on the architecture.	If it
-	   is not true, we should rewrite this file code to use
-	   extract_insn instead of less expensive insn_extract.	 */
-	recog_data.insn = insn;
-	for (i = 0; i < n; i++)
-	  {
-	    which_alternative = i;
-	    bp[i] = get_attr_enabled (insn);
-	  }
-      }
-#endif
+	  n = insn_static_data->n_alternatives;
+	  lra_assert (n >= 0);
+	  data->alternative_enabled_p = bp = XNEWVEC (bool, n);
+	  /* Cache the insn because we don't want to call extract_insn
+	     from get_attr_enabled as extract_insn modifies
+	     which_alternative.  The attribute enabled should not depend
+	     on insn operands, operand modes, operand types, and operand
+	     constraints.  It should depend on the architecture.  If it
+	     is not true, we should rewrite this file code to use
+	     extract_insn instead of less expensive insn_extract.  */
+	  recog_data.insn = insn;
+	  for (i = 0; i < n; i++)
+	    {
+	      which_alternative = i;
+	      bp[i] = get_attr_enabled (insn);
+	    }
+	}
     }
   if (GET_CODE (PATTERN (insn)) == CLOBBER || GET_CODE (PATTERN (insn)) == USE)
     insn_static_data->hard_regs = NULL;
@@ -1305,7 +1298,7 @@  lra_update_insn_recog_data (rtx insn)
       n = insn_static_data->n_dups;
       if (n != 0)
 	memcpy (data->dup_loc, recog_data.dup_loc, n * sizeof (rtx *));
-#ifdef HAVE_ATTR_enabled
+#if HAVE_ATTR_enabled
 #ifdef ENABLE_CHECKING
       {
 	int i;
Index: gcc/recog.c
===================================================================
--- gcc/recog.c	(revision 192840)
+++ gcc/recog.c	(working copy)
@@ -57,14 +57,6 @@  Software Foundation; either version 3, o
 #endif
 #endif
 
-#ifndef HAVE_ATTR_enabled
-static inline bool
-get_attr_enabled (rtx insn ATTRIBUTE_UNUSED)
-{
-  return true;
-}
-#endif
-
 static void validate_replace_rtx_1 (rtx *, rtx, rtx, rtx, bool);
 static void validate_replace_src_1 (rtx *, void *);
 static rtx split_insn (rtx);
@@ -2172,7 +2164,8 @@  extract_insn (rtx insn)
       for (i = 0; i < recog_data.n_alternatives; i++)
 	{
 	  which_alternative = i;
-	  recog_data.alternative_enabled_p[i] = get_attr_enabled (insn);
+	  recog_data.alternative_enabled_p[i]
+	    = HAVE_ATTR_enabled ? get_attr_enabled (insn) : 0;
 	}
     }
 
@@ -3816,7 +3809,7 @@  struct rtl_opt_pass pass_split_after_rel
 static bool
 gate_handle_split_before_regstack (void)
 {
-#if defined (HAVE_ATTR_length) && defined (STACK_REGS)
+#if (HAVE_ATTR_length) && defined (STACK_REGS)
   /* If flow2 creates new instructions which need splitting
      and scheduling after reload is not done, they might not be
      split until final which doesn't allow splitting
@@ -3900,7 +3893,7 @@  struct rtl_opt_pass pass_split_before_sc
 static bool
 gate_do_final_split (void)
 {
-#if defined (HAVE_ATTR_length) && !defined (STACK_REGS)
+#if (HAVE_ATTR_length) && !defined (STACK_REGS)
   return 1;
 #else
   return 0;
Index: gcc/target-def.h
===================================================================
--- gcc/target-def.h	(revision 192840)
+++ gcc/target-def.h	(working copy)
@@ -104,6 +104,22 @@  #define TARGET_ASM_UNALIGNED_INT_OP				\
 #define TARGET_FUNCTION_INCOMING_ARG TARGET_FUNCTION_ARG
 #endif
 
+#ifdef HAVE_cc0
+#define TARGET_HAVE_CC0 true
+#endif
+#ifdef AUTO_INC_DEC
+#define TARGET_AUTO_INC_DEC true
+#endif
+#ifdef STACK_REGS
+#define TARGET_STACK_REGS true
+#endif
+#if HAVE_ATTR_length
+#define TARGET_HAVE_ATTR_LENGTH true
+#endif
+#if HAVE_ATTR_enabled
+#define TARGET_HAVE_ATTR_ENABLED true
+#endif
+
 #include "target-hooks-def.h"
 
 #include "hooks.h"
Index: gcc/target.def
===================================================================
--- gcc/target.def	(revision 192840)
+++ gcc/target.def	(working copy)
@@ -2910,6 +2910,17 @@  HOOK_VECTOR_END (target_option)
 This usually means it will be run as part of machine-specific reorg.",
 bool, false)
 
+/* Automatically generated flags.  Where compile-time evaluation
+   is not critical and/or where tm.h dependencies are undesirable,
+   these can be used instead of the tm.h macros.  */
+DEFHOOKPOD (have_cc0,
+ "These flags are automatically generated;\
+  you should not override them in tm.c:", bool, false)
+DEFHOOKPODX (auto_inc_dec, bool, false)
+DEFHOOKPODX (stack_regs, bool, false)
+DEFHOOKPODX (have_attr_enabled, bool, false)
+DEFHOOKPODX (have_attr_length, bool, false)
+
 /* Leave the boolean fields at the end.  */
 
 /* Close the 'struct gcc_target' definition.  */