From patchwork Fri Oct 26 05:47:51 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Crosthwaite X-Patchwork-Id: 194365 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 1D6B02C0094 for ; Fri, 26 Oct 2012 16:49:20 +1100 (EST) Received: from localhost ([::1]:39147 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TRcnG-00050E-9R for incoming@patchwork.ozlabs.org; Fri, 26 Oct 2012 01:49:18 -0400 Received: from eggs.gnu.org ([208.118.235.92]:59460) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TRcn5-0004sR-C6 for qemu-devel@nongnu.org; Fri, 26 Oct 2012 01:49:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TRcn3-0001AY-GF for qemu-devel@nongnu.org; Fri, 26 Oct 2012 01:49:07 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:33400) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TRcn3-000123-AL for qemu-devel@nongnu.org; Fri, 26 Oct 2012 01:49:05 -0400 Received: by mail-pb0-f45.google.com with SMTP id rp2so2425801pbb.4 for ; Thu, 25 Oct 2012 22:49:04 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:in-reply-to:references:x-gm-message-state; bh=/nfcYCZbVDoCrC0UPqFI7It/1LiRymG7YkWfC+3MyCs=; b=pDd49q8FMJpDHcZRHiYI5QaR/Heba7lWGicu0+3VKyrebnqNH9u+mL5SDtLFuW6Mof 6cYQlJL/YDxlVlhqI+R0bYFI1JuIno8D0VCP32m7fogqIISOusa5zsB65Gq8HGhX6Rsn jISeEz3ISKBuUY2YXu/9Qo9hr+LpNZDfZgpbPCH6G8rNV5A0e64gwKPugSP6jpdrUvKb 6jV4qs9t+djGDP90ots7Zsl2Ki1GOgOpkFLpwO7hFt/wNOodGi+xt7jQDb0U3I4uPvHK cwmQFF0yO2aJ3dIaUfjgyhxywL+kraPSAPmRIsnDr5MCbiKdYi9FAoCfo7oM1xRGpv/G 4aow== Received: by 10.66.87.133 with SMTP id ay5mr59190946pab.59.1351230544897; Thu, 25 Oct 2012 22:49:04 -0700 (PDT) Received: from localhost ([124.148.20.9]) by mx.google.com with ESMTPS id ix9sm627705pbc.7.2012.10.25.22.49.01 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 25 Oct 2012 22:49:04 -0700 (PDT) From: Peter Crosthwaite To: qemu-devel@nongnu.org Date: Fri, 26 Oct 2012 15:47:51 +1000 Message-Id: <0c11f3611c74b87c53cfff65ea24f8d6ec82f666.1351229557.git.peter.crosthwaite@xilinx.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: References: In-Reply-To: References: X-Gm-Message-State: ALoCoQlUab/IkW+8j63b33ToEGb02iv7t5ynsA2j1X4Rv+yvAyKlmNi9Sros7otJcTZ9hwtzPnzv X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.160.45 Cc: vineshp@xilinx.com, peter.maydell@linaro.org, Peter Crosthwaite , john.williams@xilinx.com, kraxel@redhat.com, edgar.iglesias@gmail.com, afaerber@suse.de Subject: [Qemu-devel] [PATCH v2 11/11] usb/ehci: Put RAM in undefined MMIO regions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Just put RAM regions in the unimplemented spaces in the MMIO region. These regions have undefined behaviour, but this at least stops QEMU from segfaulting when the guest bangs on these registers (and sucessfully fakes reading and writing the registers with no side effects). Signed-off-by: Peter Crosthwaite --- changed from v1: greatly simplified implementation. hw/usb/hcd-ehci.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c index 26086b2..77874ae 100644 --- a/hw/usb/hcd-ehci.c +++ b/hw/usb/hcd-ehci.c @@ -2797,7 +2797,7 @@ static void usb_ehci_initfn(EHCIState *s, DeviceState *dev) qemu_register_reset(ehci_reset, s); qemu_add_vm_change_state_handler(usb_ehci_vm_state_change, s); - memory_region_init(&s->mem, "ehci", MMIO_SIZE); + memory_region_init_ram(&s->mem, "ehci", MMIO_SIZE); memory_region_init_io(&s->mem_caps, &ehci_mmio_caps_ops, s, "capabilities", CAPA_SIZE); memory_region_init_io(&s->mem_opreg, &ehci_mmio_opreg_ops, s,