From patchwork Thu Oct 25 22:56:03 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: rs6000: Correct ATOMIC mode iterator Date: Thu, 25 Oct 2012 12:56:03 -0000 From: Segher Boessenkool X-Patchwork-Id: 194321 Message-Id: To: gcc-patches@gcc.gnu.org Cc: dje.gcc@gmail.com, Segher Boessenkool This fixes the ICE with -m32 -mpowerpc64 on many of the testcases that use atomics: gcc: -# of expected passes 108465 -# of unexpected failures 365 +# of expected passes 108499 +# of unexpected failures 303 libgomp: -# of expected passes 8664 -# of unexpected failures 126 -# of unresolved testcases 63 +# of expected passes 8790 Not bad for a one-liner :-) Bootstrapped and tested on powerpc64-linux, -m64,-m32,-m32/-mpowerpc64; no new failures, and the above improvements. Okay to apply? Segher 2012-10-25 Segher Boessenkool gcc/ * config/rs6000/sync.md (ATOMIC): Correct DI condition. --- gcc/config/rs6000/sync.md | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/gcc/config/rs6000/sync.md b/gcc/config/rs6000/sync.md index 42ac903..ddf2ae7 100644 --- a/gcc/config/rs6000/sync.md +++ b/gcc/config/rs6000/sync.md @@ -174,7 +174,7 @@ (define_expand "atomic_store" ;; opcode that is "phased-in". Not implemented as of Power7, so not yet used, ;; but let's prepare the macros anyway. -(define_mode_iterator ATOMIC [SI (DI "TARGET_64BIT")]) +(define_mode_iterator ATOMIC [SI (DI "TARGET_POWERPC64")]) (define_insn "load_locked" [(set (match_operand:ATOMIC 0 "gpc_reg_operand" "=r")