From patchwork Wed Oct 24 13:03:00 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 193776 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 10E882C008C for ; Thu, 25 Oct 2012 00:27:18 +1100 (EST) Received: from localhost ([::1]:53240 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TR0zM-0000nL-1l for incoming@patchwork.ozlabs.org; Wed, 24 Oct 2012 09:27:16 -0400 Received: from eggs.gnu.org ([208.118.235.92]:43937) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TR0yx-0000Pq-09 for qemu-devel@nongnu.org; Wed, 24 Oct 2012 09:26:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TR0yn-0002PX-62 for qemu-devel@nongnu.org; Wed, 24 Oct 2012 09:26:50 -0400 Received: from 38.0.169.217.in-addr.arpa ([217.169.0.38]:55588 helo=mnementh.archaic.org.uk) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TR0ym-0002OM-V7 for qemu-devel@nongnu.org; Wed, 24 Oct 2012 09:26:41 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1TR0bt-0000wr-O7; Wed, 24 Oct 2012 14:03:01 +0100 From: Peter Maydell To: Aurelien Jarno , Blue Swirl Date: Wed, 24 Oct 2012 14:03:00 +0100 Message-Id: <1351083781-3616-4-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1351083781-3616-1-git-send-email-peter.maydell@linaro.org> References: <1351083781-3616-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 217.169.0.38 Cc: qemu-devel@nongnu.org, Paul Brook Subject: [Qemu-devel] [PATCH 3/4] target-arm: Implement abs_i32 inline rather than as a helper X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Implement abs_i32 inline (with movcond) rather than using a helper function. Reviewed-by: Aurelien Jarno Signed-off-by: Peter Maydell --- target-arm/helper.c | 5 ----- target-arm/helper.h | 1 - target-arm/translate.c | 11 +++++++++-- 3 files changed, 9 insertions(+), 8 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 8f2cba6..ab8b734 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -1562,11 +1562,6 @@ uint32_t HELPER(rbit)(uint32_t x) return x; } -uint32_t HELPER(abs)(uint32_t x) -{ - return ((int32_t)x < 0) ? -x : x; -} - #if defined(CONFIG_USER_ONLY) void do_interrupt (CPUARMState *env) diff --git a/target-arm/helper.h b/target-arm/helper.h index fa3472f..60812de 100644 --- a/target-arm/helper.h +++ b/target-arm/helper.h @@ -13,7 +13,6 @@ DEF_HELPER_2(double_saturate, i32, env, s32) DEF_HELPER_FLAGS_2(sdiv, TCG_CALL_CONST | TCG_CALL_PURE, s32, s32, s32) DEF_HELPER_FLAGS_2(udiv, TCG_CALL_CONST | TCG_CALL_PURE, i32, i32, i32) DEF_HELPER_FLAGS_1(rbit, TCG_CALL_CONST | TCG_CALL_PURE, i32, i32) -DEF_HELPER_FLAGS_1(abs, TCG_CALL_CONST | TCG_CALL_PURE, i32, i32) #define PAS_OP(pfx) \ DEF_HELPER_3(pfx ## add8, i32, i32, i32, ptr) \ diff --git a/target-arm/translate.c b/target-arm/translate.c index d33f94c..25433da 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -462,8 +462,15 @@ static void gen_sar(TCGv dest, TCGv t0, TCGv t1) tcg_temp_free_i32(tmp1); } -/* FIXME: Implement this natively. */ -#define tcg_gen_abs_i32(t0, t1) gen_helper_abs(t0, t1) +static void tcg_gen_abs_i32(TCGv dest, TCGv src) +{ + TCGv c0 = tcg_const_i32(0); + TCGv tmp = tcg_temp_new_i32(); + tcg_gen_neg_i32(tmp, src); + tcg_gen_movcond_i32(TCG_COND_GT, dest, src, c0, src, tmp); + tcg_temp_free_i32(c0); + tcg_temp_free_i32(tmp); +} static void shifter_out_im(TCGv var, int shift) {