From patchwork Wed Oct 24 04:04:39 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 193654 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id C49FE2C0123 for ; Wed, 24 Oct 2012 15:05:57 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 75A784A4E4; Wed, 24 Oct 2012 06:05:51 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 3a1U+zTxQ+6r; Wed, 24 Oct 2012 06:05:51 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7478E4A43B; Wed, 24 Oct 2012 06:05:27 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 210E14A1EC for ; Wed, 24 Oct 2012 06:05:12 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 2WrgsOeUHktI for ; Wed, 24 Oct 2012 06:05:11 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-wg0-f74.google.com (mail-wg0-f74.google.com [74.125.82.74]) by theia.denx.de (Postfix) with ESMTPS id 8C3EA4A3C7 for ; Wed, 24 Oct 2012 06:05:07 +0200 (CEST) Received: by mail-wg0-f74.google.com with SMTP id dt11so5871wgb.3 for ; Tue, 23 Oct 2012 21:05:06 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=I4Q2pkxo9mwHBGNh1oXx2mNlbjYTpOXARTuFJXhUChM=; b=jCS47NKiIKeQtCokyERm4ows6BCLxUFg1zP/4NGix/JBkv56VH2GEi6FGNdWou0C1S eMoynWU/9YOfNXEE/hHNgT1C+WJBp9nl2Kr6pCwCtRtapaatIGigPrf/MFvmxmp642HD AgO6xE2ENETgsIGLMnd71HB807gyAu5T7bFyz9L+ef/JFzQauEY3PgvYdy2Rh/hnC5/J bKGq8hQoaoYf7hqMXE6oswgEmogTZdSasE9tBaVW6qVVP7hy8w6xVTCtj+/sGfPTQb83 VJilgv4lVX+yMLYnUKtNWKmwLDNMx3PIZEaZ+KIW5J1af8n0xWgYaAF+OY5Vr6xBR3NC 8iVg== Received: by 10.181.12.101 with SMTP id ep5mr234063wid.1.1351051506778; Tue, 23 Oct 2012 21:05:06 -0700 (PDT) Received: from hpza10.eem.corp.google.com ([74.125.121.33]) by gmr-mx.google.com with ESMTPS id f8si104956wie.2.2012.10.23.21.05.06 (version=TLSv1/SSLv3 cipher=AES128-SHA); Tue, 23 Oct 2012 21:05:06 -0700 (PDT) Received: from kaka.mtv.corp.google.com (kaka.mtv.corp.google.com [172.22.73.79]) by hpza10.eem.corp.google.com (Postfix) with ESMTP id 6399F200057; Tue, 23 Oct 2012 21:05:06 -0700 (PDT) Received: by kaka.mtv.corp.google.com (Postfix, from userid 121222) id C4A0C160DAC; Tue, 23 Oct 2012 21:05:05 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Date: Tue, 23 Oct 2012 21:04:39 -0700 Message-Id: <1351051486-6980-9-git-send-email-sjg@chromium.org> X-Mailer: git-send-email 1.7.7.3 In-Reply-To: <1351051486-6980-1-git-send-email-sjg@chromium.org> References: <1351051486-6980-1-git-send-email-sjg@chromium.org> X-Gm-Message-State: ALoCoQlRMEv4c++kTd5CkoArIfH13BySHrACfGmMzgEvsEhiDU9Rwo8HestxFgX99OrftPDFDwh7H1WWFf7sPGdmpdk5Z27kD5MLvvQSacSs5AB5uqJI4TRRQ9z9Ize0NHWhaPkBGeWltT/SU+wA2A57DLDR4suPHYyCEuV5Xuc83yJG1P22NCHrlOXcNib5krH3RqiY831j Cc: Stefan Reinauer Subject: [U-Boot] [PATCH 08/15] x86: Clean up MTRR 7 right before jumping to the kernel X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Stefan Reinauer This cleans up the rom caching optimization implemented in coreboot (and needed throughout U-Boot runtime). Signed-off-by: Stefan Reinauer Signed-off-by: Simon Glass --- arch/x86/cpu/coreboot/coreboot.c | 18 ++++++++++++++++++ 1 files changed, 18 insertions(+), 0 deletions(-) diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c index b942a3e..d1be8ff 100644 --- a/arch/x86/cpu/coreboot/coreboot.c +++ b/arch/x86/cpu/coreboot/coreboot.c @@ -26,6 +26,8 @@ #include #include #include +#include +#include #include #include #include @@ -89,3 +91,19 @@ int board_eth_init(bd_t *bis) void setup_pcat_compatibility() { } + +#define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg)) +#define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1) + +int board_final_cleanup(void) +{ + /* Un-cache the ROM so the kernel has one + * more MTRR available. + */ + disable_cache(); + wrmsr(MTRRphysBase_MSR(7), 0); + wrmsr(MTRRphysMask_MSR(7), 0); + enable_cache(); + + return 0; +}