From patchwork Wed Oct 24 03:12:35 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joern Rennecke X-Patchwork-Id: 193644 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 12C982C0100 for ; Wed, 24 Oct 2012 14:12:53 +1100 (EST) Comment: DKIM? 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See http://antispam.yahoo.com/domainkeys DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=default; d=gcc.gnu.org; h=Received:Received:X-SWARE-Spam-Status:X-Spam-Check-By:Received:Received:Received:Message-ID:Date:From:To:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:User-Agent:Mailing-List:Precedence:List-Id:List-Unsubscribe:List-Archive:List-Post:List-Help:Sender:Delivered-To; b=wm8MdKO3uLgKuitiy3S2a3Fx1d4n4+pRn1zHmIQeQUZlc5MHtMo1rjjYCo3LbB U3FYZokkjJBFSaFDdFCPiN1ZHYKF5XGrQCIzxwYl6Fu7OPQhWlBdZ7lKuII81dWF xlB//USimwxy78raa8Bh+U6cqL9tFmB1PHQYquhVXJUOc=; Received: (qmail 28162 invoked by alias); 24 Oct 2012 03:12:47 -0000 Received: (qmail 28153 invoked by uid 22791); 24 Oct 2012 03:12:46 -0000 X-SWARE-Spam-Status: No, hits=-1.9 required=5.0 tests=AWL, BAYES_00, MIME_QP_LONG_LINE, TW_DW, TW_TM, T_FRT_LITTLE X-Spam-Check-By: sourceware.org Received: from c62.cesmail.net (HELO c62.cesmail.net) (216.154.195.54) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 24 Oct 2012 03:12:38 +0000 Received: from unknown (HELO delta2) ([192.168.1.50]) by c62.cesmail.net with ESMTP; 23 Oct 2012 23:12:35 -0400 Received: from cust213-dsl91-135-11.idnet.net (cust213-dsl91-135-11.idnet.net [91.135.11.213]) by webmail.spamcop.net (Horde MIME library) with HTTP; Tue, 23 Oct 2012 23:12:35 -0400 Message-ID: <20121023231235.c1lkwc0vkssk04gw-nzlynne@webmail.spamcop.net> Date: Tue, 23 Oct 2012 23:12:35 -0400 From: Joern Rennecke To: gcc-patches@gcc.gnu.org Subject: ARC port (1/5): configuration file patches MIME-Version: 1.0 User-Agent: Internet Messaging Program (IMP) H3 (4.1.4) Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Prerequisites to allow the port to build properly: the lock_length attribute: http://gcc.gnu.org/ml/gcc-patches/2012-10/msg01890.html http://gcc.gnu.org/ml/gcc-patches/2012-10/msg02120.html And from Easwaran Raman : PR middle-end/54957 * optabs.c (emit_cmp_and_jump_insn_1): Remove bogus assert. * stmt.c (get_outgoing_edge_probs): Check default_edge / stmt_bb for NULL before dereferencing. (emit_case_dispatch_table): Check default_edge for NULL before dereferencing. Provide sane basic block parameter to emit_case_dispatch_table. http://gcc.gnu.org/bugzilla/attachment.cgi?id=28466 For testing the ARC port, most recently I have been using revision 192641 as a GCC baseline. The other pieces of the toolchain can be found at: https://github.com/foss-for-synopsys-dwc-arc-processors There is also a gcc port there, but it's an older one, based on GCC 4.4 . The intention is to eventually contribute all parts of the GNU toolchain to the FSF, but some pieces need redesigning first, e.g. variable size fragment handling (or the current lack thereof) in the gas port. I hope I can polish up the port a bit more before the 4.8 code feature freeze, but right now the priority is get the required infrastructure for branch shortening hashed out. And for this, it is useful for everyone to be able to look at the ARC port - so here it is. libgcc: 2012-10-09 Joern Rennecke * config.host (arc-*-elf*, arc*-*-linux-uclibc*): New configurations. gcc: 2012-10-09 Joern Rennecke Brendan Kehoe * config.gcc (arc-*-elf*, arc*-*-linux-uclibc*): New configurations. gcc/testsuite: 2012-08-17 Joern Rennecke * gcc.c-torture/execute/20101011-1.c [__arc__] (DO_TEST): Define as 0. libstdc++-v3: 2012-08-16 Joern Rennecke * acinclude.m4 (GLIBCXX_ENABLE_SJLJ_EXCEPTIONS): Also check for _Unwind_SjLj_Register when deciding if to set enable_sjlj_exceptions. * configure: Regenerate. Index: libgcc/config.host =================================================================== --- libgcc/config.host (revision 2572) +++ libgcc/config.host (working copy) @@ -303,6 +303,14 @@ extra_parts="$extra_parts vms-dwarf2.o vms-dwarf2eh.o" md_unwind_header=alpha/vms-unwind.h ;; +arc-*-elf*) + tmake_file="arc/t-arc-newlib arc/t-arc" + extra_parts="crti.o crtn.o crtend.o crtbegin.o crtendS.o crtbeginS.o libgmon.a crtg.o crtgend.o" + ;; +arc*-*-linux-uclibc*) + tmake_file="${tmake_file} t-slibgcc-libgcc t-slibgcc-nolc-override arc/t-arc700-uClibc arc/t-arc" + extra_parts="crti.o crtn.o crtend.o crtbegin.o crtendS.o crtbeginS.o libgmon.a crtg.o crtgend.o" + ;; arm-wrs-vxworks) tmake_file="$tmake_file arm/t-arm arm/t-vxworks t-fdpbit" extra_parts="$extra_parts crti.o crtn.o" Index: gcc/testsuite/gcc.c-torture/execute/20101011-1.c =================================================================== --- gcc/testsuite/gcc.c-torture/execute/20101011-1.c (revision 2572) +++ gcc/testsuite/gcc.c-torture/execute/20101011-1.c (working copy) @@ -36,6 +36,9 @@ #elif defined (__CRIS__) /* No SIGFPE for CRIS integer division. */ # define DO_TEST 0 +#elif defined (__arc__) + /* No SIGFPE for ARC integer division. */ +# define DO_TEST 0 #elif defined (__arm__) && defined (__ARM_EABI__) # ifdef __ARM_ARCH_EXT_IDIV__ /* Hardware division instructions may not trap, and handle trapping Index: gcc/config.gcc =================================================================== --- gcc/config.gcc (revision 2572) +++ gcc/config.gcc (working copy) @@ -813,6 +813,39 @@ tm_file="${tm_file} vms/vms.h alpha/vms.h" tmake_file="${tmake_file} alpha/t-vms" ;; +arc-*-elf*) + extra_headers="arc-simd.h" + tm_file="dbxelf.h elfos.h newlib-stdint.h ${tm_file}" + tmake_file="arc/t-arc-newlib arc/t-arc" + case x"${with_cpu}" in + xarc600|xarc601|xarc700) + target_cpu_default="TARGET_CPU_$with_cpu" + ;; + esac + ;; +arc*-*-linux-uclibc*) + extra_headers="arc-simd.h" + tm_file="dbxelf.h elfos.h linux.h ${tm_file}" + tmake_file="arc/t-arc-uClibc arc/t-arc" + case x"${with_cpu}" in + xarc600|xarc601|xarc700) + target_cpu_default="TARGET_CPU_$with_cpu" + ;; + esac + if test x${with_endian} = x; then + case ${target} in + arc*be-*-* | arc*eb-*-*) with_endian=big ;; + *) with_endian=little ;; + esac + fi + case ${with_endian} in + big|little) ;; + *) echo "with_endian=${with_endian} not supported."; exit 1 ;; + esac + case ${with_endian} in + big*) tm_defines="DRIVER_ENDIAN_SELF_SPECS=\\\"%{!EL:%{!mlittle-endian:-mbig-endian}}\\\" ${tm_defines}" + esac + ;; arm-wrs-vxworks) tm_file="elfos.h arm/elf.h arm/aout.h ${tm_file} vx-common.h vxworks.h arm/vxworks.h" extra_options="${extra_options} arm/vxworks.opt" @@ -2976,6 +3009,17 @@ done ;; + arc*-*-*) # was: arc*-*-linux-uclibc) + supported_defaults="cpu" + case $with_cpu in + arc600|arc601|arc700) + ;; + *) echo "Unknown cpu type" + exit 1 + ;; + esac + ;; + arm*-*-*) supported_defaults="arch cpu float tune fpu abi mode tls" for which in cpu tune; do Index: libstdc++-v3/acinclude.m4 =================================================================== --- libstdc++-v3/acinclude.m4 (revision 2572) +++ libstdc++-v3/acinclude.m4 (working copy) @@ -2927,6 +2927,8 @@ void foo() if AC_TRY_EVAL(ac_compile); then if grep _Unwind_SjLj_Resume conftest.s >/dev/null 2>&1 ; then enable_sjlj_exceptions=yes + elif grep _Unwind_SjLj_Register conftest.s >/dev/null 2>&1 ; then + enable_sjlj_exceptions=yes elif grep _Unwind_Resume conftest.s >/dev/null 2>&1 ; then enable_sjlj_exceptions=no elif grep __cxa_end_cleanup conftest.s >/dev/null 2>&1 ; then