Patchwork [U-Boot] powerpc/85xx/p5040: add CONFIG_SYS_PPC64, del CONFIG_SYS_FSL_ELBC_MULTIBIT_ECC

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Submitter Timur Tabi
Date Oct. 23, 2012, 8:48 p.m.
Message ID <1351025289-32614-1-git-send-email-timur@freescale.com>
Download mbox | patch
Permalink /patch/193573/
State Awaiting Upstream
Delegated to: Andy Fleming
Headers show

Comments

Timur Tabi - Oct. 23, 2012, 8:48 p.m.
The P5040 has an e5500 core, so CONFIG_SYS_PPC64 should be defined in
config_mpc85xx.h.  This macro was absent in the initial P5040 patch because
it crossed paths with the patch that introduced the macro.

Also delete CONFIG_SYS_FSL_ELBC_MULTIBIT_ECC, since it's not used in the
upstream U-Boot.  It's a holdover from the SDK.

Signed-off-by: Timur Tabi <timur@freescale.com>
---

This patch should be applied before "[v4] powerpc/85xx: add support for the
Freescale P5040DS Superhydra reference board"

 arch/powerpc/include/asm/config_mpc85xx.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

Patch

diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index 03baaee..6666d3d 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -449,6 +449,7 @@ 
 #define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034
 
 #elif defined(CONFIG_PPC_P5040)
+#define CONFIG_SYS_PPC64
 #define CONFIG_SYS_FSL_QORIQ_CHASSIS1
 #define CONFIG_MAX_CPUS			4
 #define CONFIG_SYS_FSL_NUM_CC_PLLS	3
@@ -472,7 +473,6 @@ 
 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003
 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003474
 #define CONFIG_SYS_FSL_ERRATUM_A004699
-#define CONFIG_SYS_FSL_ELBC_MULTIBIT_ECC
 #define CONFIG_SYS_FSL_ERRATUM_A004510
 #define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV	0x10
 #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000