Patchwork [U-Boot] powerpc/mpc85xx: Fix compiling error

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Submitter York Sun
Date Oct. 22, 2012, 5:06 p.m.
Message ID <1350925575-7130-1-git-send-email-yorksun@freescale.com>
Download mbox | patch
Permalink /patch/193239/
State Accepted, archived
Delegated to: Andy Fleming
Headers show

Comments

York Sun - Oct. 22, 2012, 5:06 p.m.
Fix compiling error introduced by adding new macro to simplify TLB in
start.S file.

Signed-off-by: York Sun <yorksun@freescale.com>
---
 arch/powerpc/cpu/mpc85xx/start.S |   32 ++++++++++++++++----------------
 1 file changed, 16 insertions(+), 16 deletions(-)

Patch

diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index bc2c0c9..8f5c5a5 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -350,27 +350,27 @@  l2_disabled:
  * bacause flash's virtual address maps to 0xff800000 - 0xffffffff.
  * and this window is outside of 4K boot window.
  */
-	create_tlb1_entry CONFIG_SYS_PPC_E500_DEBUG_TLB,
-		0, BOOKE_PAGESZ_4M,
-		CONFIG_SYS_MONITOR_BASE & 0xffc00000,  MAS2_I|MAS2_G,
-		0xffc00000, MAS3_SX|MAS3_SW|MAS3_SR,
+	create_tlb1_entry CONFIG_SYS_PPC_E500_DEBUG_TLB, \
+		0, BOOKE_PAGESZ_4M, \
+		CONFIG_SYS_MONITOR_BASE & 0xffc00000,  MAS2_I|MAS2_G, \
+		0xffc00000, MAS3_SX|MAS3_SW|MAS3_SR, \
 		0, r6
 
 #elif !defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SECURE_BOOT)
-	create_tlb1_entry CONFIG_SYS_PPC_E500_DEBUG_TLB,
-		0, BOOKE_PAGESZ_1M,
-		CONFIG_SYS_MONITOR_BASE, MAS2_I|MAS2_G,
-		CONFIG_SYS_PBI_FLASH_WINDOW, MAS3_SX|MAS3_SW|MAS3_SR,
+	create_tlb1_entry CONFIG_SYS_PPC_E500_DEBUG_TLB, \
+		0, BOOKE_PAGESZ_1M, \
+		CONFIG_SYS_MONITOR_BASE, MAS2_I|MAS2_G, \
+		CONFIG_SYS_PBI_FLASH_WINDOW, MAS3_SX|MAS3_SW|MAS3_SR, \
 		0, r6
 #else
 /*
  * TLB entry is created for IVPR + IVOR15 to map on valid OP code address
  * because "nexti" will resize TLB to 4K
  */
-	create_tlb1_entry CONFIG_SYS_PPC_E500_DEBUG_TLB,
-		0, BOOKE_PAGESZ_256K,
-		CONFIG_SYS_MONITOR_BASE, MAS2_I,
-		CONFIG_SYS_MONITOR_BASE, MAS3_SX|MAS3_SW|MAS3_SR,
+	create_tlb1_entry CONFIG_SYS_PPC_E500_DEBUG_TLB, \
+		0, BOOKE_PAGESZ_256K, \
+		CONFIG_SYS_MONITOR_BASE, MAS2_I, \
+		CONFIG_SYS_MONITOR_BASE, MAS3_SX|MAS3_SW|MAS3_SR, \
 		0, r6
 #endif
 #endif
@@ -490,10 +490,10 @@  l2_disabled:
 	 */
 
 	/* create a temp mapping TLB0[0] for LBCR  */
-	create_tlb0_entry 0,
-		0, BOOKE_PAGESZ_4K,
-		CONFIG_SYS_LBC_ADDR, MAS2_I|MAS2_G,
-		CONFIG_SYS_LBC_ADDR, MAS3_SW|MAS3_SR,
+	create_tlb0_entry 0, \
+		0, BOOKE_PAGESZ_4K, \
+		CONFIG_SYS_LBC_ADDR, MAS2_I|MAS2_G, \
+		CONFIG_SYS_LBC_ADDR, MAS3_SW|MAS3_SR, \
 		0, r6
 
 	/* Set LBCR register */