| Message ID | 1350922776-30909-5-git-send-email-swarren@wwwdotorg.org |
|---|---|
| State | Accepted |
| Delegated to: | Tom Warren |
| Headers | show |
Hi, On Mon, Oct 22, 2012 at 9:19 AM, Stephen Warren <swarren@wwwdotorg.org> wrote: > From: Stephen Warren <swarren@nvidia.com> > > Seaboard has a GPIO that switches an external mux between Tegra's debug > UART and SPI flash. This is initialized from the SPL so that SPL debug > output can be seen. Simplify the code that does this, and don't actually > request the GPIO in the SPL; just program it. This saves ~4.5K from the > size of the SPL, mostly BSS due to the large gpio_names[] table that is > no longer required. This makes Seaboard's SPL fit within the current max > size. > > Signed-off-by: Stephen Warren <swarren@nvidia.com> > Acked-by: Simon Glass <sjg@chromium.org> > Acked-by: Allen Martin <amartin@nvidia.com> I tested this series on seaboard. Tested-by: Simon Glass <sjg@chromium.org> > --- > v3: No change. > v2: New patch to replace modification of CONFIG_SYS_TEXT_BASE. > ---
Hi Stephen, On Mon, 22 Oct 2012 10:19:36 -0600, Stephen Warren <swarren@wwwdotorg.org> wrote: > From: Stephen Warren <swarren@nvidia.com> > > Seaboard has a GPIO that switches an external mux between Tegra's debug > UART and SPI flash. This is initialized from the SPL so that SPL debug > output can be seen. Simplify the code that does this, and don't actually > request the GPIO in the SPL; just program it. This saves ~4.5K from the > size of the SPL, mostly BSS due to the large gpio_names[] table that is > no longer required. This makes Seaboard's SPL fit within the current max > size. Is it possible to reorder the patch series so that Seaboard (and Ventana?) builds do not break temporarily between patch 2 and this patch? Amicalement,
On 10/27/2012 03:15 AM, Albert ARIBAUD wrote: > Hi Stephen, > > On Mon, 22 Oct 2012 10:19:36 -0600, Stephen Warren > <swarren@wwwdotorg.org> wrote: > >> From: Stephen Warren <swarren@nvidia.com> >> >> Seaboard has a GPIO that switches an external mux between Tegra's debug >> UART and SPI flash. This is initialized from the SPL so that SPL debug >> output can be seen. Simplify the code that does this, and don't actually >> request the GPIO in the SPL; just program it. This saves ~4.5K from the >> size of the SPL, mostly BSS due to the large gpio_names[] table that is >> no longer required. This makes Seaboard's SPL fit within the current max >> size. > > Is it possible to reorder the patch series so that Seaboard (and > Ventana?) builds do not break temporarily between patch 2 and this > patch? It would be possibel, although I'd personally rather call out the issue explicitly with a build break; if the build succeeds, you end up using code that silently causes memory corruption. Of course, this issue has been around for a while, so perhaps hiding it for another couple extra commits wouldn't be a big deal. Plus, the build break proves the assert in the .lds file works:-) But it's not big deal either way; feel free to re-order the commits if you want.
Hi Stephen, On Sat, 27 Oct 2012 20:09:20 -0600, Stephen Warren <swarren@wwwdotorg.org> wrote: > On 10/27/2012 03:15 AM, Albert ARIBAUD wrote: > > Hi Stephen, > > > > On Mon, 22 Oct 2012 10:19:36 -0600, Stephen Warren > > <swarren@wwwdotorg.org> wrote: > > > >> From: Stephen Warren <swarren@nvidia.com> > >> > >> Seaboard has a GPIO that switches an external mux between Tegra's debug > >> UART and SPI flash. This is initialized from the SPL so that SPL debug > >> output can be seen. Simplify the code that does this, and don't actually > >> request the GPIO in the SPL; just program it. This saves ~4.5K from the > >> size of the SPL, mostly BSS due to the large gpio_names[] table that is > >> no longer required. This makes Seaboard's SPL fit within the current max > >> size. > > > > Is it possible to reorder the patch series so that Seaboard (and > > Ventana?) builds do not break temporarily between patch 2 and this > > patch? > > It would be possibel, although I'd personally rather call out the issue > explicitly with a build break; if the build succeeds, you end up using > code that silently causes memory corruption. Of course, this issue has > been around for a while, so perhaps hiding it for another couple extra > commits wouldn't be a big deal. Plus, the build break proves the assert > in the .lds file works:-) But it's not big deal either way; feel free to > re-order the commits if you want. No need: your points are valid. Amicalement,
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c index ea431e9..c412c07 100644 --- a/board/nvidia/seaboard/seaboard.c +++ b/board/nvidia/seaboard/seaboard.c @@ -26,6 +26,7 @@ #include <asm/arch/tegra.h> #include <asm/arch/clock.h> #include <asm/arch/funcmux.h> +#include <asm/arch/gpio.h> #include <asm/arch/pinmux.h> #include <asm/arch-tegra/mmc.h> #include <asm/gpio.h> @@ -35,21 +36,14 @@ /* TODO: Remove this code when the SPI switch is working */ #if !defined(CONFIG_SPI_UART_SWITCH) && (CONFIG_MACH_TYPE != MACH_TYPE_VENTANA) -/* - * Routine: gpio_config_uart_seaboard - * Description: Force GPIO_PI3 low on Seaboard so UART4 works. - */ -static void gpio_config_uart_seaboard(void) +void gpio_early_init_uart(void) { /* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */ +#ifndef CONFIG_SPL_BUILD gpio_request(GPIO_PI3, NULL); +#endif gpio_direction_output(GPIO_PI3, 0); } - -void gpio_early_init_uart(void) -{ - gpio_config_uart_seaboard(); -} #endif #ifdef CONFIG_TEGRA_MMC