diff mbox

[U-Boot,v3] powerpc/usb: fix bug of CPU hang when missing USB PHY clock

Message ID 1350883104-31561-1-git-send-email-Shengzhou.Liu@freescale.com
State Accepted
Delegated to: Marek Vasut
Headers show

Commit Message

Shengzhou Liu Oct. 22, 2012, 5:18 a.m. UTC 
when missing USB PHY clock, u-boot will hang during USB
initialization when issuing "usb start". We should check
USBGP[PHY_CLK_VALID] bit to avoid CPU hanging in this case.

Due to controller issue of PHY_CLK_VALID in ULPI mode, we set
USB_EN before checking PHY_CLK_VALID, otherwise PHY_CLK_VALID
doesn't work.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
---
against master branch of upstream u-boot tree
v3: added explanation for set USB_EN earlier for ULPI case.
v2: integrated Marek's comment to use single negation.

 drivers/usb/host/ehci-fsl.c |   22 ++++++++++++++++------
 1 files changed, 16 insertions(+), 6 deletions(-)

Comments

Marek Vasut Oct. 22, 2012, 6:28 a.m. UTC | #1 
Dear Shengzhou Liu,

> when missing USB PHY clock, u-boot will hang during USB
> initialization when issuing "usb start". We should check
> USBGP[PHY_CLK_VALID] bit to avoid CPU hanging in this case.
> 
> Due to controller issue of PHY_CLK_VALID in ULPI mode, we set
> USB_EN before checking PHY_CLK_VALID, otherwise PHY_CLK_VALID
> doesn't work.
> 
> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
> Acked-by: Marek Vasut <marex@denx.de>
[...]

Applied, thanks

Best regards,
Marek Vasut
diff mbox

Patch

diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 7b8f033..f54b408 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -30,6 +30,18 @@ 
 
 #include "ehci.h"
 
+/* Check USB PHY clock valid */
+static int usb_phy_clk_valid(struct usb_ehci *ehci)
+{
+	if (!((in_be32(&ehci->control) & PHY_CLK_VALID) ||
+			in_be32(&ehci->prictrl))) {
+		printf("USB PHY clock invalid!\n");
+		return 0;
+	} else {
+		return 1;
+	}
+}
+
 /*
  * Create the appropriate control structures to manage
  * a new EHCI host controller.
@@ -82,18 +94,16 @@  int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
 		udelay(1000); /* delay required for PHY Clk to appear */
 #endif
 		out_le32(&(*hcor)->or_portsc[0], PORT_PTS_UTMI);
+		setbits_be32(&ehci->control, USB_EN);
 	} else {
-#if defined(CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY)
-		clrbits_be32(&ehci->control, UTMI_PHY_EN);
 		setbits_be32(&ehci->control, PHY_CLK_SEL_ULPI);
+		clrsetbits_be32(&ehci->control, UTMI_PHY_EN, USB_EN);
 		udelay(1000); /* delay required for PHY Clk to appear */
-#endif
+		if (!usb_phy_clk_valid(ehci))
+			return -EINVAL;
 		out_le32(&(*hcor)->or_portsc[0], PORT_PTS_ULPI);
 	}
 
-	/* Enable interface. */
-	setbits_be32(&ehci->control, USB_EN);
-
 	out_be32(&ehci->prictrl, 0x0000000c);
 	out_be32(&ehci->age_cnt_limit, 0x00000040);
 	out_be32(&ehci->sictrl, 0x00000001);