From patchwork Sat Oct 20 21:44:35 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [U-Boot,2/3] x86: Enable ICH6 GPIO controller for coreboot Date: Sat, 20 Oct 2012 11:44:35 -0000 From: Simon Glass X-Patchwork-Id: 192953 Message-Id: <1350769476-32163-2-git-send-email-sjg@chromium.org> To: U-Boot Mailing List Cc: Tom Rini Coreboot uses this controller to implement GPIO access. Signed-off-by: Simon Glass --- include/configs/coreboot.h | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 0e89242..2e084ee 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -99,6 +99,9 @@ #undef CONFIG_VIDEO #undef CONFIG_CFB_CONSOLE +/* x86 GPIOs are accessed through a PCI device */ +#define CONFIG_INTEL_ICH6_GPIO + /*----------------------------------------------------------------------- * Command line configuration. */