From patchwork Fri Oct 19 09:59:50 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mohammed Afzal X-Patchwork-Id: 192631 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from mail-gh0-f184.google.com (mail-gh0-f184.google.com [209.85.160.184]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 4B4722C0089 for ; Fri, 19 Oct 2012 21:00:02 +1100 (EST) Received: by mail-gh0-f184.google.com with SMTP id f11sf205663ghb.11 for ; Fri, 19 Oct 2012 02:59:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlegroups.com; s=20120806; h=x-beenthere:received-spf:from:to:cc:subject:date:message-id :x-mailer:in-reply-to:references:mime-version:x-original-sender :x-original-authentication-results:reply-to:precedence:mailing-list :list-id:x-google-group-id:list-post:list-help:list-archive:sender :list-subscribe:list-unsubscribe:content-type; bh=bTtVLP6cwh+pKQ+qCgVwp4ZoERTyHkxJm0CQQ4f09MQ=; b=AxnKN5xe+XxulPmQA+bZ7QlHARqNrKnjPLVdfa1ufBJriPDyd+6Iy3k4U9TPgzjogv A/UHg0CGQnIhIFpN66yXaRx0UaBlG8bMUvlETG1K85x6s/NGHy/zyGoAs+1fNGpkASnH 0JW8gWww9BJzZNk+Bn9F4jE/ZyR8OBNY+DXVXdBT4zmW/9QKVijOf9DssgI4eNX7cZAj mBXj7Pk+0J0YQbKIGc45AJCeoiLAozJs0BbyCSvLQU4XLvjxpRPxz2lg9pTByR5AKcLd LJLMzCBSrphEoHkntc8LriD1or/Xfvp5304JfqZ3Mvf/jQp3FJnLOQL7UdTDxlgwPq0N mm6Q== Received: by 10.50.213.33 with SMTP id np1mr251312igc.3.1350640799335; Fri, 19 Oct 2012 02:59:59 -0700 (PDT) X-BeenThere: rtc-linux@googlegroups.com Received: by 10.43.57.83 with SMTP id wf19ls3524460icb.8.gmail; Fri, 19 Oct 2012 02:59:59 -0700 (PDT) Received: by 10.43.105.135 with SMTP id dq7mr381382icc.3.1350640799042; Fri, 19 Oct 2012 02:59:59 -0700 (PDT) Received: by 10.43.105.135 with SMTP id dq7mr381381icc.3.1350640799029; Fri, 19 Oct 2012 02:59:59 -0700 (PDT) Received: from comal.ext.ti.com (comal.ext.ti.com. [198.47.26.152]) by gmr-mx.google.com with ESMTPS id ge7si164063igb.0.2012.10.19.02.59.58 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 19 Oct 2012 02:59:59 -0700 (PDT) Received-SPF: pass (google.com: domain of afzal@ti.com designates 198.47.26.152 as permitted sender) client-ip=198.47.26.152; Received: from dbdp20.itg.ti.com ([172.24.170.38]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id q9J9xsDC030981; Fri, 19 Oct 2012 04:59:55 -0500 Received: from DBDE71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id q9J9xpH8027366; Fri, 19 Oct 2012 15:29:52 +0530 (IST) Received: from dbdp32.itg.ti.com (172.24.170.251) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 14.1.323.3; Fri, 19 Oct 2012 15:29:51 +0530 Received: from psplinux063.india.ti.com (dbdp20.itg.ti.com [172.24.170.38]) by dbdp32.itg.ti.com (8.13.8/8.13.8) with ESMTP id q9J9xpBd021034; Fri, 19 Oct 2012 15:29:51 +0530 From: Afzal Mohammed To: Andrew Morton CC: Grant Likely , Rob Herring , Rob Landley , Sekhar Nori , Kevin Hilman , Russell King , Alessandro Zummo , , , , , , , Daniel Mack , Vaibhav Hiremath , Afzal Mohammed Subject: [rtc-linux] [PATCH v4 5/5] rtc: omap: Add runtime pm support Date: Fri, 19 Oct 2012 15:29:50 +0530 Message-ID: <85f1737925191eb340f294e1564aa9fe996dfb31.1350633036.git.afzal@ti.com> X-Mailer: git-send-email 1.7.12 In-Reply-To: References: MIME-Version: 1.0 X-Original-Sender: afzal@ti.com X-Original-Authentication-Results: gmr-mx.google.com; spf=pass (google.com: domain of afzal@ti.com designates 198.47.26.152 as permitted sender) smtp.mail=afzal@ti.com Reply-To: rtc-linux@googlegroups.com Precedence: list Mailing-list: list rtc-linux@googlegroups.com; contact rtc-linux+owners@googlegroups.com List-ID: X-Google-Group-Id: 712029733259 List-Post: , List-Help: , List-Archive: Sender: rtc-linux@googlegroups.com List-Subscribe: , List-Unsubscribe: , From: Vaibhav Hiremath OMAP1 RTC driver is used in multiple devices like, OMAPL138 and AM33XX. Driver currently doesn't handle any clocks, which may be right for OMAP1 architecture but in case of AM33XX, the clock/module needs to be enabled in order to access the registers. So covert this driver to runtime pm, which internally handles rest. afzal@ti.com: handle error path Signed-off-by: Vaibhav Hiremath Signed-off-by: Afzal Mohammed Acked-by: Sekhar Nori --- drivers/rtc/rtc-omap.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c index dff9ff4..6009714 100644 --- a/drivers/rtc/rtc-omap.c +++ b/drivers/rtc/rtc-omap.c @@ -22,6 +22,7 @@ #include #include #include +#include #include @@ -364,6 +365,10 @@ static int __init omap_rtc_probe(struct platform_device *pdev) goto fail; } + /* Enable the clock/module so that we can access the registers */ + pm_runtime_enable(&pdev->dev); + pm_runtime_get_sync(&pdev->dev); + id_entry = platform_get_device_id(pdev); if (id_entry && (id_entry->driver_data & OMAP_RTC_HAS_KICKER)) { rtc_writel(KICK0_VALUE, OMAP_RTC_KICK0_REG); @@ -448,6 +453,8 @@ fail1: fail0: if (id_entry && (id_entry->driver_data & OMAP_RTC_HAS_KICKER)) rtc_writel(0, OMAP_RTC_KICK0_REG); + pm_runtime_put_sync(&pdev->dev); + pm_runtime_disable(&pdev->dev); iounmap(rtc_base); fail: release_mem_region(mem->start, resource_size(mem)); @@ -474,6 +481,11 @@ static int __exit omap_rtc_remove(struct platform_device *pdev) rtc_device_unregister(rtc); if (id_entry && (id_entry->driver_data & OMAP_RTC_HAS_KICKER)) rtc_writel(0, OMAP_RTC_KICK0_REG); + + /* Disable the clock/module */ + pm_runtime_put_sync(&pdev->dev); + pm_runtime_disable(&pdev->dev); + iounmap(rtc_base); release_mem_region(mem->start, resource_size(mem)); return 0; @@ -496,11 +508,17 @@ static int omap_rtc_suspend(struct platform_device *pdev, pm_message_t state) else rtc_write(0, OMAP_RTC_INTERRUPTS_REG); + /* Disable the clock/module */ + pm_runtime_put_sync(&pdev->dev); + return 0; } static int omap_rtc_resume(struct platform_device *pdev) { + /* Enable the clock/module so that we can access the registers */ + pm_runtime_get_sync(&pdev->dev); + if (device_may_wakeup(&pdev->dev)) disable_irq_wake(omap_rtc_alarm); else