From patchwork Fri Oct 19 06:40:25 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Crosthwaite X-Patchwork-Id: 192570 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 4F3C72C007B for ; Fri, 19 Oct 2012 17:41:08 +1100 (EST) Received: from localhost ([::1]:55991 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TP6GY-0002hJ-8q for incoming@patchwork.ozlabs.org; Fri, 19 Oct 2012 02:41:06 -0400 Received: from eggs.gnu.org ([208.118.235.92]:51674) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TP6GJ-0002Vi-0o for qemu-devel@nongnu.org; Fri, 19 Oct 2012 02:40:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TP6GH-0003n1-Ki for qemu-devel@nongnu.org; Fri, 19 Oct 2012 02:40:50 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:34089) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TP6GH-0003iM-9T for qemu-devel@nongnu.org; Fri, 19 Oct 2012 02:40:49 -0400 Received: by mail-pb0-f45.google.com with SMTP id rp2so204353pbb.4 for ; Thu, 18 Oct 2012 23:40:48 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:in-reply-to:references:x-gm-message-state; bh=YZmkJn1rUO9NUOKosLl6zSm8psxYTGMHDhjABoRu92E=; b=IwcoO5HmXKXOyVMmN2tmgi2LF82pIdTMwp2g149ebK800ymuRmOC/gcx9J9bBcq2OV Szep0rXjmqVUwXzFA0wAXMn7V2YHFLvYKIryIikzx3Br2CiDWRzE+3Lxc5gIZwY37xL1 3lXOCzsDY/MhPnUWOg7biCPabVGjNVEnwQnb6GqWeqvQh1B7nMc1kCtGs7ribibbX1G9 M6CNIWpKKB1akJTPA95cst0kagUc0oUdnCtgzwsYO0PpUWoeLlxQgN797xUdJrTl5vaW wnG5dD687b0mEdoM8d6BbxAp5z10a8C5B+zIeAajQ/W2ZeHOWYjul85eeyz4UKqk/1H0 9gbA== Received: by 10.66.78.231 with SMTP id e7mr984939pax.44.1350628848859; Thu, 18 Oct 2012 23:40:48 -0700 (PDT) Received: from localhost ([124.148.20.9]) by mx.google.com with ESMTPS id rz10sm763246pbc.32.2012.10.18.23.40.46 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 18 Oct 2012 23:40:48 -0700 (PDT) From: Peter Crosthwaite To: qemu-devel@nongnu.org, edgar.iglesias@gmail.com, peter.maydell@linaro.org Date: Fri, 19 Oct 2012 16:40:25 +1000 Message-Id: X-Mailer: git-send-email 1.7.0.4 In-Reply-To: References: In-Reply-To: References: X-Gm-Message-State: ALoCoQmXQUAKGdAm210NrR7IZrlX6ZQYlYR2VJWQtG4xW9Wr/tTUfD/9Q4SJiWF1u7JPsREPB3ZD X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.160.45 Cc: Peter Crosthwaite , john.williams@xilinx.com Subject: [Qemu-devel] [PATCH v1 1/7] pflash_cfi0x: remove unused base field X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This field is completely unused. The base address should also be abstracted away from the device anyway. Removed. Signed-off-by: Peter Crosthwaite Reviewed-by: Peter Maydell --- hw/pflash_cfi01.c | 2 -- hw/pflash_cfi02.c | 4 +--- 2 files changed, 1 insertions(+), 5 deletions(-) diff --git a/hw/pflash_cfi01.c b/hw/pflash_cfi01.c index 3b437da..4f3f5f0 100644 --- a/hw/pflash_cfi01.c +++ b/hw/pflash_cfi01.c @@ -61,7 +61,6 @@ do { \ struct pflash_t { BlockDriverState *bs; - target_phys_addr_t base; target_phys_addr_t sector_len; target_phys_addr_t total_len; int width; @@ -594,7 +593,6 @@ pflash_t *pflash_cfi01_register(target_phys_addr_t base, } pfl->timer = qemu_new_timer_ns(vm_clock, pflash_timer, pfl); - pfl->base = base; pfl->sector_len = sector_len; pfl->total_len = total_len; pfl->width = width; diff --git a/hw/pflash_cfi02.c b/hw/pflash_cfi02.c index 39337ec..43fb3a4 100644 --- a/hw/pflash_cfi02.c +++ b/hw/pflash_cfi02.c @@ -56,7 +56,6 @@ do { \ struct pflash_t { BlockDriverState *bs; - target_phys_addr_t base; uint32_t sector_len; uint32_t chip_len; int mappings; @@ -602,7 +601,6 @@ pflash_t *pflash_cfi02_register(target_phys_addr_t base, name, size); vmstate_register_ram(&pfl->orig_mem, qdev); pfl->storage = memory_region_get_ram_ptr(&pfl->orig_mem); - pfl->base = base; pfl->chip_len = chip_len; pfl->mappings = nb_mappings; pfl->bs = bs; @@ -618,7 +616,7 @@ pflash_t *pflash_cfi02_register(target_phys_addr_t base, pflash_setup_mappings(pfl); pfl->rom_mode = 1; - memory_region_add_subregion(get_system_memory(), pfl->base, &pfl->mem); + memory_region_add_subregion(get_system_memory(), base, &pfl->mem); if (pfl->bs) { pfl->ro = bdrv_is_read_only(pfl->bs);