From patchwork Thu Oct 18 16:06:10 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: ARM: mach-imx: Support for DryIce RTC in i.MX53 Date: Thu, 18 Oct 2012 06:06:10 -0000 From: stigge@antcom.de X-Patchwork-Id: 192379 Message-Id: <1350576370-29098-3-git-send-email-stigge@antcom.de> To: a.zummo@towertech.it, grant.likely@secretlab.ca, rob.herring@calxeda.com, rtc-linux@googlegroups.com, linux-kernel@vger.kernel.org, devicetree-discuss@lists.ozlabs.org, s.hauer@pengutronix.de, linux-arm-kernel@lists.infradead.org Cc: Roland Stigge This patch enables support for i.MX53 in addition to i.MX25 by providing a dummy clock on i.MX53 since this one doesn't have a separate clock for internal RTC but the driver requests one. Signed-off-by: Roland Stigge --- arch/arm/mach-imx/clk-imx51-imx53.c | 1 + 1 file changed, 1 insertion(+) --- linux-2.6.orig/arch/arm/mach-imx/clk-imx51-imx53.c +++ linux-2.6/arch/arm/mach-imx/clk-imx51-imx53.c @@ -467,6 +467,7 @@ int __init mx53_clocks_init(unsigned lon clk_register_clkdev(clk[can1_serial_gate], "per", "53fc8000.can"); clk_register_clkdev(clk[can2_ipg_gate], "ipg", "53fcc000.can"); clk_register_clkdev(clk[can2_serial_gate], "per", "53fcc000.can"); + clk_register_clkdev(clk[dummy], NULL, "53fa4000.rtc"); /* set SDHC root clock to 200MHZ*/ clk_set_rate(clk[esdhc_a_podf], 200000000);