Patchwork [v11,13/14] target-mips: Add ASE DSP testcases

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Submitter Jia Liu
Date Oct. 15, 2012, 4:39 p.m.
Message ID <1350319158-7263-14-git-send-email-proljc@gmail.com>
Download mbox | patch
Permalink /patch/191596/
State New
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Jia Liu - Oct. 15, 2012, 4:39 p.m.
Add MIPS ASE DSP testcases.

Signed-off-by: Jia Liu <proljc@gmail.com>
---
 tests/tcg/mips/mips32-dsp/Makefile             |  135 +++++++++++
 tests/tcg/mips/mips32-dsp/absq_s_ph.c          |   31 +++
 tests/tcg/mips/mips32-dsp/absq_s_w.c           |   37 +++
 tests/tcg/mips/mips32-dsp/addq_ph.c            |   30 +++
 tests/tcg/mips/mips32-dsp/addq_s_ph.c          |   30 +++
 tests/tcg/mips/mips32-dsp/addsc.c              |   30 +++
 tests/tcg/mips/mips32-dsp/addu_qb.c            |   30 +++
 tests/tcg/mips/mips32-dsp/addu_s_qb.c          |   30 +++
 tests/tcg/mips/mips32-dsp/addwc.c              |   30 +++
 tests/tcg/mips/mips32-dsp/bitrev.c             |   20 ++
 tests/tcg/mips/mips32-dsp/bposge32.c           |   44 ++++
 tests/tcg/mips/mips32-dsp/cmp_eq_ph.c          |   35 +++
 tests/tcg/mips/mips32-dsp/cmp_le_ph.c          |   35 +++
 tests/tcg/mips/mips32-dsp/cmp_lt_ph.c          |   35 +++
 tests/tcg/mips/mips32-dsp/cmpgu_eq_qb.c        |   31 +++
 tests/tcg/mips/mips32-dsp/cmpgu_le_qb.c        |   31 +++
 tests/tcg/mips/mips32-dsp/cmpgu_lt_qb.c        |   31 +++
 tests/tcg/mips/mips32-dsp/cmpu_eq_qb.c         |   35 +++
 tests/tcg/mips/mips32-dsp/cmpu_le_qb.c         |   35 +++
 tests/tcg/mips/mips32-dsp/cmpu_lt_qb.c         |   35 +++
 tests/tcg/mips/mips32-dsp/dpaq_s_w_ph.c        |   31 +++
 tests/tcg/mips/mips32-dsp/dpaq_sa_l_w.c        |   31 +++
 tests/tcg/mips/mips32-dsp/dpau_h_qbl.c         |   27 +++
 tests/tcg/mips/mips32-dsp/dpau_h_qbr.c         |   27 +++
 tests/tcg/mips/mips32-dsp/dpsq_s_w_ph.c        |   27 +++
 tests/tcg/mips/mips32-dsp/dpsq_sa_l_w.c        |   31 +++
 tests/tcg/mips/mips32-dsp/dpsu_h_qbl.c         |   27 +++
 tests/tcg/mips/mips32-dsp/dpsu_h_qbr.c         |   27 +++
 tests/tcg/mips/mips32-dsp/extp.c               |   44 ++++
 tests/tcg/mips/mips32-dsp/extpdp.c             |   46 ++++
 tests/tcg/mips/mips32-dsp/extpdpv.c            |   47 ++++
 tests/tcg/mips/mips32-dsp/extpv.c              |   45 ++++
 tests/tcg/mips/mips32-dsp/extr_r_w.c           |   25 ++
 tests/tcg/mips/mips32-dsp/extr_rs_w.c          |   25 ++
 tests/tcg/mips/mips32-dsp/extr_s_h.c           |   25 ++
 tests/tcg/mips/mips32-dsp/extr_w.c             |   25 ++
 tests/tcg/mips/mips32-dsp/extrv_r_w.c          |   29 +++
 tests/tcg/mips/mips32-dsp/extrv_rs_w.c         |   29 +++
 tests/tcg/mips/mips32-dsp/extrv_s_h.c          |   29 +++
 tests/tcg/mips/mips32-dsp/extrv_w.c            |   29 +++
 tests/tcg/mips/mips32-dsp/insv.c               |   23 ++
 tests/tcg/mips/mips32-dsp/lbux.c               |   25 ++
 tests/tcg/mips/mips32-dsp/lhx.c                |   25 ++
 tests/tcg/mips/mips32-dsp/lwx.c                |   25 ++
 tests/tcg/mips/mips32-dsp/madd.c               |   31 +++
 tests/tcg/mips/mips32-dsp/maddu.c              |   31 +++
 tests/tcg/mips/mips32-dsp/main.c               |    6 +
 tests/tcg/mips/mips32-dsp/maq_s_w_phl.c        |   31 +++
 tests/tcg/mips/mips32-dsp/maq_s_w_phr.c        |   31 +++
 tests/tcg/mips/mips32-dsp/maq_sa_w_phl.c       |   31 +++
 tests/tcg/mips/mips32-dsp/maq_sa_w_phr.c       |   31 +++
 tests/tcg/mips/mips32-dsp/mfhi.c               |   21 ++
 tests/tcg/mips/mips32-dsp/mflo.c               |   21 ++
 tests/tcg/mips/mips32-dsp/modsub.c             |   30 +++
 tests/tcg/mips/mips32-dsp/msub.c               |   30 +++
 tests/tcg/mips/mips32-dsp/msubu.c              |   30 +++
 tests/tcg/mips/mips32-dsp/mthi.c               |   21 ++
 tests/tcg/mips/mips32-dsp/mthlip.c             |   34 +++
 tests/tcg/mips/mips32-dsp/mtlo.c               |   21 ++
 tests/tcg/mips/mips32-dsp/muleq_s_w_phl.c      |   41 ++++
 tests/tcg/mips/mips32-dsp/muleq_s_w_phr.c      |   40 ++++
 tests/tcg/mips/mips32-dsp/muleu_s_ph_qbl.c     |   25 ++
 tests/tcg/mips/mips32-dsp/muleu_s_ph_qbr.c     |   25 ++
 tests/tcg/mips/mips32-dsp/mulq_rs_ph.c         |   25 ++
 tests/tcg/mips/mips32-dsp/mult.c               |   24 ++
 tests/tcg/mips/mips32-dsp/multu.c              |   24 ++
 tests/tcg/mips/mips32-dsp/packrl_ph.c          |   21 ++
 tests/tcg/mips/mips32-dsp/pick_ph.c            |   23 ++
 tests/tcg/mips/mips32-dsp/pick_qb.c            |   23 ++
 tests/tcg/mips/mips32-dsp/preceq_w_phl.c       |   20 ++
 tests/tcg/mips/mips32-dsp/preceq_w_phr.c       |   20 ++
 tests/tcg/mips/mips32-dsp/precequ_ph_qbl.c     |   20 ++
 tests/tcg/mips/mips32-dsp/precequ_ph_qbla.c    |   20 ++
 tests/tcg/mips/mips32-dsp/precequ_ph_qbr.c     |   20 ++
 tests/tcg/mips/mips32-dsp/precequ_ph_qbra.c    |   20 ++
 tests/tcg/mips/mips32-dsp/preceu_ph_qbl.c      |   20 ++
 tests/tcg/mips/mips32-dsp/preceu_ph_qbla.c     |   20 ++
 tests/tcg/mips/mips32-dsp/preceu_ph_qbr.c      |   20 ++
 tests/tcg/mips/mips32-dsp/preceu_ph_qbra.c     |   20 ++
 tests/tcg/mips/mips32-dsp/precrq_ph_w.c        |   21 ++
 tests/tcg/mips/mips32-dsp/precrq_qb_ph.c       |   21 ++
 tests/tcg/mips/mips32-dsp/precrq_rs_ph_w.c     |   21 ++
 tests/tcg/mips/mips32-dsp/precrqu_s_qb_ph.c    |   21 ++
 tests/tcg/mips/mips32-dsp/raddu_w_qb.c         |   20 ++
 tests/tcg/mips/mips32-dsp/rddsp.c              |   54 +++++
 tests/tcg/mips/mips32-dsp/repl_ph.c            |   23 ++
 tests/tcg/mips/mips32-dsp/repl_qb.c            |   16 ++
 tests/tcg/mips/mips32-dsp/replv_ph.c           |   19 ++
 tests/tcg/mips/mips32-dsp/replv_qb.c           |   19 ++
 tests/tcg/mips/mips32-dsp/shilo.c              |   27 +++
 tests/tcg/mips/mips32-dsp/shilov.c             |   29 +++
 tests/tcg/mips/mips32-dsp/shll_ph.c            |   24 ++
 tests/tcg/mips/mips32-dsp/shll_qb.c            |   23 ++
 tests/tcg/mips/mips32-dsp/shll_s_ph.c          |   24 ++
 tests/tcg/mips/mips32-dsp/shll_s_w.c           |   24 ++
 tests/tcg/mips/mips32-dsp/shllv_ph.c           |   25 ++
 tests/tcg/mips/mips32-dsp/shllv_qb.c           |   24 ++
 tests/tcg/mips/mips32-dsp/shllv_s_ph.c         |   25 ++
 tests/tcg/mips/mips32-dsp/shllv_s_w.c          |   25 ++
 tests/tcg/mips/mips32-dsp/shra_ph.c            |   20 ++
 tests/tcg/mips/mips32-dsp/shra_r_ph.c          |   20 ++
 tests/tcg/mips/mips32-dsp/shra_r_w.c           |   20 ++
 tests/tcg/mips/mips32-dsp/shrav_ph.c           |   21 ++
 tests/tcg/mips/mips32-dsp/shrav_r_ph.c         |   21 ++
 tests/tcg/mips/mips32-dsp/shrav_r_w.c          |   21 ++
 tests/tcg/mips/mips32-dsp/shrl_qb.c            |   20 ++
 tests/tcg/mips/mips32-dsp/shrlv_qb.c           |   21 ++
 tests/tcg/mips/mips32-dsp/subq_ph.c            |   25 ++
 tests/tcg/mips/mips32-dsp/subq_s_ph.c          |   25 ++
 tests/tcg/mips/mips32-dsp/subq_s_w.c           |   25 ++
 tests/tcg/mips/mips32-dsp/subu_qb.c            |   25 ++
 tests/tcg/mips/mips32-dsp/subu_s_qb.c          |   25 ++
 tests/tcg/mips/mips32-dsp/wrdsp.c              |   54 +++++
 tests/tcg/mips/mips32-dspr2/Makefile           |   72 ++++++
 tests/tcg/mips/mips32-dspr2/absq_s_qb.c        |   35 +++
 tests/tcg/mips/mips32-dspr2/addqh_ph.c         |   30 +++
 tests/tcg/mips/mips32-dspr2/addqh_r_ph.c       |   30 +++
 tests/tcg/mips/mips32-dspr2/addqh_r_w.c        |   34 +++
 tests/tcg/mips/mips32-dspr2/addqh_w.c          |   34 +++
 tests/tcg/mips/mips32-dspr2/addu_ph.c          |   30 +++
 tests/tcg/mips/mips32-dspr2/addu_s_ph.c        |   30 +++
 tests/tcg/mips/mips32-dspr2/adduh_qb.c         |   30 +++
 tests/tcg/mips/mips32-dspr2/adduh_r_qb.c       |   30 +++
 tests/tcg/mips/mips32-dspr2/append.c           |   30 +++
 tests/tcg/mips/mips32-dspr2/balign.c           |   30 +++
 tests/tcg/mips/mips32-dspr2/cmpgdu_eq_qb.c     |   37 +++
 tests/tcg/mips/mips32-dspr2/cmpgdu_le_qb.c     |   37 +++
 tests/tcg/mips/mips32-dspr2/cmpgdu_lt_qb.c     |   37 +++
 tests/tcg/mips/mips32-dspr2/dpa_w_ph.c         |   27 +++
 tests/tcg/mips/mips32-dspr2/dpaqx_s_w_ph.c     |   57 +++++
 tests/tcg/mips/mips32-dspr2/dpaqx_sa_w_ph.c    |   31 +++
 tests/tcg/mips/mips32-dspr2/dpax_w_ph.c        |   27 +++
 tests/tcg/mips/mips32-dspr2/dps_w_ph.c         |   27 +++
 tests/tcg/mips/mips32-dspr2/dpsqx_s_w_ph.c     |   31 +++
 tests/tcg/mips/mips32-dspr2/dpsqx_sa_w_ph.c    |   31 +++
 tests/tcg/mips/mips32-dspr2/dpsx_w_ph.c        |   27 +++
 tests/tcg/mips/mips32-dspr2/mul_ph.c           |   25 ++
 tests/tcg/mips/mips32-dspr2/mul_s_ph.c         |   25 ++
 tests/tcg/mips/mips32-dspr2/muleq_s_w_phl.c    |   40 ++++
 tests/tcg/mips/mips32-dspr2/mulq_rs_w.c        |   36 +++
 tests/tcg/mips/mips32-dspr2/mulq_s_ph.c        |   25 ++
 tests/tcg/mips/mips32-dspr2/mulq_s_w.c         |   36 +++
 tests/tcg/mips/mips32-dspr2/mulsa_w_ph.c       |   29 +++
 tests/tcg/mips/mips32-dspr2/mulsaq_s_w_ph.c    |   29 +++
 tests/tcg/mips/mips32-dspr2/precr_qb_ph.c      |   21 ++
 tests/tcg/mips/mips32-dspr2/precr_sra_ph_w.c   |   32 +++
 tests/tcg/mips/mips32-dspr2/precr_sra_r_ph_w.c |   32 +++
 tests/tcg/mips/mips32-dspr2/prepend.c          |   30 +++
 tests/tcg/mips/mips32-dspr2/shra_qb.c          |   30 +++
 tests/tcg/mips/mips32-dspr2/shra_r_qb.c        |   30 +++
 tests/tcg/mips/mips32-dspr2/shrav_qb.c         |   32 +++
 tests/tcg/mips/mips32-dspr2/shrav_r_qb.c       |   32 +++
 tests/tcg/mips/mips32-dspr2/shrl_ph.c          |   20 ++
 tests/tcg/mips/mips32-dspr2/shrlv_ph.c         |   21 ++
 tests/tcg/mips/mips32-dspr2/subqh_ph.c         |   21 ++
 tests/tcg/mips/mips32-dspr2/subqh_r_ph.c       |   21 ++
 tests/tcg/mips/mips32-dspr2/subqh_r_w.c        |   21 ++
 tests/tcg/mips/mips32-dspr2/subqh_w.c          |   21 ++
 tests/tcg/mips/mips32-dspr2/subu_ph.c          |   25 ++
 tests/tcg/mips/mips32-dspr2/subu_s_ph.c        |   25 ++
 tests/tcg/mips/mips32-dspr2/subuh_qb.c         |   21 ++
 tests/tcg/mips/mips32-dspr2/subuh_r_qb.c       |   21 ++
 tests/tcg/mips/mips64-dsp/Makefile             |  305 ++++++++++++++++++++++++
 tests/tcg/mips/mips64-dsp/absq_s_ob.c          |   63 +++++
 tests/tcg/mips/mips64-dsp/absq_s_ph.c          |   37 +++
 tests/tcg/mips/mips64-dsp/absq_s_pw.c          |   66 +++++
 tests/tcg/mips/mips64-dsp/absq_s_qh.c          |   40 ++++
 tests/tcg/mips/mips64-dsp/absq_s_w.c           |   48 ++++
 tests/tcg/mips/mips64-dsp/addq_ph.c            |   37 +++
 tests/tcg/mips/mips64-dsp/addq_pw.c            |   26 ++
 tests/tcg/mips/mips64-dsp/addq_qh.c            |   28 +++
 tests/tcg/mips/mips64-dsp/addq_s_ph.c          |   37 +++
 tests/tcg/mips/mips64-dsp/addq_s_pw.c          |   45 ++++
 tests/tcg/mips/mips64-dsp/addq_s_qh.c          |   26 ++
 tests/tcg/mips/mips64-dsp/addsc.c              |   37 +++
 tests/tcg/mips/mips64-dsp/addu_ob.c            |   27 +++
 tests/tcg/mips/mips64-dsp/addu_qb.c            |   37 +++
 tests/tcg/mips/mips64-dsp/addu_s_ob.c          |   27 +++
 tests/tcg/mips/mips64-dsp/addu_s_qb.c          |   38 +++
 tests/tcg/mips/mips64-dsp/addwc.c              |   37 +++
 tests/tcg/mips/mips64-dsp/bitrev.c             |   23 ++
 tests/tcg/mips/mips64-dsp/bposge32.c           |   50 ++++
 tests/tcg/mips/mips64-dsp/bposge64.c           |   50 ++++
 tests/tcg/mips/mips64-dsp/cmp_eq_ph.c          |   42 ++++
 tests/tcg/mips/mips64-dsp/cmp_eq_pw.c          |   27 +++
 tests/tcg/mips/mips64-dsp/cmp_eq_qh.c          |   27 +++
 tests/tcg/mips/mips64-dsp/cmp_le_ph.c          |   40 ++++
 tests/tcg/mips/mips64-dsp/cmp_le_pw.c          |   27 +++
 tests/tcg/mips/mips64-dsp/cmp_le_qh.c          |   27 +++
 tests/tcg/mips/mips64-dsp/cmp_lt_ph.c          |   41 ++++
 tests/tcg/mips/mips64-dsp/cmp_lt_pw.c          |   27 +++
 tests/tcg/mips/mips64-dsp/cmp_lt_qh.c          |   27 +++
 tests/tcg/mips/mips64-dsp/cmpgu_eq_ob.c        |   24 ++
 tests/tcg/mips/mips64-dsp/cmpgu_eq_qb.c        |   38 +++
 tests/tcg/mips/mips64-dsp/cmpgu_le_ob.c        |   24 ++
 tests/tcg/mips/mips64-dsp/cmpgu_le_qb.c        |   37 +++
 tests/tcg/mips/mips64-dsp/cmpgu_lt_ob.c        |   24 ++
 tests/tcg/mips/mips64-dsp/cmpgu_lt_qb.c        |   38 +++
 tests/tcg/mips/mips64-dsp/cmpu_eq_ob.c         |   27 +++
 tests/tcg/mips/mips64-dsp/cmpu_eq_qb.c         |   42 ++++
 tests/tcg/mips/mips64-dsp/cmpu_le_ob.c         |   26 ++
 tests/tcg/mips/mips64-dsp/cmpu_le_qb.c         |   41 ++++
 tests/tcg/mips/mips64-dsp/cmpu_lt_ob.c         |   26 ++
 tests/tcg/mips/mips64-dsp/cmpu_lt_qb.c         |   42 ++++
 tests/tcg/mips/mips64-dsp/dappend.c            |   37 +++
 tests/tcg/mips/mips64-dsp/dextp.c              |   33 +++
 tests/tcg/mips/mips64-dsp/dextpdp.c            |   37 +++
 tests/tcg/mips/mips64-dsp/dextpdpv.c           |   38 +++
 tests/tcg/mips/mips64-dsp/dextpv.c             |   34 +++
 tests/tcg/mips/mips64-dsp/dextr_l.c            |   27 +++
 tests/tcg/mips/mips64-dsp/dextr_r_l.c          |   32 +++
 tests/tcg/mips/mips64-dsp/dextr_r_w.c          |   32 +++
 tests/tcg/mips/mips64-dsp/dextr_rs_l.c         |   31 +++
 tests/tcg/mips/mips64-dsp/dextr_rs_w.c         |   31 +++
 tests/tcg/mips/mips64-dsp/dextr_s_h.c          |   31 +++
 tests/tcg/mips/mips64-dsp/dextr_w.c            |   27 +++
 tests/tcg/mips/mips64-dsp/dextrv_l.c           |   28 +++
 tests/tcg/mips/mips64-dsp/dextrv_r_l.c         |   33 +++
 tests/tcg/mips/mips64-dsp/dextrv_r_w.c         |   33 +++
 tests/tcg/mips/mips64-dsp/dextrv_rs_l.c        |   32 +++
 tests/tcg/mips/mips64-dsp/dextrv_rs_w.c        |   32 +++
 tests/tcg/mips/mips64-dsp/dextrv_s_h.c         |   32 +++
 tests/tcg/mips/mips64-dsp/dextrv_w.c           |   28 +++
 tests/tcg/mips/mips64-dsp/dinsv.c              |   25 ++
 tests/tcg/mips/mips64-dsp/dmadd.c              |   57 +++++
 tests/tcg/mips/mips64-dsp/dmaddu.c             |   56 +++++
 tests/tcg/mips/mips64-dsp/dmsub.c              |   59 +++++
 tests/tcg/mips/mips64-dsp/dmsubu.c             |   59 +++++
 tests/tcg/mips/mips64-dsp/dmthlip.c            |   32 +++
 tests/tcg/mips/mips64-dsp/dpaq_s_w_ph.c        |   32 +++
 tests/tcg/mips/mips64-dsp/dpaq_s_w_qh.c        |   57 +++++
 tests/tcg/mips/mips64-dsp/dpaq_sa_l_pw.c       |   62 +++++
 tests/tcg/mips/mips64-dsp/dpaq_sa_l_w.c        |   32 +++
 tests/tcg/mips/mips64-dsp/dpau_h_obl.c         |   59 +++++
 tests/tcg/mips/mips64-dsp/dpau_h_obr.c         |   59 +++++
 tests/tcg/mips/mips64-dsp/dpau_h_qbl.c         |   29 +++
 tests/tcg/mips/mips64-dsp/dpau_h_qbr.c         |   29 +++
 tests/tcg/mips/mips64-dsp/dpsq_s_w_ph.c        |   29 +++
 tests/tcg/mips/mips64-dsp/dpsq_s_w_qh.c        |   33 +++
 tests/tcg/mips/mips64-dsp/dpsq_sa_l_pw.c       |   39 +++
 tests/tcg/mips/mips64-dsp/dpsq_sa_l_w.c        |   32 +++
 tests/tcg/mips/mips64-dsp/dpsu_h_obl.c         |   32 +++
 tests/tcg/mips/mips64-dsp/dpsu_h_obr.c         |   32 +++
 tests/tcg/mips/mips64-dsp/dpsu_h_qbl.c         |   29 +++
 tests/tcg/mips/mips64-dsp/dpsu_h_qbr.c         |   29 +++
 tests/tcg/mips/mips64-dsp/dshilo.c             |   31 +++
 tests/tcg/mips/mips64-dsp/dshilov.c            |   32 +++
 tests/tcg/mips/mips64-dsp/extp.c               |   50 ++++
 tests/tcg/mips/mips64-dsp/extpdp.c             |   51 ++++
 tests/tcg/mips/mips64-dsp/extpdpv.c            |   52 ++++
 tests/tcg/mips/mips64-dsp/extpv.c              |   51 ++++
 tests/tcg/mips/mips64-dsp/extr_r_w.c           |   27 +++
 tests/tcg/mips/mips64-dsp/extr_rs_w.c          |   27 +++
 tests/tcg/mips/mips64-dsp/extr_s_h.c           |   27 +++
 tests/tcg/mips/mips64-dsp/extr_w.c             |   27 +++
 tests/tcg/mips/mips64-dsp/extrv_r_w.c          |   31 +++
 tests/tcg/mips/mips64-dsp/extrv_rs_w.c         |   31 +++
 tests/tcg/mips/mips64-dsp/extrv_s_h.c          |   31 +++
 tests/tcg/mips/mips64-dsp/extrv_w.c            |   31 +++
 tests/tcg/mips/mips64-dsp/head.S               |   16 ++
 tests/tcg/mips/mips64-dsp/insv.c               |   26 ++
 tests/tcg/mips/mips64-dsp/io.h                 |   22 ++
 tests/tcg/mips/mips64-dsp/lbux.c               |   27 +++
 tests/tcg/mips/mips64-dsp/ldx.c                |   27 +++
 tests/tcg/mips/mips64-dsp/lhx.c                |   27 +++
 tests/tcg/mips/mips64-dsp/lwx.c                |   27 +++
 tests/tcg/mips/mips64-dsp/madd.c               |   33 +++
 tests/tcg/mips/mips64-dsp/maddu.c              |   33 +++
 tests/tcg/mips/mips64-dsp/maq_s_l_pwl.c        |   56 +++++
 tests/tcg/mips/mips64-dsp/maq_s_l_pwr.c        |   56 +++++
 tests/tcg/mips/mips64-dsp/maq_s_w_phl.c        |   33 +++
 tests/tcg/mips/mips64-dsp/maq_s_w_phr.c        |   33 +++
 tests/tcg/mips/mips64-dsp/maq_s_w_qhll.c       |   62 +++++
 tests/tcg/mips/mips64-dsp/maq_s_w_qhlr.c       |   62 +++++
 tests/tcg/mips/mips64-dsp/maq_s_w_qhrl.c       |   63 +++++
 tests/tcg/mips/mips64-dsp/maq_s_w_qhrr.c       |   63 +++++
 tests/tcg/mips/mips64-dsp/maq_sa_w_phl.c       |   33 +++
 tests/tcg/mips/mips64-dsp/maq_sa_w_phr.c       |   33 +++
 tests/tcg/mips/mips64-dsp/maq_sa_w_qhll.c      |   62 +++++
 tests/tcg/mips/mips64-dsp/maq_sa_w_qhlr.c      |   64 +++++
 tests/tcg/mips/mips64-dsp/maq_sa_w_qhrl.c      |   64 +++++
 tests/tcg/mips/mips64-dsp/maq_sa_w_qhrr.c      |   64 +++++
 tests/tcg/mips/mips64-dsp/mfhi.c               |   24 ++
 tests/tcg/mips/mips64-dsp/mflo.c               |   24 ++
 tests/tcg/mips/mips64-dsp/mips_boot.lds        |   31 +++
 tests/tcg/mips/mips64-dsp/modsub.c             |   37 +++
 tests/tcg/mips/mips64-dsp/msub.c               |   32 +++
 tests/tcg/mips/mips64-dsp/msubu.c              |   32 +++
 tests/tcg/mips/mips64-dsp/mthi.c               |   24 ++
 tests/tcg/mips/mips64-dsp/mthlip.c             |   35 +++
 tests/tcg/mips/mips64-dsp/mtlo.c               |   22 ++
 tests/tcg/mips/mips64-dsp/muleq_s_pw_qhl.c     |   55 +++++
 tests/tcg/mips/mips64-dsp/muleq_s_pw_qhr.c     |   24 ++
 tests/tcg/mips/mips64-dsp/muleq_s_w_phl.c      |   46 ++++
 tests/tcg/mips/mips64-dsp/muleq_s_w_phr.c      |   45 ++++
 tests/tcg/mips/mips64-dsp/muleu_s_ph_qbl.c     |   27 +++
 tests/tcg/mips/mips64-dsp/muleu_s_ph_qbr.c     |   27 +++
 tests/tcg/mips/mips64-dsp/muleu_s_qh_obl.c     |   25 ++
 tests/tcg/mips/mips64-dsp/muleu_s_qh_obr.c     |   25 ++
 tests/tcg/mips/mips64-dsp/mulq_rs_ph.c         |   27 +++
 tests/tcg/mips/mips64-dsp/mulq_rs_qh.c         |   33 +++
 tests/tcg/mips/mips64-dsp/mulsaq_s_l_pw.c      |   59 +++++
 tests/tcg/mips/mips64-dsp/mulsaq_s_w_qh.c      |   57 +++++
 tests/tcg/mips/mips64-dsp/mult.c               |   26 ++
 tests/tcg/mips/mips64-dsp/multu.c              |   26 ++
 tests/tcg/mips/mips64-dsp/packrl_ph.c          |   24 ++
 tests/tcg/mips/mips64-dsp/packrl_pw.c          |   24 ++
 tests/tcg/mips/mips64-dsp/pick_ob.c            |   27 +++
 tests/tcg/mips/mips64-dsp/pick_ph.c            |   26 ++
 tests/tcg/mips/mips64-dsp/pick_pw.c            |   28 +++
 tests/tcg/mips/mips64-dsp/pick_qb.c            |   26 ++
 tests/tcg/mips/mips64-dsp/pick_qh.c            |   28 +++
 tests/tcg/mips/mips64-dsp/preceq_l_pwl.c       |   24 ++
 tests/tcg/mips/mips64-dsp/preceq_l_pwr.c       |   24 ++
 tests/tcg/mips/mips64-dsp/preceq_pw_qhl.c      |   21 ++
 tests/tcg/mips/mips64-dsp/preceq_pw_qhla.c     |   23 ++
 tests/tcg/mips/mips64-dsp/preceq_pw_qhr.c      |   21 ++
 tests/tcg/mips/mips64-dsp/preceq_pw_qhra.c     |   23 ++
 tests/tcg/mips/mips64-dsp/preceq_w_phl.c       |   23 ++
 tests/tcg/mips/mips64-dsp/preceq_w_phr.c       |   23 ++
 tests/tcg/mips/mips64-dsp/precequ_ph_qbl.c     |   23 ++
 tests/tcg/mips/mips64-dsp/precequ_ph_qbla.c    |   23 ++
 tests/tcg/mips/mips64-dsp/precequ_ph_qbr.c     |   23 ++
 tests/tcg/mips/mips64-dsp/precequ_ph_qbra.c    |   23 ++
 tests/tcg/mips/mips64-dsp/precequ_qh_obl.c     |   22 ++
 tests/tcg/mips/mips64-dsp/precequ_qh_obla.c    |   22 ++
 tests/tcg/mips/mips64-dsp/precequ_qh_obr.c     |   24 ++
 tests/tcg/mips/mips64-dsp/precequ_qh_obra.c    |   24 ++
 tests/tcg/mips/mips64-dsp/preceu_ph_qbl.c      |   23 ++
 tests/tcg/mips/mips64-dsp/preceu_ph_qbla.c     |   23 ++
 tests/tcg/mips/mips64-dsp/preceu_ph_qbr.c      |   23 ++
 tests/tcg/mips/mips64-dsp/preceu_ph_qbra.c     |   23 ++
 tests/tcg/mips/mips64-dsp/preceu_qh_obl.c      |   22 ++
 tests/tcg/mips/mips64-dsp/preceu_qh_obla.c     |   22 ++
 tests/tcg/mips/mips64-dsp/preceu_qh_obr.c      |   23 ++
 tests/tcg/mips/mips64-dsp/preceu_qh_obra.c     |   23 ++
 tests/tcg/mips/mips64-dsp/precr_ob_qh.c        |   25 ++
 tests/tcg/mips/mips64-dsp/precr_sra_qh_pw.c    |   40 ++++
 tests/tcg/mips/mips64-dsp/precr_sra_r_qh_pw.c  |   40 ++++
 tests/tcg/mips/mips64-dsp/precrq_ob_qh.c       |   25 ++
 tests/tcg/mips/mips64-dsp/precrq_ph_w.c        |   24 ++
 tests/tcg/mips/mips64-dsp/precrq_pw_l.c        |   25 ++
 tests/tcg/mips/mips64-dsp/precrq_qb_ph.c       |   24 ++
 tests/tcg/mips/mips64-dsp/precrq_qh_pw.c       |   25 ++
 tests/tcg/mips/mips64-dsp/precrq_rs_ph_w.c     |   24 ++
 tests/tcg/mips/mips64-dsp/precrq_rs_qh_pw.c    |   25 ++
 tests/tcg/mips/mips64-dsp/precrqu_s_ob_qh.c    |   27 +++
 tests/tcg/mips/mips64-dsp/precrqu_s_qb_ph.c    |   24 ++
 tests/tcg/mips/mips64-dsp/prependd.c           |   37 +++
 tests/tcg/mips/mips64-dsp/prependw.c           |   37 +++
 tests/tcg/mips/mips64-dsp/printf.c             |  266 +++++++++++++++++++++
 tests/tcg/mips/mips64-dsp/raddu_l_ob.c         |   22 ++
 tests/tcg/mips/mips64-dsp/raddu_w_qb.c         |   23 ++
 tests/tcg/mips/mips64-dsp/rddsp.c              |   53 ++++
 tests/tcg/mips/mips64-dsp/repl_ob.c            |   21 ++
 tests/tcg/mips/mips64-dsp/repl_ph.c            |   30 +++
 tests/tcg/mips/mips64-dsp/repl_pw.c            |   34 +++
 tests/tcg/mips/mips64-dsp/repl_qb.c            |   19 ++
 tests/tcg/mips/mips64-dsp/repl_qh.c            |   34 +++
 tests/tcg/mips/mips64-dsp/replv_ob.c           |   23 ++
 tests/tcg/mips/mips64-dsp/replv_ph.c           |   22 ++
 tests/tcg/mips/mips64-dsp/replv_pw.c           |   23 ++
 tests/tcg/mips/mips64-dsp/replv_qb.c           |   22 ++
 tests/tcg/mips/mips64-dsp/shilo.c              |   29 +++
 tests/tcg/mips/mips64-dsp/shilov.c             |   31 +++
 tests/tcg/mips/mips64-dsp/shll_ob.c            |   26 ++
 tests/tcg/mips/mips64-dsp/shll_ph.c            |   26 ++
 tests/tcg/mips/mips64-dsp/shll_pw.c            |   26 ++
 tests/tcg/mips/mips64-dsp/shll_qb.c            |   26 ++
 tests/tcg/mips/mips64-dsp/shll_qh.c            |   26 ++
 tests/tcg/mips/mips64-dsp/shll_s_ph.c          |   26 ++
 tests/tcg/mips/mips64-dsp/shll_s_pw.c          |   26 ++
 tests/tcg/mips/mips64-dsp/shll_s_qh.c          |   26 ++
 tests/tcg/mips/mips64-dsp/shll_s_w.c           |   26 ++
 tests/tcg/mips/mips64-dsp/shllv_ob.c           |   27 +++
 tests/tcg/mips/mips64-dsp/shllv_ph.c           |   27 +++
 tests/tcg/mips/mips64-dsp/shllv_pw.c           |   27 +++
 tests/tcg/mips/mips64-dsp/shllv_qb.c           |   27 +++
 tests/tcg/mips/mips64-dsp/shllv_qh.c           |   27 +++
 tests/tcg/mips/mips64-dsp/shllv_s_ph.c         |   27 +++
 tests/tcg/mips/mips64-dsp/shllv_s_pw.c         |   27 +++
 tests/tcg/mips/mips64-dsp/shllv_s_qh.c         |   27 +++
 tests/tcg/mips/mips64-dsp/shllv_s_w.c          |   27 +++
 tests/tcg/mips/mips64-dsp/shra_ob.c            |   22 ++
 tests/tcg/mips/mips64-dsp/shra_ph.c            |   23 ++
 tests/tcg/mips/mips64-dsp/shra_pw.c            |   22 ++
 tests/tcg/mips/mips64-dsp/shra_qh.c            |   24 ++
 tests/tcg/mips/mips64-dsp/shra_r_ob.c          |   22 ++
 tests/tcg/mips/mips64-dsp/shra_r_ph.c          |   23 ++
 tests/tcg/mips/mips64-dsp/shra_r_pw.c          |   22 ++
 tests/tcg/mips/mips64-dsp/shra_r_qh.c          |   23 ++
 tests/tcg/mips/mips64-dsp/shra_r_w.c           |   23 ++
 tests/tcg/mips/mips64-dsp/shrav_ph.c           |   24 ++
 tests/tcg/mips/mips64-dsp/shrav_pw.c           |   23 ++
 tests/tcg/mips/mips64-dsp/shrav_qh.c           |   24 ++
 tests/tcg/mips/mips64-dsp/shrav_r_ph.c         |   24 ++
 tests/tcg/mips/mips64-dsp/shrav_r_pw.c         |   23 ++
 tests/tcg/mips/mips64-dsp/shrav_r_qh.c         |   24 ++
 tests/tcg/mips/mips64-dsp/shrav_r_w.c          |   24 ++
 tests/tcg/mips/mips64-dsp/shrl_ob.c            |   23 ++
 tests/tcg/mips/mips64-dsp/shrl_qb.c            |   23 ++
 tests/tcg/mips/mips64-dsp/shrl_qh.c            |   22 ++
 tests/tcg/mips/mips64-dsp/shrlv_ob.c           |   24 ++
 tests/tcg/mips/mips64-dsp/shrlv_qb.c           |   24 ++
 tests/tcg/mips/mips64-dsp/shrlv_qh.c           |   23 ++
 tests/tcg/mips/mips64-dsp/subq_ph.c            |   27 +++
 tests/tcg/mips/mips64-dsp/subq_pw.c            |   44 ++++
 tests/tcg/mips/mips64-dsp/subq_qh.c            |   26 ++
 tests/tcg/mips/mips64-dsp/subq_s_ph.c          |   27 +++
 tests/tcg/mips/mips64-dsp/subq_s_pw.c          |   45 ++++
 tests/tcg/mips/mips64-dsp/subq_s_qh.c          |   44 ++++
 tests/tcg/mips/mips64-dsp/subq_s_w.c           |   27 +++
 tests/tcg/mips/mips64-dsp/subu_ob.c            |   26 ++
 tests/tcg/mips/mips64-dsp/subu_qb.c            |   27 +++
 tests/tcg/mips/mips64-dsp/subu_s_ob.c          |   26 ++
 tests/tcg/mips/mips64-dsp/subu_s_qb.c          |   27 +++
 tests/tcg/mips/mips64-dsp/wrdsp.c              |   48 ++++
 tests/tcg/mips/mips64-dspr2/.directory         |    2 +
 tests/tcg/mips/mips64-dspr2/Makefile           |  117 +++++++++
 tests/tcg/mips/mips64-dspr2/absq_s_qb.c        |   42 ++++
 tests/tcg/mips/mips64-dspr2/addqh_ph.c         |   35 +++
 tests/tcg/mips/mips64-dspr2/addqh_r_ph.c       |   35 +++
 tests/tcg/mips/mips64-dspr2/addqh_r_w.c        |   38 +++
 tests/tcg/mips/mips64-dspr2/addqh_w.c          |   39 +++
 tests/tcg/mips/mips64-dspr2/addu_ph.c          |   35 +++
 tests/tcg/mips/mips64-dspr2/addu_qh.c          |   41 ++++
 tests/tcg/mips/mips64-dspr2/addu_s_ph.c        |   35 +++
 tests/tcg/mips/mips64-dspr2/addu_s_qh.c        |   41 ++++
 tests/tcg/mips/mips64-dspr2/adduh_ob.c         |   21 ++
 tests/tcg/mips/mips64-dspr2/adduh_qb.c         |   35 +++
 tests/tcg/mips/mips64-dspr2/adduh_r_ob.c       |   21 ++
 tests/tcg/mips/mips64-dspr2/adduh_r_qb.c       |   35 +++
 tests/tcg/mips/mips64-dspr2/append.c           |   35 +++
 tests/tcg/mips/mips64-dspr2/balign.c           |   35 +++
 tests/tcg/mips/mips64-dspr2/cmpgdu_eq_ob.c     |   26 ++
 tests/tcg/mips/mips64-dspr2/cmpgdu_eq_qb.c     |   41 ++++
 tests/tcg/mips/mips64-dspr2/cmpgdu_le_ob.c     |   26 ++
 tests/tcg/mips/mips64-dspr2/cmpgdu_le_qb.c     |   48 ++++
 tests/tcg/mips/mips64-dspr2/cmpgdu_lt_ob.c     |   26 ++
 tests/tcg/mips/mips64-dspr2/cmpgdu_lt_qb.c     |   48 ++++
 tests/tcg/mips/mips64-dspr2/dbalign.c          |   23 ++
 tests/tcg/mips/mips64-dspr2/dpa_w_ph.c         |   32 +++
 tests/tcg/mips/mips64-dspr2/dpa_w_qh.c         |   56 +++++
 tests/tcg/mips/mips64-dspr2/dpaqx_s_w_ph.c     |   74 ++++++
 tests/tcg/mips/mips64-dspr2/dpaqx_sa_w_ph.c    |   42 ++++
 tests/tcg/mips/mips64-dspr2/dpax_w_ph.c        |   32 +++
 tests/tcg/mips/mips64-dspr2/dps_w_ph.c         |   28 +++
 tests/tcg/mips/mips64-dspr2/dps_w_qh.c         |   55 +++++
 tests/tcg/mips/mips64-dspr2/dpsqx_s_w_ph.c     |   31 +++
 tests/tcg/mips/mips64-dspr2/dpsqx_sa_w_ph.c    |   30 +++
 tests/tcg/mips/mips64-dspr2/dpsx_w_ph.c        |   28 +++
 tests/tcg/mips/mips64-dspr2/head.S             |   16 ++
 tests/tcg/mips/mips64-dspr2/io.h               |   22 ++
 tests/tcg/mips/mips64-dspr2/mips_boot.lds      |   31 +++
 tests/tcg/mips/mips64-dspr2/mul_ph.c           |   26 ++
 tests/tcg/mips/mips64-dspr2/mul_s_ph.c         |   26 ++
 tests/tcg/mips/mips64-dspr2/muleq_s_w_phl.c    |   42 ++++
 tests/tcg/mips/mips64-dspr2/mulq_rs_w.c        |   40 ++++
 tests/tcg/mips/mips64-dspr2/mulq_s_ph.c        |   26 ++
 tests/tcg/mips/mips64-dspr2/mulq_s_w.c         |   40 ++++
 tests/tcg/mips/mips64-dspr2/mulsa_w_ph.c       |   30 +++
 tests/tcg/mips/mips64-dspr2/mulsaq_s_w_ph.c    |   30 +++
 tests/tcg/mips/mips64-dspr2/precr_qb_ph.c      |   23 ++
 tests/tcg/mips/mips64-dspr2/precr_sra_ph_w.c   |   37 +++
 tests/tcg/mips/mips64-dspr2/precr_sra_r_ph_w.c |   37 +++
 tests/tcg/mips/mips64-dspr2/prepend.c          |   35 +++
 tests/tcg/mips/mips64-dspr2/printf.c           |  266 +++++++++++++++++++++
 tests/tcg/mips/mips64-dspr2/shra_qb.c          |   35 +++
 tests/tcg/mips/mips64-dspr2/shra_r_qb.c        |   35 +++
 tests/tcg/mips/mips64-dspr2/shrav_ob.c         |   22 ++
 tests/tcg/mips/mips64-dspr2/shrav_qb.c         |   37 +++
 tests/tcg/mips/mips64-dspr2/shrav_r_ob.c       |   22 ++
 tests/tcg/mips/mips64-dspr2/shrav_r_qb.c       |   37 +++
 tests/tcg/mips/mips64-dspr2/shrl_ph.c          |   22 ++
 tests/tcg/mips/mips64-dspr2/shrlv_ph.c         |   23 ++
 tests/tcg/mips/mips64-dspr2/subqh_ph.c         |   23 ++
 tests/tcg/mips/mips64-dspr2/subqh_r_ph.c       |   23 ++
 tests/tcg/mips/mips64-dspr2/subqh_r_w.c        |   23 ++
 tests/tcg/mips/mips64-dspr2/subqh_w.c          |   23 ++
 tests/tcg/mips/mips64-dspr2/subu_ph.c          |   26 ++
 tests/tcg/mips/mips64-dspr2/subu_qh.c          |   24 ++
 tests/tcg/mips/mips64-dspr2/subu_s_ph.c        |   25 ++
 tests/tcg/mips/mips64-dspr2/subu_s_qh.c        |   24 ++
 tests/tcg/mips/mips64-dspr2/subuh_ob.c         |   23 ++
 tests/tcg/mips/mips64-dspr2/subuh_qb.c         |   23 ++
 tests/tcg/mips/mips64-dspr2/subuh_r_ob.c       |   23 ++
 tests/tcg/mips/mips64-dspr2/subuh_r_qb.c       |   23 ++
 487 files changed, 15870 insertions(+)
 create mode 100644 tests/tcg/mips/mips32-dsp/Makefile
 create mode 100644 tests/tcg/mips/mips32-dsp/absq_s_ph.c
 create mode 100644 tests/tcg/mips/mips32-dsp/absq_s_w.c
 create mode 100644 tests/tcg/mips/mips32-dsp/addq_ph.c
 create mode 100644 tests/tcg/mips/mips32-dsp/addq_s_ph.c
 create mode 100644 tests/tcg/mips/mips32-dsp/addsc.c
 create mode 100644 tests/tcg/mips/mips32-dsp/addu_qb.c
 create mode 100644 tests/tcg/mips/mips32-dsp/addu_s_qb.c
 create mode 100644 tests/tcg/mips/mips32-dsp/addwc.c
 create mode 100644 tests/tcg/mips/mips32-dsp/bitrev.c
 create mode 100644 tests/tcg/mips/mips32-dsp/bposge32.c
 create mode 100644 tests/tcg/mips/mips32-dsp/cmp_eq_ph.c
 create mode 100644 tests/tcg/mips/mips32-dsp/cmp_le_ph.c
 create mode 100644 tests/tcg/mips/mips32-dsp/cmp_lt_ph.c
 create mode 100644 tests/tcg/mips/mips32-dsp/cmpgu_eq_qb.c
 create mode 100644 tests/tcg/mips/mips32-dsp/cmpgu_le_qb.c
 create mode 100644 tests/tcg/mips/mips32-dsp/cmpgu_lt_qb.c
 create mode 100644 tests/tcg/mips/mips32-dsp/cmpu_eq_qb.c
 create mode 100644 tests/tcg/mips/mips32-dsp/cmpu_le_qb.c
 create mode 100644 tests/tcg/mips/mips32-dsp/cmpu_lt_qb.c
 create mode 100644 tests/tcg/mips/mips32-dsp/dpaq_s_w_ph.c
 create mode 100644 tests/tcg/mips/mips32-dsp/dpaq_sa_l_w.c
 create mode 100644 tests/tcg/mips/mips32-dsp/dpau_h_qbl.c
 create mode 100644 tests/tcg/mips/mips32-dsp/dpau_h_qbr.c
 create mode 100644 tests/tcg/mips/mips32-dsp/dpsq_s_w_ph.c
 create mode 100644 tests/tcg/mips/mips32-dsp/dpsq_sa_l_w.c
 create mode 100644 tests/tcg/mips/mips32-dsp/dpsu_h_qbl.c
 create mode 100644 tests/tcg/mips/mips32-dsp/dpsu_h_qbr.c
 create mode 100644 tests/tcg/mips/mips32-dsp/extp.c
 create mode 100644 tests/tcg/mips/mips32-dsp/extpdp.c
 create mode 100644 tests/tcg/mips/mips32-dsp/extpdpv.c
 create mode 100644 tests/tcg/mips/mips32-dsp/extpv.c
 create mode 100644 tests/tcg/mips/mips32-dsp/extr_r_w.c
 create mode 100644 tests/tcg/mips/mips32-dsp/extr_rs_w.c
 create mode 100644 tests/tcg/mips/mips32-dsp/extr_s_h.c
 create mode 100644 tests/tcg/mips/mips32-dsp/extr_w.c
 create mode 100644 tests/tcg/mips/mips32-dsp/extrv_r_w.c
 create mode 100644 tests/tcg/mips/mips32-dsp/extrv_rs_w.c
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 create mode 100644 tests/tcg/mips/mips64-dsp/precequ_ph_qbl.c
 create mode 100644 tests/tcg/mips/mips64-dsp/precequ_ph_qbla.c
 create mode 100644 tests/tcg/mips/mips64-dsp/precequ_ph_qbr.c
 create mode 100644 tests/tcg/mips/mips64-dsp/precequ_ph_qbra.c
 create mode 100644 tests/tcg/mips/mips64-dsp/precequ_qh_obl.c
 create mode 100644 tests/tcg/mips/mips64-dsp/precequ_qh_obla.c
 create mode 100644 tests/tcg/mips/mips64-dsp/precequ_qh_obr.c
 create mode 100644 tests/tcg/mips/mips64-dsp/precequ_qh_obra.c
 create mode 100644 tests/tcg/mips/mips64-dsp/preceu_ph_qbl.c
 create mode 100644 tests/tcg/mips/mips64-dsp/preceu_ph_qbla.c
 create mode 100644 tests/tcg/mips/mips64-dsp/preceu_ph_qbr.c
 create mode 100644 tests/tcg/mips/mips64-dsp/preceu_ph_qbra.c
 create mode 100644 tests/tcg/mips/mips64-dsp/preceu_qh_obl.c
 create mode 100644 tests/tcg/mips/mips64-dsp/preceu_qh_obla.c
 create mode 100644 tests/tcg/mips/mips64-dsp/preceu_qh_obr.c
 create mode 100644 tests/tcg/mips/mips64-dsp/preceu_qh_obra.c
 create mode 100644 tests/tcg/mips/mips64-dsp/precr_ob_qh.c
 create mode 100644 tests/tcg/mips/mips64-dsp/precr_sra_qh_pw.c
 create mode 100644 tests/tcg/mips/mips64-dsp/precr_sra_r_qh_pw.c
 create mode 100644 tests/tcg/mips/mips64-dsp/precrq_ob_qh.c
 create mode 100644 tests/tcg/mips/mips64-dsp/precrq_ph_w.c
 create mode 100644 tests/tcg/mips/mips64-dsp/precrq_pw_l.c
 create mode 100644 tests/tcg/mips/mips64-dsp/precrq_qb_ph.c
 create mode 100644 tests/tcg/mips/mips64-dsp/precrq_qh_pw.c
 create mode 100644 tests/tcg/mips/mips64-dsp/precrq_rs_ph_w.c
 create mode 100644 tests/tcg/mips/mips64-dsp/precrq_rs_qh_pw.c
 create mode 100644 tests/tcg/mips/mips64-dsp/precrqu_s_ob_qh.c
 create mode 100644 tests/tcg/mips/mips64-dsp/precrqu_s_qb_ph.c
 create mode 100644 tests/tcg/mips/mips64-dsp/prependd.c
 create mode 100644 tests/tcg/mips/mips64-dsp/prependw.c
 create mode 100644 tests/tcg/mips/mips64-dsp/printf.c
 create mode 100644 tests/tcg/mips/mips64-dsp/raddu_l_ob.c
 create mode 100644 tests/tcg/mips/mips64-dsp/raddu_w_qb.c
 create mode 100644 tests/tcg/mips/mips64-dsp/rddsp.c
 create mode 100644 tests/tcg/mips/mips64-dsp/repl_ob.c
 create mode 100644 tests/tcg/mips/mips64-dsp/repl_ph.c
 create mode 100644 tests/tcg/mips/mips64-dsp/repl_pw.c
 create mode 100644 tests/tcg/mips/mips64-dsp/repl_qb.c
 create mode 100644 tests/tcg/mips/mips64-dsp/repl_qh.c
 create mode 100644 tests/tcg/mips/mips64-dsp/replv_ob.c
 create mode 100644 tests/tcg/mips/mips64-dsp/replv_ph.c
 create mode 100644 tests/tcg/mips/mips64-dsp/replv_pw.c
 create mode 100644 tests/tcg/mips/mips64-dsp/replv_qb.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shilo.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shilov.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shll_ob.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shll_ph.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shll_pw.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shll_qb.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shll_qh.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shll_s_ph.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shll_s_pw.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shll_s_qh.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shll_s_w.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shllv_ob.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shllv_ph.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shllv_pw.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shllv_qb.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shllv_qh.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shllv_s_ph.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shllv_s_pw.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shllv_s_qh.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shllv_s_w.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shra_ob.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shra_ph.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shra_pw.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shra_qh.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shra_r_ob.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shra_r_ph.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shra_r_pw.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shra_r_qh.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shra_r_w.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shrav_ph.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shrav_pw.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shrav_qh.c
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 create mode 100644 tests/tcg/mips/mips64-dsp/shrav_r_pw.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shrav_r_qh.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shrav_r_w.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shrl_ob.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shrl_qb.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shrl_qh.c
 create mode 100644 tests/tcg/mips/mips64-dsp/shrlv_ob.c
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 create mode 100644 tests/tcg/mips/mips64-dsp/shrlv_qh.c
 create mode 100644 tests/tcg/mips/mips64-dsp/subq_ph.c
 create mode 100644 tests/tcg/mips/mips64-dsp/subq_pw.c
 create mode 100644 tests/tcg/mips/mips64-dsp/subq_qh.c
 create mode 100644 tests/tcg/mips/mips64-dsp/subq_s_ph.c
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 create mode 100644 tests/tcg/mips/mips64-dsp/subu_ob.c
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 create mode 100644 tests/tcg/mips/mips64-dsp/subu_s_ob.c
 create mode 100644 tests/tcg/mips/mips64-dsp/subu_s_qb.c
 create mode 100644 tests/tcg/mips/mips64-dsp/wrdsp.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/.directory
 create mode 100644 tests/tcg/mips/mips64-dspr2/Makefile
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 create mode 100644 tests/tcg/mips/mips64-dspr2/append.c
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 create mode 100644 tests/tcg/mips/mips64-dspr2/cmpgdu_lt_ob.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/cmpgdu_lt_qb.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/dbalign.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/dpa_w_ph.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/dpa_w_qh.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/dpaqx_s_w_ph.c
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 create mode 100644 tests/tcg/mips/mips64-dspr2/dpax_w_ph.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/dps_w_ph.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/dps_w_qh.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/dpsqx_s_w_ph.c
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 create mode 100644 tests/tcg/mips/mips64-dspr2/dpsx_w_ph.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/head.S
 create mode 100644 tests/tcg/mips/mips64-dspr2/io.h
 create mode 100644 tests/tcg/mips/mips64-dspr2/mips_boot.lds
 create mode 100644 tests/tcg/mips/mips64-dspr2/mul_ph.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/mul_s_ph.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/muleq_s_w_phl.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/mulq_rs_w.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/mulq_s_ph.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/mulq_s_w.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/mulsa_w_ph.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/mulsaq_s_w_ph.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/precr_qb_ph.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/precr_sra_ph_w.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/precr_sra_r_ph_w.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/prepend.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/printf.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/shra_qb.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/shra_r_qb.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/shrav_ob.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/shrav_qb.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/shrav_r_ob.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/shrav_r_qb.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/shrl_ph.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/shrlv_ph.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/subqh_ph.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/subqh_r_ph.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/subqh_r_w.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/subqh_w.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/subu_ph.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/subu_qh.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/subu_s_ph.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/subu_s_qh.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/subuh_ob.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/subuh_qb.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/subuh_r_ob.c
 create mode 100644 tests/tcg/mips/mips64-dspr2/subuh_r_qb.c
Aurelien Jarno - Oct. 16, 2012, 11:23 p.m.
On Tue, Oct 16, 2012 at 12:39:17AM +0800, Jia Liu wrote:
> Add MIPS ASE DSP testcases.
> 
> Signed-off-by: Jia Liu <proljc@gmail.com>
> ---
>  tests/tcg/mips/mips32-dsp/Makefile             |  135 +++++++++++
>  tests/tcg/mips/mips32-dsp/absq_s_ph.c          |   31 +++
>  tests/tcg/mips/mips32-dsp/absq_s_w.c           |   37 +++
>  tests/tcg/mips/mips32-dsp/addq_ph.c            |   30 +++
>  tests/tcg/mips/mips32-dsp/addq_s_ph.c          |   30 +++
>  tests/tcg/mips/mips32-dsp/addsc.c              |   30 +++
>  tests/tcg/mips/mips32-dsp/addu_qb.c            |   30 +++
>  tests/tcg/mips/mips32-dsp/addu_s_qb.c          |   30 +++
>  tests/tcg/mips/mips32-dsp/addwc.c              |   30 +++
>  tests/tcg/mips/mips32-dsp/bitrev.c             |   20 ++
>  tests/tcg/mips/mips32-dsp/bposge32.c           |   44 ++++
>  tests/tcg/mips/mips32-dsp/cmp_eq_ph.c          |   35 +++
>  tests/tcg/mips/mips32-dsp/cmp_le_ph.c          |   35 +++
>  tests/tcg/mips/mips32-dsp/cmp_lt_ph.c          |   35 +++
>  tests/tcg/mips/mips32-dsp/cmpgu_eq_qb.c        |   31 +++
>  tests/tcg/mips/mips32-dsp/cmpgu_le_qb.c        |   31 +++
>  tests/tcg/mips/mips32-dsp/cmpgu_lt_qb.c        |   31 +++
>  tests/tcg/mips/mips32-dsp/cmpu_eq_qb.c         |   35 +++
>  tests/tcg/mips/mips32-dsp/cmpu_le_qb.c         |   35 +++
>  tests/tcg/mips/mips32-dsp/cmpu_lt_qb.c         |   35 +++
>  tests/tcg/mips/mips32-dsp/dpaq_s_w_ph.c        |   31 +++
>  tests/tcg/mips/mips32-dsp/dpaq_sa_l_w.c        |   31 +++
>  tests/tcg/mips/mips32-dsp/dpau_h_qbl.c         |   27 +++
>  tests/tcg/mips/mips32-dsp/dpau_h_qbr.c         |   27 +++
>  tests/tcg/mips/mips32-dsp/dpsq_s_w_ph.c        |   27 +++
>  tests/tcg/mips/mips32-dsp/dpsq_sa_l_w.c        |   31 +++
>  tests/tcg/mips/mips32-dsp/dpsu_h_qbl.c         |   27 +++
>  tests/tcg/mips/mips32-dsp/dpsu_h_qbr.c         |   27 +++
>  tests/tcg/mips/mips32-dsp/extp.c               |   44 ++++
>  tests/tcg/mips/mips32-dsp/extpdp.c             |   46 ++++
>  tests/tcg/mips/mips32-dsp/extpdpv.c            |   47 ++++
>  tests/tcg/mips/mips32-dsp/extpv.c              |   45 ++++
>  tests/tcg/mips/mips32-dsp/extr_r_w.c           |   25 ++
>  tests/tcg/mips/mips32-dsp/extr_rs_w.c          |   25 ++
>  tests/tcg/mips/mips32-dsp/extr_s_h.c           |   25 ++
>  tests/tcg/mips/mips32-dsp/extr_w.c             |   25 ++
>  tests/tcg/mips/mips32-dsp/extrv_r_w.c          |   29 +++
>  tests/tcg/mips/mips32-dsp/extrv_rs_w.c         |   29 +++
>  tests/tcg/mips/mips32-dsp/extrv_s_h.c          |   29 +++
>  tests/tcg/mips/mips32-dsp/extrv_w.c            |   29 +++
>  tests/tcg/mips/mips32-dsp/insv.c               |   23 ++
>  tests/tcg/mips/mips32-dsp/lbux.c               |   25 ++
>  tests/tcg/mips/mips32-dsp/lhx.c                |   25 ++
>  tests/tcg/mips/mips32-dsp/lwx.c                |   25 ++
>  tests/tcg/mips/mips32-dsp/madd.c               |   31 +++
>  tests/tcg/mips/mips32-dsp/maddu.c              |   31 +++
>  tests/tcg/mips/mips32-dsp/main.c               |    6 +
>  tests/tcg/mips/mips32-dsp/maq_s_w_phl.c        |   31 +++
>  tests/tcg/mips/mips32-dsp/maq_s_w_phr.c        |   31 +++
>  tests/tcg/mips/mips32-dsp/maq_sa_w_phl.c       |   31 +++
>  tests/tcg/mips/mips32-dsp/maq_sa_w_phr.c       |   31 +++
>  tests/tcg/mips/mips32-dsp/mfhi.c               |   21 ++
>  tests/tcg/mips/mips32-dsp/mflo.c               |   21 ++
>  tests/tcg/mips/mips32-dsp/modsub.c             |   30 +++
>  tests/tcg/mips/mips32-dsp/msub.c               |   30 +++
>  tests/tcg/mips/mips32-dsp/msubu.c              |   30 +++
>  tests/tcg/mips/mips32-dsp/mthi.c               |   21 ++
>  tests/tcg/mips/mips32-dsp/mthlip.c             |   34 +++
>  tests/tcg/mips/mips32-dsp/mtlo.c               |   21 ++
>  tests/tcg/mips/mips32-dsp/muleq_s_w_phl.c      |   41 ++++
>  tests/tcg/mips/mips32-dsp/muleq_s_w_phr.c      |   40 ++++
>  tests/tcg/mips/mips32-dsp/muleu_s_ph_qbl.c     |   25 ++
>  tests/tcg/mips/mips32-dsp/muleu_s_ph_qbr.c     |   25 ++
>  tests/tcg/mips/mips32-dsp/mulq_rs_ph.c         |   25 ++
>  tests/tcg/mips/mips32-dsp/mult.c               |   24 ++
>  tests/tcg/mips/mips32-dsp/multu.c              |   24 ++
>  tests/tcg/mips/mips32-dsp/packrl_ph.c          |   21 ++
>  tests/tcg/mips/mips32-dsp/pick_ph.c            |   23 ++
>  tests/tcg/mips/mips32-dsp/pick_qb.c            |   23 ++
>  tests/tcg/mips/mips32-dsp/preceq_w_phl.c       |   20 ++
>  tests/tcg/mips/mips32-dsp/preceq_w_phr.c       |   20 ++
>  tests/tcg/mips/mips32-dsp/precequ_ph_qbl.c     |   20 ++
>  tests/tcg/mips/mips32-dsp/precequ_ph_qbla.c    |   20 ++
>  tests/tcg/mips/mips32-dsp/precequ_ph_qbr.c     |   20 ++
>  tests/tcg/mips/mips32-dsp/precequ_ph_qbra.c    |   20 ++
>  tests/tcg/mips/mips32-dsp/preceu_ph_qbl.c      |   20 ++
>  tests/tcg/mips/mips32-dsp/preceu_ph_qbla.c     |   20 ++
>  tests/tcg/mips/mips32-dsp/preceu_ph_qbr.c      |   20 ++
>  tests/tcg/mips/mips32-dsp/preceu_ph_qbra.c     |   20 ++
>  tests/tcg/mips/mips32-dsp/precrq_ph_w.c        |   21 ++
>  tests/tcg/mips/mips32-dsp/precrq_qb_ph.c       |   21 ++
>  tests/tcg/mips/mips32-dsp/precrq_rs_ph_w.c     |   21 ++
>  tests/tcg/mips/mips32-dsp/precrqu_s_qb_ph.c    |   21 ++
>  tests/tcg/mips/mips32-dsp/raddu_w_qb.c         |   20 ++
>  tests/tcg/mips/mips32-dsp/rddsp.c              |   54 +++++
>  tests/tcg/mips/mips32-dsp/repl_ph.c            |   23 ++
>  tests/tcg/mips/mips32-dsp/repl_qb.c            |   16 ++
>  tests/tcg/mips/mips32-dsp/replv_ph.c           |   19 ++
>  tests/tcg/mips/mips32-dsp/replv_qb.c           |   19 ++
>  tests/tcg/mips/mips32-dsp/shilo.c              |   27 +++
>  tests/tcg/mips/mips32-dsp/shilov.c             |   29 +++
>  tests/tcg/mips/mips32-dsp/shll_ph.c            |   24 ++
>  tests/tcg/mips/mips32-dsp/shll_qb.c            |   23 ++
>  tests/tcg/mips/mips32-dsp/shll_s_ph.c          |   24 ++
>  tests/tcg/mips/mips32-dsp/shll_s_w.c           |   24 ++
>  tests/tcg/mips/mips32-dsp/shllv_ph.c           |   25 ++
>  tests/tcg/mips/mips32-dsp/shllv_qb.c           |   24 ++
>  tests/tcg/mips/mips32-dsp/shllv_s_ph.c         |   25 ++
>  tests/tcg/mips/mips32-dsp/shllv_s_w.c          |   25 ++
>  tests/tcg/mips/mips32-dsp/shra_ph.c            |   20 ++
>  tests/tcg/mips/mips32-dsp/shra_r_ph.c          |   20 ++
>  tests/tcg/mips/mips32-dsp/shra_r_w.c           |   20 ++
>  tests/tcg/mips/mips32-dsp/shrav_ph.c           |   21 ++
>  tests/tcg/mips/mips32-dsp/shrav_r_ph.c         |   21 ++
>  tests/tcg/mips/mips32-dsp/shrav_r_w.c          |   21 ++
>  tests/tcg/mips/mips32-dsp/shrl_qb.c            |   20 ++
>  tests/tcg/mips/mips32-dsp/shrlv_qb.c           |   21 ++
>  tests/tcg/mips/mips32-dsp/subq_ph.c            |   25 ++
>  tests/tcg/mips/mips32-dsp/subq_s_ph.c          |   25 ++
>  tests/tcg/mips/mips32-dsp/subq_s_w.c           |   25 ++
>  tests/tcg/mips/mips32-dsp/subu_qb.c            |   25 ++
>  tests/tcg/mips/mips32-dsp/subu_s_qb.c          |   25 ++
>  tests/tcg/mips/mips32-dsp/wrdsp.c              |   54 +++++
>  tests/tcg/mips/mips32-dspr2/Makefile           |   72 ++++++
>  tests/tcg/mips/mips32-dspr2/absq_s_qb.c        |   35 +++
>  tests/tcg/mips/mips32-dspr2/addqh_ph.c         |   30 +++
>  tests/tcg/mips/mips32-dspr2/addqh_r_ph.c       |   30 +++
>  tests/tcg/mips/mips32-dspr2/addqh_r_w.c        |   34 +++
>  tests/tcg/mips/mips32-dspr2/addqh_w.c          |   34 +++
>  tests/tcg/mips/mips32-dspr2/addu_ph.c          |   30 +++
>  tests/tcg/mips/mips32-dspr2/addu_s_ph.c        |   30 +++
>  tests/tcg/mips/mips32-dspr2/adduh_qb.c         |   30 +++
>  tests/tcg/mips/mips32-dspr2/adduh_r_qb.c       |   30 +++
>  tests/tcg/mips/mips32-dspr2/append.c           |   30 +++
>  tests/tcg/mips/mips32-dspr2/balign.c           |   30 +++
>  tests/tcg/mips/mips32-dspr2/cmpgdu_eq_qb.c     |   37 +++
>  tests/tcg/mips/mips32-dspr2/cmpgdu_le_qb.c     |   37 +++
>  tests/tcg/mips/mips32-dspr2/cmpgdu_lt_qb.c     |   37 +++
>  tests/tcg/mips/mips32-dspr2/dpa_w_ph.c         |   27 +++
>  tests/tcg/mips/mips32-dspr2/dpaqx_s_w_ph.c     |   57 +++++
>  tests/tcg/mips/mips32-dspr2/dpaqx_sa_w_ph.c    |   31 +++
>  tests/tcg/mips/mips32-dspr2/dpax_w_ph.c        |   27 +++
>  tests/tcg/mips/mips32-dspr2/dps_w_ph.c         |   27 +++
>  tests/tcg/mips/mips32-dspr2/dpsqx_s_w_ph.c     |   31 +++
>  tests/tcg/mips/mips32-dspr2/dpsqx_sa_w_ph.c    |   31 +++
>  tests/tcg/mips/mips32-dspr2/dpsx_w_ph.c        |   27 +++
>  tests/tcg/mips/mips32-dspr2/mul_ph.c           |   25 ++
>  tests/tcg/mips/mips32-dspr2/mul_s_ph.c         |   25 ++
>  tests/tcg/mips/mips32-dspr2/muleq_s_w_phl.c    |   40 ++++
>  tests/tcg/mips/mips32-dspr2/mulq_rs_w.c        |   36 +++
>  tests/tcg/mips/mips32-dspr2/mulq_s_ph.c        |   25 ++
>  tests/tcg/mips/mips32-dspr2/mulq_s_w.c         |   36 +++
>  tests/tcg/mips/mips32-dspr2/mulsa_w_ph.c       |   29 +++
>  tests/tcg/mips/mips32-dspr2/mulsaq_s_w_ph.c    |   29 +++
>  tests/tcg/mips/mips32-dspr2/precr_qb_ph.c      |   21 ++
>  tests/tcg/mips/mips32-dspr2/precr_sra_ph_w.c   |   32 +++
>  tests/tcg/mips/mips32-dspr2/precr_sra_r_ph_w.c |   32 +++
>  tests/tcg/mips/mips32-dspr2/prepend.c          |   30 +++
>  tests/tcg/mips/mips32-dspr2/shra_qb.c          |   30 +++
>  tests/tcg/mips/mips32-dspr2/shra_r_qb.c        |   30 +++
>  tests/tcg/mips/mips32-dspr2/shrav_qb.c         |   32 +++
>  tests/tcg/mips/mips32-dspr2/shrav_r_qb.c       |   32 +++
>  tests/tcg/mips/mips32-dspr2/shrl_ph.c          |   20 ++
>  tests/tcg/mips/mips32-dspr2/shrlv_ph.c         |   21 ++
>  tests/tcg/mips/mips32-dspr2/subqh_ph.c         |   21 ++
>  tests/tcg/mips/mips32-dspr2/subqh_r_ph.c       |   21 ++
>  tests/tcg/mips/mips32-dspr2/subqh_r_w.c        |   21 ++
>  tests/tcg/mips/mips32-dspr2/subqh_w.c          |   21 ++
>  tests/tcg/mips/mips32-dspr2/subu_ph.c          |   25 ++
>  tests/tcg/mips/mips32-dspr2/subu_s_ph.c        |   25 ++
>  tests/tcg/mips/mips32-dspr2/subuh_qb.c         |   21 ++
>  tests/tcg/mips/mips32-dspr2/subuh_r_qb.c       |   21 ++
>  tests/tcg/mips/mips64-dsp/Makefile             |  305 ++++++++++++++++++++++++
>  tests/tcg/mips/mips64-dsp/absq_s_ob.c          |   63 +++++
>  tests/tcg/mips/mips64-dsp/absq_s_ph.c          |   37 +++
>  tests/tcg/mips/mips64-dsp/absq_s_pw.c          |   66 +++++
>  tests/tcg/mips/mips64-dsp/absq_s_qh.c          |   40 ++++
>  tests/tcg/mips/mips64-dsp/absq_s_w.c           |   48 ++++
>  tests/tcg/mips/mips64-dsp/addq_ph.c            |   37 +++
>  tests/tcg/mips/mips64-dsp/addq_pw.c            |   26 ++
>  tests/tcg/mips/mips64-dsp/addq_qh.c            |   28 +++
>  tests/tcg/mips/mips64-dsp/addq_s_ph.c          |   37 +++
>  tests/tcg/mips/mips64-dsp/addq_s_pw.c          |   45 ++++
>  tests/tcg/mips/mips64-dsp/addq_s_qh.c          |   26 ++
>  tests/tcg/mips/mips64-dsp/addsc.c              |   37 +++
>  tests/tcg/mips/mips64-dsp/addu_ob.c            |   27 +++
>  tests/tcg/mips/mips64-dsp/addu_qb.c            |   37 +++
>  tests/tcg/mips/mips64-dsp/addu_s_ob.c          |   27 +++
>  tests/tcg/mips/mips64-dsp/addu_s_qb.c          |   38 +++
>  tests/tcg/mips/mips64-dsp/addwc.c              |   37 +++
>  tests/tcg/mips/mips64-dsp/bitrev.c             |   23 ++
>  tests/tcg/mips/mips64-dsp/bposge32.c           |   50 ++++
>  tests/tcg/mips/mips64-dsp/bposge64.c           |   50 ++++
>  tests/tcg/mips/mips64-dsp/cmp_eq_ph.c          |   42 ++++
>  tests/tcg/mips/mips64-dsp/cmp_eq_pw.c          |   27 +++
>  tests/tcg/mips/mips64-dsp/cmp_eq_qh.c          |   27 +++
>  tests/tcg/mips/mips64-dsp/cmp_le_ph.c          |   40 ++++
>  tests/tcg/mips/mips64-dsp/cmp_le_pw.c          |   27 +++
>  tests/tcg/mips/mips64-dsp/cmp_le_qh.c          |   27 +++
>  tests/tcg/mips/mips64-dsp/cmp_lt_ph.c          |   41 ++++
>  tests/tcg/mips/mips64-dsp/cmp_lt_pw.c          |   27 +++
>  tests/tcg/mips/mips64-dsp/cmp_lt_qh.c          |   27 +++
>  tests/tcg/mips/mips64-dsp/cmpgu_eq_ob.c        |   24 ++
>  tests/tcg/mips/mips64-dsp/cmpgu_eq_qb.c        |   38 +++
>  tests/tcg/mips/mips64-dsp/cmpgu_le_ob.c        |   24 ++
>  tests/tcg/mips/mips64-dsp/cmpgu_le_qb.c        |   37 +++
>  tests/tcg/mips/mips64-dsp/cmpgu_lt_ob.c        |   24 ++
>  tests/tcg/mips/mips64-dsp/cmpgu_lt_qb.c        |   38 +++
>  tests/tcg/mips/mips64-dsp/cmpu_eq_ob.c         |   27 +++
>  tests/tcg/mips/mips64-dsp/cmpu_eq_qb.c         |   42 ++++
>  tests/tcg/mips/mips64-dsp/cmpu_le_ob.c         |   26 ++
>  tests/tcg/mips/mips64-dsp/cmpu_le_qb.c         |   41 ++++
>  tests/tcg/mips/mips64-dsp/cmpu_lt_ob.c         |   26 ++
>  tests/tcg/mips/mips64-dsp/cmpu_lt_qb.c         |   42 ++++
>  tests/tcg/mips/mips64-dsp/dappend.c            |   37 +++
>  tests/tcg/mips/mips64-dsp/dextp.c              |   33 +++
>  tests/tcg/mips/mips64-dsp/dextpdp.c            |   37 +++
>  tests/tcg/mips/mips64-dsp/dextpdpv.c           |   38 +++
>  tests/tcg/mips/mips64-dsp/dextpv.c             |   34 +++
>  tests/tcg/mips/mips64-dsp/dextr_l.c            |   27 +++
>  tests/tcg/mips/mips64-dsp/dextr_r_l.c          |   32 +++
>  tests/tcg/mips/mips64-dsp/dextr_r_w.c          |   32 +++
>  tests/tcg/mips/mips64-dsp/dextr_rs_l.c         |   31 +++
>  tests/tcg/mips/mips64-dsp/dextr_rs_w.c         |   31 +++
>  tests/tcg/mips/mips64-dsp/dextr_s_h.c          |   31 +++
>  tests/tcg/mips/mips64-dsp/dextr_w.c            |   27 +++
>  tests/tcg/mips/mips64-dsp/dextrv_l.c           |   28 +++
>  tests/tcg/mips/mips64-dsp/dextrv_r_l.c         |   33 +++
>  tests/tcg/mips/mips64-dsp/dextrv_r_w.c         |   33 +++
>  tests/tcg/mips/mips64-dsp/dextrv_rs_l.c        |   32 +++
>  tests/tcg/mips/mips64-dsp/dextrv_rs_w.c        |   32 +++
>  tests/tcg/mips/mips64-dsp/dextrv_s_h.c         |   32 +++
>  tests/tcg/mips/mips64-dsp/dextrv_w.c           |   28 +++
>  tests/tcg/mips/mips64-dsp/dinsv.c              |   25 ++
>  tests/tcg/mips/mips64-dsp/dmadd.c              |   57 +++++
>  tests/tcg/mips/mips64-dsp/dmaddu.c             |   56 +++++
>  tests/tcg/mips/mips64-dsp/dmsub.c              |   59 +++++
>  tests/tcg/mips/mips64-dsp/dmsubu.c             |   59 +++++
>  tests/tcg/mips/mips64-dsp/dmthlip.c            |   32 +++
>  tests/tcg/mips/mips64-dsp/dpaq_s_w_ph.c        |   32 +++
>  tests/tcg/mips/mips64-dsp/dpaq_s_w_qh.c        |   57 +++++
>  tests/tcg/mips/mips64-dsp/dpaq_sa_l_pw.c       |   62 +++++
>  tests/tcg/mips/mips64-dsp/dpaq_sa_l_w.c        |   32 +++
>  tests/tcg/mips/mips64-dsp/dpau_h_obl.c         |   59 +++++
>  tests/tcg/mips/mips64-dsp/dpau_h_obr.c         |   59 +++++
>  tests/tcg/mips/mips64-dsp/dpau_h_qbl.c         |   29 +++
>  tests/tcg/mips/mips64-dsp/dpau_h_qbr.c         |   29 +++
>  tests/tcg/mips/mips64-dsp/dpsq_s_w_ph.c        |   29 +++
>  tests/tcg/mips/mips64-dsp/dpsq_s_w_qh.c        |   33 +++
>  tests/tcg/mips/mips64-dsp/dpsq_sa_l_pw.c       |   39 +++
>  tests/tcg/mips/mips64-dsp/dpsq_sa_l_w.c        |   32 +++
>  tests/tcg/mips/mips64-dsp/dpsu_h_obl.c         |   32 +++
>  tests/tcg/mips/mips64-dsp/dpsu_h_obr.c         |   32 +++
>  tests/tcg/mips/mips64-dsp/dpsu_h_qbl.c         |   29 +++
>  tests/tcg/mips/mips64-dsp/dpsu_h_qbr.c         |   29 +++
>  tests/tcg/mips/mips64-dsp/dshilo.c             |   31 +++
>  tests/tcg/mips/mips64-dsp/dshilov.c            |   32 +++
>  tests/tcg/mips/mips64-dsp/extp.c               |   50 ++++
>  tests/tcg/mips/mips64-dsp/extpdp.c             |   51 ++++
>  tests/tcg/mips/mips64-dsp/extpdpv.c            |   52 ++++
>  tests/tcg/mips/mips64-dsp/extpv.c              |   51 ++++
>  tests/tcg/mips/mips64-dsp/extr_r_w.c           |   27 +++
>  tests/tcg/mips/mips64-dsp/extr_rs_w.c          |   27 +++
>  tests/tcg/mips/mips64-dsp/extr_s_h.c           |   27 +++
>  tests/tcg/mips/mips64-dsp/extr_w.c             |   27 +++
>  tests/tcg/mips/mips64-dsp/extrv_r_w.c          |   31 +++
>  tests/tcg/mips/mips64-dsp/extrv_rs_w.c         |   31 +++
>  tests/tcg/mips/mips64-dsp/extrv_s_h.c          |   31 +++
>  tests/tcg/mips/mips64-dsp/extrv_w.c            |   31 +++
>  tests/tcg/mips/mips64-dsp/head.S               |   16 ++
>  tests/tcg/mips/mips64-dsp/insv.c               |   26 ++
>  tests/tcg/mips/mips64-dsp/io.h                 |   22 ++
>  tests/tcg/mips/mips64-dsp/lbux.c               |   27 +++
>  tests/tcg/mips/mips64-dsp/ldx.c                |   27 +++
>  tests/tcg/mips/mips64-dsp/lhx.c                |   27 +++
>  tests/tcg/mips/mips64-dsp/lwx.c                |   27 +++
>  tests/tcg/mips/mips64-dsp/madd.c               |   33 +++
>  tests/tcg/mips/mips64-dsp/maddu.c              |   33 +++
>  tests/tcg/mips/mips64-dsp/maq_s_l_pwl.c        |   56 +++++
>  tests/tcg/mips/mips64-dsp/maq_s_l_pwr.c        |   56 +++++
>  tests/tcg/mips/mips64-dsp/maq_s_w_phl.c        |   33 +++
>  tests/tcg/mips/mips64-dsp/maq_s_w_phr.c        |   33 +++
>  tests/tcg/mips/mips64-dsp/maq_s_w_qhll.c       |   62 +++++
>  tests/tcg/mips/mips64-dsp/maq_s_w_qhlr.c       |   62 +++++
>  tests/tcg/mips/mips64-dsp/maq_s_w_qhrl.c       |   63 +++++
>  tests/tcg/mips/mips64-dsp/maq_s_w_qhrr.c       |   63 +++++
>  tests/tcg/mips/mips64-dsp/maq_sa_w_phl.c       |   33 +++
>  tests/tcg/mips/mips64-dsp/maq_sa_w_phr.c       |   33 +++
>  tests/tcg/mips/mips64-dsp/maq_sa_w_qhll.c      |   62 +++++
>  tests/tcg/mips/mips64-dsp/maq_sa_w_qhlr.c      |   64 +++++
>  tests/tcg/mips/mips64-dsp/maq_sa_w_qhrl.c      |   64 +++++
>  tests/tcg/mips/mips64-dsp/maq_sa_w_qhrr.c      |   64 +++++
>  tests/tcg/mips/mips64-dsp/mfhi.c               |   24 ++
>  tests/tcg/mips/mips64-dsp/mflo.c               |   24 ++
>  tests/tcg/mips/mips64-dsp/mips_boot.lds        |   31 +++
>  tests/tcg/mips/mips64-dsp/modsub.c             |   37 +++
>  tests/tcg/mips/mips64-dsp/msub.c               |   32 +++
>  tests/tcg/mips/mips64-dsp/msubu.c              |   32 +++
>  tests/tcg/mips/mips64-dsp/mthi.c               |   24 ++
>  tests/tcg/mips/mips64-dsp/mthlip.c             |   35 +++
>  tests/tcg/mips/mips64-dsp/mtlo.c               |   22 ++
>  tests/tcg/mips/mips64-dsp/muleq_s_pw_qhl.c     |   55 +++++
>  tests/tcg/mips/mips64-dsp/muleq_s_pw_qhr.c     |   24 ++
>  tests/tcg/mips/mips64-dsp/muleq_s_w_phl.c      |   46 ++++
>  tests/tcg/mips/mips64-dsp/muleq_s_w_phr.c      |   45 ++++
>  tests/tcg/mips/mips64-dsp/muleu_s_ph_qbl.c     |   27 +++
>  tests/tcg/mips/mips64-dsp/muleu_s_ph_qbr.c     |   27 +++
>  tests/tcg/mips/mips64-dsp/muleu_s_qh_obl.c     |   25 ++
>  tests/tcg/mips/mips64-dsp/muleu_s_qh_obr.c     |   25 ++
>  tests/tcg/mips/mips64-dsp/mulq_rs_ph.c         |   27 +++
>  tests/tcg/mips/mips64-dsp/mulq_rs_qh.c         |   33 +++
>  tests/tcg/mips/mips64-dsp/mulsaq_s_l_pw.c      |   59 +++++
>  tests/tcg/mips/mips64-dsp/mulsaq_s_w_qh.c      |   57 +++++
>  tests/tcg/mips/mips64-dsp/mult.c               |   26 ++
>  tests/tcg/mips/mips64-dsp/multu.c              |   26 ++
>  tests/tcg/mips/mips64-dsp/packrl_ph.c          |   24 ++
>  tests/tcg/mips/mips64-dsp/packrl_pw.c          |   24 ++
>  tests/tcg/mips/mips64-dsp/pick_ob.c            |   27 +++
>  tests/tcg/mips/mips64-dsp/pick_ph.c            |   26 ++
>  tests/tcg/mips/mips64-dsp/pick_pw.c            |   28 +++
>  tests/tcg/mips/mips64-dsp/pick_qb.c            |   26 ++
>  tests/tcg/mips/mips64-dsp/pick_qh.c            |   28 +++
>  tests/tcg/mips/mips64-dsp/preceq_l_pwl.c       |   24 ++
>  tests/tcg/mips/mips64-dsp/preceq_l_pwr.c       |   24 ++
>  tests/tcg/mips/mips64-dsp/preceq_pw_qhl.c      |   21 ++
>  tests/tcg/mips/mips64-dsp/preceq_pw_qhla.c     |   23 ++
>  tests/tcg/mips/mips64-dsp/preceq_pw_qhr.c      |   21 ++
>  tests/tcg/mips/mips64-dsp/preceq_pw_qhra.c     |   23 ++
>  tests/tcg/mips/mips64-dsp/preceq_w_phl.c       |   23 ++
>  tests/tcg/mips/mips64-dsp/preceq_w_phr.c       |   23 ++
>  tests/tcg/mips/mips64-dsp/precequ_ph_qbl.c     |   23 ++
>  tests/tcg/mips/mips64-dsp/precequ_ph_qbla.c    |   23 ++
>  tests/tcg/mips/mips64-dsp/precequ_ph_qbr.c     |   23 ++
>  tests/tcg/mips/mips64-dsp/precequ_ph_qbra.c    |   23 ++
>  tests/tcg/mips/mips64-dsp/precequ_qh_obl.c     |   22 ++
>  tests/tcg/mips/mips64-dsp/precequ_qh_obla.c    |   22 ++
>  tests/tcg/mips/mips64-dsp/precequ_qh_obr.c     |   24 ++
>  tests/tcg/mips/mips64-dsp/precequ_qh_obra.c    |   24 ++
>  tests/tcg/mips/mips64-dsp/preceu_ph_qbl.c      |   23 ++
>  tests/tcg/mips/mips64-dsp/preceu_ph_qbla.c     |   23 ++
>  tests/tcg/mips/mips64-dsp/preceu_ph_qbr.c      |   23 ++
>  tests/tcg/mips/mips64-dsp/preceu_ph_qbra.c     |   23 ++
>  tests/tcg/mips/mips64-dsp/preceu_qh_obl.c      |   22 ++
>  tests/tcg/mips/mips64-dsp/preceu_qh_obla.c     |   22 ++
>  tests/tcg/mips/mips64-dsp/preceu_qh_obr.c      |   23 ++
>  tests/tcg/mips/mips64-dsp/preceu_qh_obra.c     |   23 ++
>  tests/tcg/mips/mips64-dsp/precr_ob_qh.c        |   25 ++
>  tests/tcg/mips/mips64-dsp/precr_sra_qh_pw.c    |   40 ++++
>  tests/tcg/mips/mips64-dsp/precr_sra_r_qh_pw.c  |   40 ++++
>  tests/tcg/mips/mips64-dsp/precrq_ob_qh.c       |   25 ++
>  tests/tcg/mips/mips64-dsp/precrq_ph_w.c        |   24 ++
>  tests/tcg/mips/mips64-dsp/precrq_pw_l.c        |   25 ++
>  tests/tcg/mips/mips64-dsp/precrq_qb_ph.c       |   24 ++
>  tests/tcg/mips/mips64-dsp/precrq_qh_pw.c       |   25 ++
>  tests/tcg/mips/mips64-dsp/precrq_rs_ph_w.c     |   24 ++
>  tests/tcg/mips/mips64-dsp/precrq_rs_qh_pw.c    |   25 ++
>  tests/tcg/mips/mips64-dsp/precrqu_s_ob_qh.c    |   27 +++
>  tests/tcg/mips/mips64-dsp/precrqu_s_qb_ph.c    |   24 ++
>  tests/tcg/mips/mips64-dsp/prependd.c           |   37 +++
>  tests/tcg/mips/mips64-dsp/prependw.c           |   37 +++
>  tests/tcg/mips/mips64-dsp/printf.c             |  266 +++++++++++++++++++++
>  tests/tcg/mips/mips64-dsp/raddu_l_ob.c         |   22 ++
>  tests/tcg/mips/mips64-dsp/raddu_w_qb.c         |   23 ++
>  tests/tcg/mips/mips64-dsp/rddsp.c              |   53 ++++
>  tests/tcg/mips/mips64-dsp/repl_ob.c            |   21 ++
>  tests/tcg/mips/mips64-dsp/repl_ph.c            |   30 +++
>  tests/tcg/mips/mips64-dsp/repl_pw.c            |   34 +++
>  tests/tcg/mips/mips64-dsp/repl_qb.c            |   19 ++
>  tests/tcg/mips/mips64-dsp/repl_qh.c            |   34 +++
>  tests/tcg/mips/mips64-dsp/replv_ob.c           |   23 ++
>  tests/tcg/mips/mips64-dsp/replv_ph.c           |   22 ++
>  tests/tcg/mips/mips64-dsp/replv_pw.c           |   23 ++
>  tests/tcg/mips/mips64-dsp/replv_qb.c           |   22 ++
>  tests/tcg/mips/mips64-dsp/shilo.c              |   29 +++
>  tests/tcg/mips/mips64-dsp/shilov.c             |   31 +++
>  tests/tcg/mips/mips64-dsp/shll_ob.c            |   26 ++
>  tests/tcg/mips/mips64-dsp/shll_ph.c            |   26 ++
>  tests/tcg/mips/mips64-dsp/shll_pw.c            |   26 ++
>  tests/tcg/mips/mips64-dsp/shll_qb.c            |   26 ++
>  tests/tcg/mips/mips64-dsp/shll_qh.c            |   26 ++
>  tests/tcg/mips/mips64-dsp/shll_s_ph.c          |   26 ++
>  tests/tcg/mips/mips64-dsp/shll_s_pw.c          |   26 ++
>  tests/tcg/mips/mips64-dsp/shll_s_qh.c          |   26 ++
>  tests/tcg/mips/mips64-dsp/shll_s_w.c           |   26 ++
>  tests/tcg/mips/mips64-dsp/shllv_ob.c           |   27 +++
>  tests/tcg/mips/mips64-dsp/shllv_ph.c           |   27 +++
>  tests/tcg/mips/mips64-dsp/shllv_pw.c           |   27 +++
>  tests/tcg/mips/mips64-dsp/shllv_qb.c           |   27 +++
>  tests/tcg/mips/mips64-dsp/shllv_qh.c           |   27 +++
>  tests/tcg/mips/mips64-dsp/shllv_s_ph.c         |   27 +++
>  tests/tcg/mips/mips64-dsp/shllv_s_pw.c         |   27 +++
>  tests/tcg/mips/mips64-dsp/shllv_s_qh.c         |   27 +++
>  tests/tcg/mips/mips64-dsp/shllv_s_w.c          |   27 +++
>  tests/tcg/mips/mips64-dsp/shra_ob.c            |   22 ++
>  tests/tcg/mips/mips64-dsp/shra_ph.c            |   23 ++
>  tests/tcg/mips/mips64-dsp/shra_pw.c            |   22 ++
>  tests/tcg/mips/mips64-dsp/shra_qh.c            |   24 ++
>  tests/tcg/mips/mips64-dsp/shra_r_ob.c          |   22 ++
>  tests/tcg/mips/mips64-dsp/shra_r_ph.c          |   23 ++
>  tests/tcg/mips/mips64-dsp/shra_r_pw.c          |   22 ++
>  tests/tcg/mips/mips64-dsp/shra_r_qh.c          |   23 ++
>  tests/tcg/mips/mips64-dsp/shra_r_w.c           |   23 ++
>  tests/tcg/mips/mips64-dsp/shrav_ph.c           |   24 ++
>  tests/tcg/mips/mips64-dsp/shrav_pw.c           |   23 ++
>  tests/tcg/mips/mips64-dsp/shrav_qh.c           |   24 ++
>  tests/tcg/mips/mips64-dsp/shrav_r_ph.c         |   24 ++
>  tests/tcg/mips/mips64-dsp/shrav_r_pw.c         |   23 ++
>  tests/tcg/mips/mips64-dsp/shrav_r_qh.c         |   24 ++
>  tests/tcg/mips/mips64-dsp/shrav_r_w.c          |   24 ++
>  tests/tcg/mips/mips64-dsp/shrl_ob.c            |   23 ++
>  tests/tcg/mips/mips64-dsp/shrl_qb.c            |   23 ++
>  tests/tcg/mips/mips64-dsp/shrl_qh.c            |   22 ++
>  tests/tcg/mips/mips64-dsp/shrlv_ob.c           |   24 ++
>  tests/tcg/mips/mips64-dsp/shrlv_qb.c           |   24 ++
>  tests/tcg/mips/mips64-dsp/shrlv_qh.c           |   23 ++
>  tests/tcg/mips/mips64-dsp/subq_ph.c            |   27 +++
>  tests/tcg/mips/mips64-dsp/subq_pw.c            |   44 ++++
>  tests/tcg/mips/mips64-dsp/subq_qh.c            |   26 ++
>  tests/tcg/mips/mips64-dsp/subq_s_ph.c          |   27 +++
>  tests/tcg/mips/mips64-dsp/subq_s_pw.c          |   45 ++++
>  tests/tcg/mips/mips64-dsp/subq_s_qh.c          |   44 ++++
>  tests/tcg/mips/mips64-dsp/subq_s_w.c           |   27 +++
>  tests/tcg/mips/mips64-dsp/subu_ob.c            |   26 ++
>  tests/tcg/mips/mips64-dsp/subu_qb.c            |   27 +++
>  tests/tcg/mips/mips64-dsp/subu_s_ob.c          |   26 ++
>  tests/tcg/mips/mips64-dsp/subu_s_qb.c          |   27 +++
>  tests/tcg/mips/mips64-dsp/wrdsp.c              |   48 ++++
>  tests/tcg/mips/mips64-dspr2/.directory         |    2 +
>  tests/tcg/mips/mips64-dspr2/Makefile           |  117 +++++++++
>  tests/tcg/mips/mips64-dspr2/absq_s_qb.c        |   42 ++++
>  tests/tcg/mips/mips64-dspr2/addqh_ph.c         |   35 +++
>  tests/tcg/mips/mips64-dspr2/addqh_r_ph.c       |   35 +++
>  tests/tcg/mips/mips64-dspr2/addqh_r_w.c        |   38 +++
>  tests/tcg/mips/mips64-dspr2/addqh_w.c          |   39 +++
>  tests/tcg/mips/mips64-dspr2/addu_ph.c          |   35 +++
>  tests/tcg/mips/mips64-dspr2/addu_qh.c          |   41 ++++
>  tests/tcg/mips/mips64-dspr2/addu_s_ph.c        |   35 +++
>  tests/tcg/mips/mips64-dspr2/addu_s_qh.c        |   41 ++++
>  tests/tcg/mips/mips64-dspr2/adduh_ob.c         |   21 ++
>  tests/tcg/mips/mips64-dspr2/adduh_qb.c         |   35 +++
>  tests/tcg/mips/mips64-dspr2/adduh_r_ob.c       |   21 ++
>  tests/tcg/mips/mips64-dspr2/adduh_r_qb.c       |   35 +++
>  tests/tcg/mips/mips64-dspr2/append.c           |   35 +++
>  tests/tcg/mips/mips64-dspr2/balign.c           |   35 +++
>  tests/tcg/mips/mips64-dspr2/cmpgdu_eq_ob.c     |   26 ++
>  tests/tcg/mips/mips64-dspr2/cmpgdu_eq_qb.c     |   41 ++++
>  tests/tcg/mips/mips64-dspr2/cmpgdu_le_ob.c     |   26 ++
>  tests/tcg/mips/mips64-dspr2/cmpgdu_le_qb.c     |   48 ++++
>  tests/tcg/mips/mips64-dspr2/cmpgdu_lt_ob.c     |   26 ++
>  tests/tcg/mips/mips64-dspr2/cmpgdu_lt_qb.c     |   48 ++++
>  tests/tcg/mips/mips64-dspr2/dbalign.c          |   23 ++
>  tests/tcg/mips/mips64-dspr2/dpa_w_ph.c         |   32 +++
>  tests/tcg/mips/mips64-dspr2/dpa_w_qh.c         |   56 +++++
>  tests/tcg/mips/mips64-dspr2/dpaqx_s_w_ph.c     |   74 ++++++
>  tests/tcg/mips/mips64-dspr2/dpaqx_sa_w_ph.c    |   42 ++++
>  tests/tcg/mips/mips64-dspr2/dpax_w_ph.c        |   32 +++
>  tests/tcg/mips/mips64-dspr2/dps_w_ph.c         |   28 +++
>  tests/tcg/mips/mips64-dspr2/dps_w_qh.c         |   55 +++++
>  tests/tcg/mips/mips64-dspr2/dpsqx_s_w_ph.c     |   31 +++
>  tests/tcg/mips/mips64-dspr2/dpsqx_sa_w_ph.c    |   30 +++
>  tests/tcg/mips/mips64-dspr2/dpsx_w_ph.c        |   28 +++
>  tests/tcg/mips/mips64-dspr2/head.S             |   16 ++
>  tests/tcg/mips/mips64-dspr2/io.h               |   22 ++
>  tests/tcg/mips/mips64-dspr2/mips_boot.lds      |   31 +++
>  tests/tcg/mips/mips64-dspr2/mul_ph.c           |   26 ++
>  tests/tcg/mips/mips64-dspr2/mul_s_ph.c         |   26 ++
>  tests/tcg/mips/mips64-dspr2/muleq_s_w_phl.c    |   42 ++++
>  tests/tcg/mips/mips64-dspr2/mulq_rs_w.c        |   40 ++++
>  tests/tcg/mips/mips64-dspr2/mulq_s_ph.c        |   26 ++
>  tests/tcg/mips/mips64-dspr2/mulq_s_w.c         |   40 ++++
>  tests/tcg/mips/mips64-dspr2/mulsa_w_ph.c       |   30 +++
>  tests/tcg/mips/mips64-dspr2/mulsaq_s_w_ph.c    |   30 +++
>  tests/tcg/mips/mips64-dspr2/precr_qb_ph.c      |   23 ++
>  tests/tcg/mips/mips64-dspr2/precr_sra_ph_w.c   |   37 +++
>  tests/tcg/mips/mips64-dspr2/precr_sra_r_ph_w.c |   37 +++
>  tests/tcg/mips/mips64-dspr2/prepend.c          |   35 +++
>  tests/tcg/mips/mips64-dspr2/printf.c           |  266 +++++++++++++++++++++
>  tests/tcg/mips/mips64-dspr2/shra_qb.c          |   35 +++
>  tests/tcg/mips/mips64-dspr2/shra_r_qb.c        |   35 +++
>  tests/tcg/mips/mips64-dspr2/shrav_ob.c         |   22 ++
>  tests/tcg/mips/mips64-dspr2/shrav_qb.c         |   37 +++
>  tests/tcg/mips/mips64-dspr2/shrav_r_ob.c       |   22 ++
>  tests/tcg/mips/mips64-dspr2/shrav_r_qb.c       |   37 +++
>  tests/tcg/mips/mips64-dspr2/shrl_ph.c          |   22 ++
>  tests/tcg/mips/mips64-dspr2/shrlv_ph.c         |   23 ++
>  tests/tcg/mips/mips64-dspr2/subqh_ph.c         |   23 ++
>  tests/tcg/mips/mips64-dspr2/subqh_r_ph.c       |   23 ++
>  tests/tcg/mips/mips64-dspr2/subqh_r_w.c        |   23 ++
>  tests/tcg/mips/mips64-dspr2/subqh_w.c          |   23 ++
>  tests/tcg/mips/mips64-dspr2/subu_ph.c          |   26 ++
>  tests/tcg/mips/mips64-dspr2/subu_qh.c          |   24 ++
>  tests/tcg/mips/mips64-dspr2/subu_s_ph.c        |   25 ++
>  tests/tcg/mips/mips64-dspr2/subu_s_qh.c        |   24 ++
>  tests/tcg/mips/mips64-dspr2/subuh_ob.c         |   23 ++
>  tests/tcg/mips/mips64-dspr2/subuh_qb.c         |   23 ++
>  tests/tcg/mips/mips64-dspr2/subuh_r_ob.c       |   23 ++
>  tests/tcg/mips/mips64-dspr2/subuh_r_qb.c       |   23 ++
>  487 files changed, 15870 insertions(+)
>  create mode 100644 tests/tcg/mips/mips32-dsp/Makefile
>  create mode 100644 tests/tcg/mips/mips32-dsp/absq_s_ph.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/absq_s_w.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/addq_ph.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/addq_s_ph.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/addsc.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/addu_qb.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/addu_s_qb.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/addwc.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/bitrev.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/bposge32.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/cmp_eq_ph.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/cmp_le_ph.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/cmp_lt_ph.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/cmpgu_eq_qb.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/cmpgu_le_qb.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/cmpgu_lt_qb.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/cmpu_eq_qb.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/cmpu_le_qb.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/cmpu_lt_qb.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/dpaq_s_w_ph.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/dpaq_sa_l_w.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/dpau_h_qbl.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/dpau_h_qbr.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/dpsq_s_w_ph.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/dpsq_sa_l_w.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/dpsu_h_qbl.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/dpsu_h_qbr.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/extp.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/extpdp.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/extpdpv.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/extpv.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/extr_r_w.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/extr_rs_w.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/extr_s_h.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/extr_w.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/extrv_r_w.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/extrv_rs_w.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/extrv_s_h.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/extrv_w.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/insv.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/lbux.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/lhx.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/lwx.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/madd.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/maddu.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/main.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/maq_s_w_phl.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/maq_s_w_phr.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/maq_sa_w_phl.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/maq_sa_w_phr.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/mfhi.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/mflo.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/modsub.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/msub.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/msubu.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/mthi.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/mthlip.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/mtlo.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/muleq_s_w_phl.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/muleq_s_w_phr.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/muleu_s_ph_qbl.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/muleu_s_ph_qbr.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/mulq_rs_ph.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/mult.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/multu.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/packrl_ph.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/pick_ph.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/pick_qb.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/preceq_w_phl.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/preceq_w_phr.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/precequ_ph_qbl.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/precequ_ph_qbla.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/precequ_ph_qbr.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/precequ_ph_qbra.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/preceu_ph_qbl.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/preceu_ph_qbla.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/preceu_ph_qbr.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/preceu_ph_qbra.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/precrq_ph_w.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/precrq_qb_ph.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/precrq_rs_ph_w.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/precrqu_s_qb_ph.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/raddu_w_qb.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/rddsp.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/repl_ph.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/repl_qb.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/replv_ph.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/replv_qb.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/shilo.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/shilov.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/shll_ph.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/shll_qb.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/shll_s_ph.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/shll_s_w.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/shllv_ph.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/shllv_qb.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/shllv_s_ph.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/shllv_s_w.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/shra_ph.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/shra_r_ph.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/shra_r_w.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/shrav_ph.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/shrav_r_ph.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/shrav_r_w.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/shrl_qb.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/shrlv_qb.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/subq_ph.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/subq_s_ph.c
>  create mode 100644 tests/tcg/mips/mips32-dsp/subq_s_w.c
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>  create mode 100644 tests/tcg/mips/mips64-dsp/shll_qb.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shll_qh.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shll_s_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shll_s_pw.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shll_s_qh.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shll_s_w.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shllv_ob.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shllv_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shllv_pw.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shllv_qb.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shllv_qh.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shllv_s_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shllv_s_pw.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shllv_s_qh.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shllv_s_w.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shra_ob.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shra_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shra_pw.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shra_qh.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shra_r_ob.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shra_r_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shra_r_pw.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shra_r_qh.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shra_r_w.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shrav_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shrav_pw.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shrav_qh.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shrav_r_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shrav_r_pw.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shrav_r_qh.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shrav_r_w.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shrl_ob.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shrl_qb.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shrl_qh.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shrlv_ob.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shrlv_qb.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/shrlv_qh.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/subq_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/subq_pw.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/subq_qh.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/subq_s_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/subq_s_pw.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/subq_s_qh.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/subq_s_w.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/subu_ob.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/subu_qb.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/subu_s_ob.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/subu_s_qb.c
>  create mode 100644 tests/tcg/mips/mips64-dsp/wrdsp.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/.directory
>  create mode 100644 tests/tcg/mips/mips64-dspr2/Makefile
>  create mode 100644 tests/tcg/mips/mips64-dspr2/absq_s_qb.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/addqh_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/addqh_r_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/addqh_r_w.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/addqh_w.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/addu_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/addu_qh.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/addu_s_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/addu_s_qh.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/adduh_ob.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/adduh_qb.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/adduh_r_ob.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/adduh_r_qb.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/append.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/balign.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/cmpgdu_eq_ob.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/cmpgdu_eq_qb.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/cmpgdu_le_ob.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/cmpgdu_le_qb.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/cmpgdu_lt_ob.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/cmpgdu_lt_qb.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/dbalign.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/dpa_w_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/dpa_w_qh.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/dpaqx_s_w_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/dpaqx_sa_w_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/dpax_w_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/dps_w_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/dps_w_qh.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/dpsqx_s_w_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/dpsqx_sa_w_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/dpsx_w_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/head.S
>  create mode 100644 tests/tcg/mips/mips64-dspr2/io.h
>  create mode 100644 tests/tcg/mips/mips64-dspr2/mips_boot.lds
>  create mode 100644 tests/tcg/mips/mips64-dspr2/mul_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/mul_s_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/muleq_s_w_phl.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/mulq_rs_w.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/mulq_s_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/mulq_s_w.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/mulsa_w_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/mulsaq_s_w_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/precr_qb_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/precr_sra_ph_w.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/precr_sra_r_ph_w.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/prepend.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/printf.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/shra_qb.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/shra_r_qb.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/shrav_ob.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/shrav_qb.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/shrav_r_ob.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/shrav_r_qb.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/shrl_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/shrlv_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/subqh_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/subqh_r_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/subqh_r_w.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/subqh_w.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/subu_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/subu_qh.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/subu_s_ph.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/subu_s_qh.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/subuh_ob.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/subuh_qb.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/subuh_r_ob.c
>  create mode 100644 tests/tcg/mips/mips64-dspr2/subuh_r_qb.c
> 
> diff --git a/tests/tcg/mips/mips32-dsp/Makefile b/tests/tcg/mips/mips32-dsp/Makefile
> new file mode 100644
> index 0000000..232527b
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/Makefile
> @@ -0,0 +1,135 @@
> +-include ../../config-host.mak
> +
> +CROSS=mips64el-unknown-linux-gnu-
> +
> +SIM=qemu-mipsel
> +SIM_FLAGS=-cpu 74Kf
> +
> +CC      = $(CROSS)gcc
> +CFLAGS  = -mabi=32 -march=mips32r2 -mgp32 -mdsp -static
> +
> +TESTCASES = absq_s_ph.tst
> +TESTCASES += absq_s_w.tst
> +TESTCASES += addq_ph.tst
> +TESTCASES += addq_s_ph.tst
> +TESTCASES += addsc.tst
> +TESTCASES += addu_qb.tst
> +TESTCASES += addu_s_qb.tst
> +TESTCASES += addwc.tst
> +TESTCASES += bitrev.tst
> +TESTCASES += bposge32.tst
> +TESTCASES += cmp_eq_ph.tst
> +TESTCASES += cmpgu_eq_qb.tst
> +TESTCASES += cmpgu_le_qb.tst
> +TESTCASES += cmpgu_lt_qb.tst
> +TESTCASES += cmp_le_ph.tst
> +TESTCASES += cmp_lt_ph.tst
> +TESTCASES += cmpu_eq_qb.tst
> +TESTCASES += cmpu_le_qb.tst
> +TESTCASES += cmpu_lt_qb.tst
> +TESTCASES += dpaq_sa_l_w.tst
> +TESTCASES += dpaq_s_w_ph.tst
> +TESTCASES += dpau_h_qbl.tst
> +TESTCASES += dpau_h_qbr.tst
> +TESTCASES += dpsq_sa_l_w.tst
> +TESTCASES += dpsq_s_w_ph.tst
> +TESTCASES += dpsu_h_qbl.tst
> +TESTCASES += dpsu_h_qbr.tst
> +TESTCASES += extp.tst
> +TESTCASES += extpdp.tst
> +TESTCASES += extpdpv.tst
> +TESTCASES += extpv.tst
> +TESTCASES += extr_rs_w.tst
> +TESTCASES += extr_r_w.tst
> +TESTCASES += extr_s_h.tst
> +TESTCASES += extrv_rs_w.tst
> +TESTCASES += extrv_r_w.tst
> +TESTCASES += extrv_s_h.tst
> +TESTCASES += extrv_w.tst
> +TESTCASES += extr_w.tst
> +TESTCASES += insv.tst
> +TESTCASES += lbux.tst
> +TESTCASES += lhx.tst
> +TESTCASES += lwx.tst
> +TESTCASES += madd.tst
> +TESTCASES += maddu.tst
> +TESTCASES += maq_sa_w_phl.tst
> +TESTCASES += maq_sa_w_phr.tst
> +TESTCASES += maq_s_w_phl.tst
> +TESTCASES += maq_s_w_phr.tst
> +TESTCASES += mfhi.tst
> +TESTCASES += mflo.tst
> +TESTCASES += modsub.tst
> +TESTCASES += msub.tst
> +TESTCASES += msubu.tst
> +TESTCASES += mthi.tst
> +TESTCASES += mthlip.tst
> +TESTCASES += mtlo.tst
> +TESTCASES += muleq_s_w_phl.tst
> +TESTCASES += muleq_s_w_phr.tst
> +TESTCASES += muleu_s_ph_qbl.tst
> +TESTCASES += muleu_s_ph_qbr.tst
> +TESTCASES += mulq_rs_ph.tst
> +TESTCASES += mult.tst
> +TESTCASES += multu.tst
> +TESTCASES += packrl_ph.tst
> +TESTCASES += pick_ph.tst
> +TESTCASES += pick_qb.tst
> +TESTCASES += precequ_ph_qbla.tst
> +TESTCASES += precequ_ph_qbl.tst
> +TESTCASES += precequ_ph_qbra.tst
> +TESTCASES += precequ_ph_qbr.tst
> +TESTCASES += preceq_w_phl.tst
> +TESTCASES += preceq_w_phr.tst
> +TESTCASES += preceu_ph_qbla.tst
> +TESTCASES += preceu_ph_qbl.tst
> +TESTCASES += preceu_ph_qbra.tst
> +TESTCASES += preceu_ph_qbr.tst
> +TESTCASES += precrq_ph_w.tst
> +TESTCASES += precrq_qb_ph.tst
> +TESTCASES += precrq_rs_ph_w.tst
> +TESTCASES += precrqu_s_qb_ph.tst
> +TESTCASES += raddu_w_qb.tst
> +TESTCASES += rddsp.tst
> +TESTCASES += repl_ph.tst
> +TESTCASES += repl_qb.tst
> +TESTCASES += replv_ph.tst
> +TESTCASES += replv_qb.tst
> +TESTCASES += shilo.tst
> +TESTCASES += shilov.tst
> +TESTCASES += shll_ph.tst
> +TESTCASES += shll_qb.tst
> +TESTCASES += shll_s_ph.tst
> +TESTCASES += shll_s_w.tst
> +TESTCASES += shllv_ph.tst
> +TESTCASES += shllv_qb.tst
> +TESTCASES += shllv_s_ph.tst
> +TESTCASES += shllv_s_w.tst
> +TESTCASES += shra_ph.tst
> +TESTCASES += shra_r_ph.tst
> +TESTCASES += shra_r_w.tst
> +TESTCASES += shrav_ph.tst
> +TESTCASES += shrav_r_ph.tst
> +TESTCASES += shrav_r_w.tst
> +TESTCASES += shrl_qb.tst
> +TESTCASES += shrlv_qb.tst
> +TESTCASES += subq_ph.tst
> +TESTCASES += subq_s_ph.tst
> +TESTCASES += subq_s_w.tst
> +TESTCASES += subu_qb.tst
> +TESTCASES += subu_s_qb.tst
> +TESTCASES += wrdsp.tst
> +
> +all: $(TESTCASES)
> +
> +%.tst: %.c
> +	$(CC) $(CFLAGS) $< -o $@
> +
> +check: $(TESTCASES)
> +	@for case in $(TESTCASES); do \
> +        echo $(SIM) $(SIM_FLAGS) ./$$case;\
> +        $(SIM) $(SIM_FLAGS) ./$$case; \
> +	done
> +
> +clean:
> +	$(RM) -rf $(TESTCASES)
> diff --git a/tests/tcg/mips/mips32-dsp/absq_s_ph.c b/tests/tcg/mips/mips32-dsp/absq_s_ph.c
> new file mode 100644
> index 0000000..aa84112
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/absq_s_ph.c
> @@ -0,0 +1,31 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +
> +int main()
> +{
> +    int rd, rt;
> +    int result;
> +
> +    rt     = 0x10017EFD;
> +    result = 0x10017EFD;
> +
> +    __asm
> +        ("absq_s.ph %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    rt     = 0x8000A536;
> +    result = 0x7FFF5ACA;
> +
> +    __asm
> +        ("absq_s.ph %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/absq_s_w.c b/tests/tcg/mips/mips32-dsp/absq_s_w.c
> new file mode 100644
> index 0000000..3f52a48
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/absq_s_w.c
> @@ -0,0 +1,37 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rt;
> +    int result;
> +
> +    rt     = 0x80000000;
> +    result = 0x7FFFFFFF;
> +    __asm
> +        ("absq_s.w %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    rt     = 0x80030000;
> +    result = 0x7FFD0000;
> +    __asm
> +        ("absq_s.w %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    rt     = 0x31036080;
> +    result = 0x31036080;
> +    __asm
> +        ("absq_s.w %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/addq_ph.c b/tests/tcg/mips/mips32-dsp/addq_ph.c
> new file mode 100644
> index 0000000..2d9b6fc
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/addq_ph.c
> @@ -0,0 +1,30 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs     = 0xFFFFFFFF;
> +    rt     = 0x10101010;
> +    result = 0x100F100F;
> +    __asm
> +        ("addq.ph   %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(result == rd);
> +
> +    rs     = 0x3712847D;
> +    rt     = 0x0031AF2D;
> +    result = 0x374333AA;
> +    __asm
> +        ("addq.ph   %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(result == rd);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/addq_s_ph.c b/tests/tcg/mips/mips32-dsp/addq_s_ph.c
> new file mode 100644
> index 0000000..ace1ecd
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/addq_s_ph.c
> @@ -0,0 +1,30 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs     = 0xFFFFFFFF;
> +    rt     = 0x10101010;
> +    result = 0x100F100F;
> +    __asm
> +        ("addq_s.ph   %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(result == rd);
> +
> +    rs     = 0x3712847D;
> +    rt     = 0x0031AF2D;
> +    result = 0x37438000;
> +    __asm
> +        ("addq_s.ph   %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(result == rd);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/addsc.c b/tests/tcg/mips/mips32-dsp/addsc.c
> new file mode 100644
> index 0000000..9ad974a
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/addsc.c
> @@ -0,0 +1,30 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs     = 0x0000000F;
> +    rt     = 0x00000001;
> +    result = 0x00000010;
> +    __asm
> +        ("addsc %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    rs     = 0xFFFF0FFF;
> +    rt     = 0x00010111;
> +    result = 0x00001110;
> +    __asm
> +        ("addsc %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/addu_qb.c b/tests/tcg/mips/mips32-dsp/addu_qb.c
> new file mode 100644
> index 0000000..1b98e5e
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/addu_qb.c
> @@ -0,0 +1,30 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs     = 0x00FF00FF;
> +    rt     = 0x00010001;
> +    result = 0x00000000;
> +    __asm
> +        ("addu.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    rs     = 0xFFFF1111;
> +    rt     = 0x00020001;
> +    result = 0xFF011112;
> +    __asm
> +        ("addu.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/addu_s_qb.c b/tests/tcg/mips/mips32-dsp/addu_s_qb.c
> new file mode 100644
> index 0000000..46717ee
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/addu_s_qb.c
> @@ -0,0 +1,30 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs     = 0x10FF01FF;
> +    rt     = 0x10010001;
> +    result = 0x20FF01FF;
> +    __asm
> +        ("addu_s.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    rs     = 0xFFFF1111;
> +    rt     = 0x00020001;
> +    result = 0xFFFF1112;
> +    __asm
> +        ("addu_s.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/addwc.c b/tests/tcg/mips/mips32-dsp/addwc.c
> new file mode 100644
> index 0000000..d47ac65
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/addwc.c
> @@ -0,0 +1,30 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs     = 0x10FF01FF;
> +    rt     = 0x10010001;
> +    result = 0x21000200;
> +    __asm
> +        ("addwc %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    rs     = 0xFFFF1111;
> +    rt     = 0x00020001;
> +    result = 0x00011112;
> +    __asm
> +        ("addwc %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/bitrev.c b/tests/tcg/mips/mips32-dsp/bitrev.c
> new file mode 100644
> index 0000000..04d8a38
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/bitrev.c
> @@ -0,0 +1,20 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rt;
> +    int result;
> +
> +    rt     = 0x12345678;
> +    result = 0x00001E6A;
> +
> +    __asm
> +        ("bitrev %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/bposge32.c b/tests/tcg/mips/mips32-dsp/bposge32.c
> new file mode 100644
> index 0000000..d25417e
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/bposge32.c
> @@ -0,0 +1,44 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int dsp, sum;
> +    int result;
> +
> +    dsp =  0x20;
> +    sum = 0x01;
> +    result = 0x02;
> +
> +    __asm
> +        ("wrdsp %1\n\t"
> +         "bposge32 test1\n\t"
> +         "nop\n\t"
> +         "addi %0, 0xA2\n\t"
> +         "nop\n\t"
> +         "test1:\n\t"
> +         "addi %0, 0x01\n\t"
> +         : "+r"(sum)
> +         : "r"(dsp)
> +        );
> +    assert(sum == result);
> +
> +    dsp =  0x10;
> +    sum = 0x01;
> +    result = 0xA4;
> +
> +    __asm
> +        ("wrdsp %1\n\t"
> +         "bposge32 test2\n\t"
> +         "nop\n\t"
> +         "addi %0, 0xA2\n\t"
> +         "nop\n\t"
> +         "test2:\n\t"
> +         "addi %0, 0x01\n\t"
> +         : "+r"(sum)
> +         : "r"(dsp)
> +        );
> +    assert(sum == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/cmp_eq_ph.c b/tests/tcg/mips/mips32-dsp/cmp_eq_ph.c
> new file mode 100644
> index 0000000..957bd88
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/cmp_eq_ph.c
> @@ -0,0 +1,35 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs     = 0x11777066;
> +    rt     = 0x55AA33FF;
> +    result = 0x00;
> +    __asm
> +        ("cmp.eq.ph %1, %2\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    rd = (rd >> 24) & 0x03;
> +    assert(rd == result);
> +
> +    rs     = 0x11777066;
> +    rt     = 0x11777066;
> +    result = 0x03;
> +    __asm
> +        ("cmp.eq.ph %1, %2\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    rd = (rd >> 24) & 0x03;
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/cmp_le_ph.c b/tests/tcg/mips/mips32-dsp/cmp_le_ph.c
> new file mode 100644
> index 0000000..356f156
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/cmp_le_ph.c
> @@ -0,0 +1,35 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs     = 0x11777066;
> +    rt     = 0x55AA33FF;
> +    result = 0x02;
> +    __asm
> +        ("cmp.le.ph %1, %2\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    rd = (rd >> 24) & 0x03;
> +    assert(rd == result);
> +
> +    rs     = 0x11777066;
> +    rt     = 0x11777066;
> +    result = 0x03;
> +    __asm
> +        ("cmp.le.ph %1, %2\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    rd = (rd >> 24) & 0x03;
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/cmp_lt_ph.c b/tests/tcg/mips/mips32-dsp/cmp_lt_ph.c
> new file mode 100644
> index 0000000..3fb4827
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/cmp_lt_ph.c
> @@ -0,0 +1,35 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs     = 0x11777066;
> +    rt     = 0x55AA33FF;
> +    result = 0x02;
> +    __asm
> +        ("cmp.lt.ph %1, %2\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    rd = (rd >> 24) & 0x03;
> +    assert(rd == result);
> +
> +    rs     = 0x11777066;
> +    rt     = 0x11777066;
> +    result = 0x00;
> +    __asm
> +        ("cmp.lt.ph %1, %2\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    rd = (rd >> 24) & 0x03;
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/cmpgu_eq_qb.c b/tests/tcg/mips/mips32-dsp/cmpgu_eq_qb.c
> new file mode 100644
> index 0000000..2615c84
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/cmpgu_eq_qb.c
> @@ -0,0 +1,31 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs     = 0x11777066;
> +    rt     = 0x55AA70FF;
> +    result = 0x02;
> +    __asm
> +        ("cmpgu.eq.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    assert(rd == result);
> +
> +    rs     = 0x11777066;
> +    rt     = 0x11777066;
> +    result = 0x0F;
> +    __asm
> +        ("cmpgu.eq.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/cmpgu_le_qb.c b/tests/tcg/mips/mips32-dsp/cmpgu_le_qb.c
> new file mode 100644
> index 0000000..65d0813
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/cmpgu_le_qb.c
> @@ -0,0 +1,31 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs     = 0x11777066;
> +    rt     = 0x55AA70FF;
> +    result = 0x0F;
> +    __asm
> +        ("cmpgu.le.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    assert(rd == result);
> +
> +    rs     = 0x11777066;
> +    rt     = 0x11766066;
> +    result = 0x09;
> +    __asm
> +        ("cmpgu.le.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/cmpgu_lt_qb.c b/tests/tcg/mips/mips32-dsp/cmpgu_lt_qb.c
> new file mode 100644
> index 0000000..7dddad9
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/cmpgu_lt_qb.c
> @@ -0,0 +1,31 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs     = 0x11777066;
> +    rt     = 0x55AA70FF;
> +    result = 0x0D;
> +    __asm
> +        ("cmpgu.lt.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    assert(rd == result);
> +
> +    rs     = 0x11777066;
> +    rt     = 0x11766066;
> +    result = 0x00;
> +    __asm
> +        ("cmpgu.lt.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/cmpu_eq_qb.c b/tests/tcg/mips/mips32-dsp/cmpu_eq_qb.c
> new file mode 100644
> index 0000000..680f2a1
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/cmpu_eq_qb.c
> @@ -0,0 +1,35 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, rt;
> +    int dsp;
> +    int result;
> +
> +    rs         = 0x11777066;
> +    rt         = 0x55AA70FF;
> +    result     = 0x02;
> +    __asm
> +        ("cmpu.eq.qb %1, %2\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 24) & 0x0F;
> +    assert(dsp == result);
> +
> +    rs     = 0x11777066;
> +    rt     = 0x11777066;
> +    result = 0x0F;
> +    __asm
> +        ("cmpu.eq.qb %1, %2\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 24) & 0x0F;
> +    assert(dsp == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/cmpu_le_qb.c b/tests/tcg/mips/mips32-dsp/cmpu_le_qb.c
> new file mode 100644
> index 0000000..43cfa50
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/cmpu_le_qb.c
> @@ -0,0 +1,35 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, rt;
> +    int dsp;
> +    int result;
> +
> +    rs         = 0x11777066;
> +    rt         = 0x55AA70FF;
> +    result     = 0x0F;
> +    __asm
> +        ("cmpu.le.qb %1, %2\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 24) & 0x0F;
> +    assert(dsp == result);
> +
> +    rs     = 0x11777066;
> +    rt     = 0x11777066;
> +    result = 0x0F;
> +    __asm
> +        ("cmpu.le.qb %1, %2\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 24) & 0x0F;
> +    assert(dsp == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/cmpu_lt_qb.c b/tests/tcg/mips/mips32-dsp/cmpu_lt_qb.c
> new file mode 100644
> index 0000000..074ca5b
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/cmpu_lt_qb.c
> @@ -0,0 +1,35 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, rt;
> +    int dsp;
> +    int result;
> +
> +    rs         = 0x11777066;
> +    rt         = 0x55AA70FF;
> +    result     = 0x0D;
> +    __asm
> +        ("cmpu.lt.qb %1, %2\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 24) & 0x0F;
> +    assert(dsp == result);
> +
> +    rs     = 0x11777066;
> +    rt     = 0x11777066;
> +    result = 0x00;
> +    __asm
> +        ("cmpu.lt.qb %1, %2\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 24) & 0x0F;
> +    assert(dsp == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/dpaq_s_w_ph.c b/tests/tcg/mips/mips32-dsp/dpaq_s_w_ph.c
> new file mode 100644
> index 0000000..a6425b6
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/dpaq_s_w_ph.c
> @@ -0,0 +1,31 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, rt, dsp;
> +    int ach = 0, acl = 0;
> +    int resulth, resultl, resultdsp;
> +
> +    rs        = 0x800000FF;
> +    rt        = 0x80000002;
> +    resulth   = 0x00;
> +    resultl   = 0x800003FB;
> +    resultdsp = 0x01;
> +    __asm
> +        ("mthi        %0, $ac1\n\t"
> +         "mtlo        %1, $ac1\n\t"
> +         "dpaq_s.w.ph $ac1, %3, %4\n\t"
> +         "mfhi        %0,   $ac1\n\t"
> +         "mflo        %1,   $ac1\n\t"
> +         "rddsp       %2\n\t"
> +         : "+r"(ach), "+r"(acl), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = dsp >> 17 & 0x01;
> +    assert(dsp == resultdsp);
> +    assert(ach == resulth);
> +    assert(acl == resultl);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/dpaq_sa_l_w.c b/tests/tcg/mips/mips32-dsp/dpaq_sa_l_w.c
> new file mode 100644
> index 0000000..02bac2a
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/dpaq_sa_l_w.c
> @@ -0,0 +1,31 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, rt, dsp;
> +    int ach = 0, acl = 0;
> +    int resulth, resultl, resultdsp;
> +
> +    rs        = 0x800000FF;
> +    rt        = 0x80000002;
> +    resulth   = 0x7FFFFFFF;
> +    resultl   = 0xFFFFFFFF;
> +    resultdsp = 0x01;
> +    __asm
> +        ("mthi        %0, $ac1\n\t"
> +         "mtlo        %0, $ac1\n\t"
> +         "dpaq_sa.l.w $ac1, %3, %4\n\t"
> +         "mfhi        %0,   $ac1\n\t"
> +         "mflo        %1,   $ac1\n\t"
> +         "rddsp       %2\n\t"
> +         : "+r"(ach), "+r"(acl), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 17) & 0x01;
> +    assert(dsp == resultdsp);
> +    assert(ach == resulth);
> +    assert(acl == resultl);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/dpau_h_qbl.c b/tests/tcg/mips/mips32-dsp/dpau_h_qbl.c
> new file mode 100644
> index 0000000..6017b5e
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/dpau_h_qbl.c
> @@ -0,0 +1,27 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, rt;
> +    int ach = 5, acl = 3;
> +    int resulth, resultl;
> +
> +    rs        = 0x800000FF;
> +    rt        = 0x80000002;
> +    resulth   = 0x05;
> +    resultl   = 0x4003;
> +    __asm
> +        ("mthi       %0, $ac1\n\t"
> +         "mtlo       %1, $ac1\n\t"
> +         "dpau.h.qbl $ac1, %2, %3\n\t"
> +         "mfhi       %0,   $ac1\n\t"
> +         "mflo       %1,   $ac1\n\t"
> +         : "+r"(ach), "+r"(acl)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(ach == resulth);
> +    assert(acl == resultl);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/dpau_h_qbr.c b/tests/tcg/mips/mips32-dsp/dpau_h_qbr.c
> new file mode 100644
> index 0000000..e4abb2e
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/dpau_h_qbr.c
> @@ -0,0 +1,27 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, rt;
> +    int ach = 5, acl = 3;
> +    int resulth, resultl;
> +
> +    rs        = 0x800000FF;
> +    rt        = 0x80000002;
> +    resulth   = 0x05;
> +    resultl   = 0x0201;
> +    __asm
> +        ("mthi       %0, $ac1\n\t"
> +         "mtlo       %1, $ac1\n\t"
> +         "dpau.h.qbr $ac1, %2, %3\n\t"
> +         "mfhi       %0,   $ac1\n\t"
> +         "mflo       %1,   $ac1\n\t"
> +         : "+r"(ach), "+r"(acl)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(ach == resulth);
> +    assert(acl == resultl);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/dpsq_s_w_ph.c b/tests/tcg/mips/mips32-dsp/dpsq_s_w_ph.c
> new file mode 100644
> index 0000000..70ad443
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/dpsq_s_w_ph.c
> @@ -0,0 +1,27 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, rt;
> +    int ach = 5, acl = 5;
> +    int resulth, resultl;
> +
> +    rs      = 0xBC0123AD;
> +    rt      = 0x01643721;
> +    resulth = 0x04;
> +    resultl = 0xEE9794A3;
> +    __asm
> +        ("mthi  %0, $ac1\n\t"
> +         "mtlo  %1, $ac1\n\t"
> +         "dpsq_s.w.ph $ac1, %2, %3\n\t"
> +         "mfhi  %0, $ac1\n\t"
> +         "mflo  %1, $ac1\n\t"
> +         : "+r"(ach), "+r"(acl)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(ach == resulth);
> +    assert(acl == resultl);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/dpsq_sa_l_w.c b/tests/tcg/mips/mips32-dsp/dpsq_sa_l_w.c
> new file mode 100644
> index 0000000..3d6b24c
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/dpsq_sa_l_w.c
> @@ -0,0 +1,31 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, rt, dsp;
> +    int ach = 5, acl = 5;
> +    int resulth, resultl, resultdsp;
> +
> +    rs      = 0xBC0123AD;
> +    rt      = 0x01643721;
> +    resulth = 0x7FFFFFFF;
> +    resultl = 0xFFFFFFFF;
> +    resultdsp = 0x01;
> +    __asm
> +        ("mthi  %0, $ac1\n\t"
> +         "mtlo  %1, $ac1\n\t"
> +         "dpsq_sa.l.w $ac1, %3, %4\n\t"
> +         "mfhi  %0, $ac1\n\t"
> +         "mflo  %1, $ac1\n\t"
> +         "rddsp %2\n\t"
> +         : "+r"(ach), "+r"(acl), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 17) & 0x01;
> +    assert(dsp == resultdsp);
> +    assert(ach == resulth);
> +    assert(acl == resultl);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/dpsu_h_qbl.c b/tests/tcg/mips/mips32-dsp/dpsu_h_qbl.c
> new file mode 100644
> index 0000000..94e2bf6
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/dpsu_h_qbl.c
> @@ -0,0 +1,27 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, rt;
> +    int ach = 5, acl = 5;
> +    int resulth, resultl;
> +
> +    rs      = 0xBC0123AD;
> +    rt      = 0x01643721;
> +    resulth = 0x04;
> +    resultl = 0xFFFFFEE5;
> +    __asm
> +        ("mthi  %0, $ac1\n\t"
> +         "mtlo  %1, $ac1\n\t"
> +         "dpsu.h.qbl $ac1, %2, %3\n\t"
> +         "mfhi  %0, $ac1\n\t"
> +         "mflo  %1, $ac1\n\t"
> +         : "+r"(ach), "+r"(acl)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(ach == resulth);
> +    assert(acl == resultl);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/dpsu_h_qbr.c b/tests/tcg/mips/mips32-dsp/dpsu_h_qbr.c
> new file mode 100644
> index 0000000..a1e6635
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/dpsu_h_qbr.c
> @@ -0,0 +1,27 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, rt;
> +    int ach = 5, acl = 5;
> +    int resulth, resultl;
> +
> +    rs      = 0xBC0123AD;
> +    rt      = 0x01643721;
> +    resulth = 0x04;
> +    resultl = 0xFFFFE233;
> +    __asm
> +        ("mthi  %0, $ac1\n\t"
> +         "mtlo  %1, $ac1\n\t"
> +         "dpsu.h.qbr $ac1, %2, %3\n\t"
> +         "mfhi  %0, $ac1\n\t"
> +         "mflo  %1, $ac1\n\t"
> +         : "+r"(ach), "+r"(acl)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(ach == resulth);
> +    assert(acl == resultl);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/extp.c b/tests/tcg/mips/mips32-dsp/extp.c
> new file mode 100644
> index 0000000..21a67af
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/extp.c
> @@ -0,0 +1,44 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rt, ach, acl, dsp;
> +    int result;
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    dsp = 0x07;
> +    result = 0x000C;
> +
> +    __asm
> +        ("wrdsp %1, 0x01\n\t"
> +         "mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "extp %0, $ac1, 0x03\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "+r"(dsp)
> +         : "r"(ach), "r"(acl)
> +        );
> +    dsp = (dsp >> 14) & 0x01;
> +    assert(dsp == 0);
> +    assert(result == rt);
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    dsp = 0x01;
> +
> +    __asm
> +        ("wrdsp %1, 0x01\n\t"
> +         "mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "extp %0, $ac1, 0x03\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "+r"(dsp)
> +         : "r"(ach), "r"(acl)
> +        );
> +    dsp = (dsp >> 14) & 0x01;
> +    assert(dsp == 1);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/extpdp.c b/tests/tcg/mips/mips32-dsp/extpdp.c
> new file mode 100644
> index 0000000..15ba082
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/extpdp.c
> @@ -0,0 +1,46 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rt, ach, acl, dsp, pos, efi;
> +    int result;
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    dsp = 0x07;
> +    result = 0x000C;
> +
> +    __asm
> +        ("wrdsp %1, 0x01\n\t"
> +         "mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "extpdp %0, $ac1, 0x03\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "+r"(dsp)
> +         : "r"(ach), "r"(acl)
> +        );
> +    pos =  dsp & 0x3F;
> +    efi = (dsp >> 14) & 0x01;
> +    assert(pos == 3);
> +    assert(efi == 0);
> +    assert(result == rt);
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    dsp = 0x01;
> +
> +    __asm
> +        ("wrdsp %1, 0x01\n\t"
> +         "mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "extpdp %0, $ac1, 0x03\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "+r"(dsp)
> +         : "r"(ach), "r"(acl)
> +        );
> +    efi = (dsp >> 14) & 0x01;
> +    assert(efi == 1);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/extpdpv.c b/tests/tcg/mips/mips32-dsp/extpdpv.c
> new file mode 100644
> index 0000000..f5774ee
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/extpdpv.c
> @@ -0,0 +1,47 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rt, rs, ach, acl, dsp, pos, efi;
> +    int result;
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    dsp = 0x07;
> +    rs  = 0x03;
> +    result = 0x000C;
> +
> +    __asm
> +        ("wrdsp %1, 0x01\n\t"
> +         "mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "extpdpv %0, $ac1, %4\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "+r"(dsp)
> +         : "r"(ach), "r"(acl), "r"(rs)
> +        );
> +    pos =  dsp & 0x3F;
> +    efi = (dsp >> 14) & 0x01;
> +    assert(pos == 3);
> +    assert(efi == 0);
> +    assert(result == rt);
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    dsp = 0x01;
> +
> +    __asm
> +        ("wrdsp %1, 0x01\n\t"
> +         "mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "extpdpv %0, $ac1, %4\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "+r"(dsp)
> +         : "r"(ach), "r"(acl), "r"(rs)
> +        );
> +    efi = (dsp >> 14) & 0x01;
> +    assert(efi == 1);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/extpv.c b/tests/tcg/mips/mips32-dsp/extpv.c
> new file mode 100644
> index 0000000..401b94a
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/extpv.c
> @@ -0,0 +1,45 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rt, ac, ach, acl, dsp;
> +    int result;
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    dsp = 0x07;
> +    ac  = 0x03;
> +    result = 0x000C;
> +
> +    __asm
> +        ("wrdsp %1, 0x01\n\t"
> +         "mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "extpv %0, $ac1, %4\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "+r"(dsp)
> +         : "r"(ach), "r"(acl), "r"(ac)
> +        );
> +    dsp = (dsp >> 14) & 0x01;
> +    assert(dsp == 0);
> +    assert(result == rt);
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    dsp = 0x01;
> +
> +    __asm
> +        ("wrdsp %1, 0x01\n\t"
> +         "mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "extpv %0, $ac1, %4\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "+r"(dsp)
> +         : "r"(ach), "r"(acl), "r"(ac)
> +        );
> +    dsp = (dsp >> 14) & 0x01;
> +    assert(dsp == 1);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/extr_r_w.c b/tests/tcg/mips/mips32-dsp/extr_r_w.c
> new file mode 100644
> index 0000000..570dfbd
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/extr_r_w.c
> @@ -0,0 +1,25 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rt, ach, acl, dsp;
> +    int result;
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    result = 0xA0001699;
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "extr_r.w %0, $ac1, 0x03\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "=r"(dsp)
> +         : "r"(ach), "r"(acl)
> +        );
> +    dsp = (dsp >> 23) & 0x01;
> +    assert(dsp == 1);
> +    assert(result == rt);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/extr_rs_w.c b/tests/tcg/mips/mips32-dsp/extr_rs_w.c
> new file mode 100644
> index 0000000..a0bf7b4
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/extr_rs_w.c
> @@ -0,0 +1,25 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rt, ach, acl, dsp;
> +    int result;
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    result = 0x7FFFFFFF;
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "extr_rs.w %0, $ac1, 0x03\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "=r"(dsp)
> +         : "r"(ach), "r"(acl)
> +        );
> +    dsp = (dsp >> 23) & 0x01;
> +    assert(dsp == 1);
> +    assert(result == rt);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/extr_s_h.c b/tests/tcg/mips/mips32-dsp/extr_s_h.c
> new file mode 100644
> index 0000000..c863f29
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/extr_s_h.c
> @@ -0,0 +1,25 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rt, ach, acl, dsp;
> +    int result;
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    result = 0x00007FFF;
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "extr_s.h %0, $ac1, 0x03\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "=r"(dsp)
> +         : "r"(ach), "r"(acl)
> +        );
> +    dsp = (dsp >> 23) & 0x01;
> +    assert(dsp == 1);
> +    assert(result == rt);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/extr_w.c b/tests/tcg/mips/mips32-dsp/extr_w.c
> new file mode 100644
> index 0000000..40994cb
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/extr_w.c
> @@ -0,0 +1,25 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rt, ach, acl, dsp;
> +    int result;
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    result = 0xA0001699;
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "extr.w %0, $ac1, 0x03\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "=r"(dsp)
> +         : "r"(ach), "r"(acl)
> +        );
> +    dsp = (dsp >> 23) & 0x01;
> +    assert(dsp == 1);
> +    assert(result == rt);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/extrv_r_w.c b/tests/tcg/mips/mips32-dsp/extrv_r_w.c
> new file mode 100644
> index 0000000..43aba53
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/extrv_r_w.c
> @@ -0,0 +1,29 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rt, rs, ach, acl, dsp;
> +    int result;
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    dsp = 0x07;
> +    rs  = 0x03;
> +    result = 0xA0001699;
> +
> +    __asm
> +        ("wrdsp %1, 0x01\n\t"
> +         "mthi %3, $ac1\n\t"
> +         "mtlo %4, $ac1\n\t"
> +         "extrv_r.w %0, $ac1, %2\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "+r"(dsp)
> +         : "r"(rs), "r"(ach), "r"(acl)
> +        );
> +    dsp = (dsp >> 23) & 0x01;
> +    assert(dsp == 1);
> +    assert(result == rt);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/extrv_rs_w.c b/tests/tcg/mips/mips32-dsp/extrv_rs_w.c
> new file mode 100644
> index 0000000..60e0d43
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/extrv_rs_w.c
> @@ -0,0 +1,29 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rt, rs, ach, acl, dsp;
> +    int result;
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    dsp = 0x07;
> +    rs  = 0x03;
> +    result = 0x7FFFFFFF;
> +
> +    __asm
> +        ("wrdsp %1, 0x01\n\t"
> +         "mthi %3, $ac1\n\t"
> +         "mtlo %4, $ac1\n\t"
> +         "extrv_rs.w %0, $ac1, %2\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "+r"(dsp)
> +         : "r"(rs), "r"(ach), "r"(acl)
> +        );
> +    dsp = (dsp >> 23) & 0x01;
> +    assert(dsp == 1);
> +    assert(result == rt);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/extrv_s_h.c b/tests/tcg/mips/mips32-dsp/extrv_s_h.c
> new file mode 100644
> index 0000000..c7f70e3
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/extrv_s_h.c
> @@ -0,0 +1,29 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rt, rs, ach, acl, dsp;
> +    int result;
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    dsp = 0x07;
> +    rs  = 0x03;
> +    result = 0x00007FFF;
> +
> +    __asm
> +        ("wrdsp %1, 0x01\n\t"
> +         "mthi %3, $ac1\n\t"
> +         "mtlo %4, $ac1\n\t"
> +         "extrv_s.h %0, $ac1, %2\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "+r"(dsp)
> +         : "r"(rs), "r"(ach), "r"(acl)
> +        );
> +    dsp = (dsp >> 23) & 0x01;
> +    assert(dsp == 1);
> +    assert(result == rt);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/extrv_w.c b/tests/tcg/mips/mips32-dsp/extrv_w.c
> new file mode 100644
> index 0000000..c63a25c
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/extrv_w.c
> @@ -0,0 +1,29 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rt, rs, ach, acl, dsp;
> +    int result;
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    dsp = 0x07;
> +    rs  = 0x03;
> +    result = 0xA0001699;
> +
> +    __asm
> +        ("wrdsp %1, 0x01\n\t"
> +         "mthi %3, $ac1\n\t"
> +         "mtlo %4, $ac1\n\t"
> +         "extrv.w %0, $ac1, %2\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "+r"(dsp)
> +         : "r"(rs), "r"(ach), "r"(acl)
> +        );
> +    dsp = (dsp >> 23) & 0x01;
> +    assert(dsp == 1);
> +    assert(result == rt);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/insv.c b/tests/tcg/mips/mips32-dsp/insv.c
> new file mode 100644
> index 0000000..7e3b047
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/insv.c
> @@ -0,0 +1,23 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rt, rs, dsp;
> +    int result;
> +
> +    /* msb = 10, lsb = 5 */
> +    dsp    = 0x305;
> +    rt     = 0x12345678;
> +    rs     = 0x87654321;
> +    result = 0x12345338;
> +    __asm
> +        ("wrdsp %2, 0x03\n\t"
> +         "insv  %0, %1\n\t"
> +         : "+r"(rt)
> +         : "r"(rs), "r"(dsp)
> +        );
> +    assert(rt == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/lbux.c b/tests/tcg/mips/mips32-dsp/lbux.c
> new file mode 100644
> index 0000000..2337abe
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/lbux.c
> @@ -0,0 +1,25 @@
> +#include <stdio.h>
> +#include <assert.h>
> +
> +int main(void)
> +{
> +    int value, rd;
> +    int *p;
> +    unsigned long addr, index;
> +    int result;
> +
> +    value  = 0xBCDEF389;
> +    p = &value;
> +    addr = (unsigned long)p;
> +    index  = 0;
> +    result = value & 0xFF;
> +    __asm
> +        ("lbux %0, %1(%2)\n\t"
> +         : "=r"(rd)
> +         : "r"(index), "r"(addr)
> +        );
> +
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/lhx.c b/tests/tcg/mips/mips32-dsp/lhx.c
> new file mode 100644
> index 0000000..10be3b3
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/lhx.c
> @@ -0,0 +1,25 @@
> +#include <stdio.h>
> +#include <assert.h>
> +
> +int main(void)
> +{
> +    int value, rd;
> +    int *p;
> +    unsigned long addr, index;
> +    int result;
> +
> +    value  = 0xBCDEF389;
> +    p = &value;
> +    addr = (unsigned long)p;
> +    index  = 0;
> +    result = 0xFFFFF389;
> +    __asm
> +        ("lhx %0, %1(%2)\n\t"
> +         : "=r"(rd)
> +         : "r"(index), "r"(addr)
> +        );
> +
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/lwx.c b/tests/tcg/mips/mips32-dsp/lwx.c
> new file mode 100644
> index 0000000..e6543c9
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/lwx.c
> @@ -0,0 +1,25 @@
> +#include <stdio.h>
> +#include <assert.h>
> +
> +int main(void)
> +{
> +    int value, rd;
> +    int *p;
> +    unsigned long addr, index;
> +    int result;
> +
> +    value  = 0xBCDEF389;
> +    p = &value;
> +    addr = (unsigned long)p;
> +    index  = 0;
> +    result = 0xBCDEF389;
> +    __asm
> +        ("lwx %0, %1(%2)\n\t"
> +         : "=r"(rd)
> +         : "r"(index), "r"(addr)
> +        );
> +
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/madd.c b/tests/tcg/mips/mips32-dsp/madd.c
> new file mode 100644
> index 0000000..af4bfcf
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/madd.c
> @@ -0,0 +1,31 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rt, rs;
> +    int achi, acli;
> +    int acho, aclo;
> +    int resulth, resultl;
> +
> +    achi = 0x05;
> +    acli = 0xB4CB;
> +    rs  = 0x01;
> +    rt  = 0x01;
> +    resulth = 0x05;
> +    resultl = 0xB4CC;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "madd $ac1, %4, %5\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +    assert(resulth == acho);
> +    assert(resultl == aclo);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/maddu.c b/tests/tcg/mips/mips32-dsp/maddu.c
> new file mode 100644
> index 0000000..af4bfcf
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/maddu.c
> @@ -0,0 +1,31 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rt, rs;
> +    int achi, acli;
> +    int acho, aclo;
> +    int resulth, resultl;
> +
> +    achi = 0x05;
> +    acli = 0xB4CB;
> +    rs  = 0x01;
> +    rt  = 0x01;
> +    resulth = 0x05;
> +    resultl = 0xB4CC;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "madd $ac1, %4, %5\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +    assert(resulth == acho);
> +    assert(resultl == aclo);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/main.c b/tests/tcg/mips/mips32-dsp/main.c
> new file mode 100644
> index 0000000..b296b20
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/main.c
> @@ -0,0 +1,6 @@
> +#include<stdio.h>
> +
> +int main()
> +{
> +    printf("hello world\n");
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/maq_s_w_phl.c b/tests/tcg/mips/mips32-dsp/maq_s_w_phl.c
> new file mode 100644
> index 0000000..f5de818
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/maq_s_w_phl.c
> @@ -0,0 +1,31 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rt, rs;
> +    int achi, acli;
> +    int acho, aclo;
> +    int resulth, resultl;
> +
> +    achi = 0x05;
> +    acli = 0xB4CB;
> +    rs  = 0xFF060000;
> +    rt  = 0xCB000000;
> +    resulth = 0x04;
> +    resultl = 0x947438CB;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "maq_s.w.phl $ac1, %4, %5\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +    assert(resulth == acho);
> +    assert(resultl == aclo);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/maq_s_w_phr.c b/tests/tcg/mips/mips32-dsp/maq_s_w_phr.c
> new file mode 100644
> index 0000000..8336f00
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/maq_s_w_phr.c
> @@ -0,0 +1,31 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rt, rs;
> +    int achi, acli;
> +    int acho, aclo;
> +    int resulth, resultl;
> +
> +    achi = 0x05;
> +    acli = 0xB4CB;
> +    rs  = 0xFF06;
> +    rt  = 0xCB00;
> +    resulth = 0x04;
> +    resultl = 0x947438CB;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "maq_s.w.phr $ac1, %4, %5\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +    assert(resulth == acho);
> +    assert(resultl == aclo);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/maq_sa_w_phl.c b/tests/tcg/mips/mips32-dsp/maq_sa_w_phl.c
> new file mode 100644
> index 0000000..6111d8d
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/maq_sa_w_phl.c
> @@ -0,0 +1,31 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rt, rs;
> +    int achi, acli;
> +    int acho, aclo;
> +    int resulth, resultl;
> +
> +    achi = 0x05;
> +    acli = 0xB4CB;
> +    rs  = 0xFF060000;
> +    rt  = 0xCB000000;
> +    resulth = 0x00;
> +    resultl = 0x7FFFFFFF;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "maq_sa.w.phl $ac1, %4, %5\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +    assert(resulth == acho);
> +    assert(resultl == aclo);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/maq_sa_w_phr.c b/tests/tcg/mips/mips32-dsp/maq_sa_w_phr.c
> new file mode 100644
> index 0000000..96b4915
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/maq_sa_w_phr.c
> @@ -0,0 +1,31 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rt, rs;
> +    int achi, acli;
> +    int acho, aclo;
> +    int resulth, resultl;
> +
> +    achi = 0x05;
> +    acli = 0xB4CB;
> +    rs  = 0xFF06;
> +    rt  = 0xCB00;
> +    resulth = 0x00;
> +    resultl = 0x7FFFFFFF;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "maq_sa.w.phr $ac1, %4, %5\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +    assert(resulth == acho);
> +    assert(resultl == aclo);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/mfhi.c b/tests/tcg/mips/mips32-dsp/mfhi.c
> new file mode 100644
> index 0000000..43a8066
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/mfhi.c
> @@ -0,0 +1,21 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int achi, acho;
> +    int result;
> +
> +    achi   = 0x004433;
> +    result = 0x004433;
> +
> +    __asm
> +        ("mthi %1, $ac1\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         : "=r"(acho)
> +         : "r"(achi)
> +        );
> +    assert(result == acho);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/mflo.c b/tests/tcg/mips/mips32-dsp/mflo.c
> new file mode 100644
> index 0000000..caeafdb
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/mflo.c
> @@ -0,0 +1,21 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int acli, aclo;
> +    int result;
> +
> +    acli   = 0x004433;
> +    result = 0x004433;
> +
> +    __asm
> +        ("mthi %1, $ac1\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         : "=r"(aclo)
> +         : "r"(acli)
> +        );
> +    assert(result == aclo);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/modsub.c b/tests/tcg/mips/mips32-dsp/modsub.c
> new file mode 100644
> index 0000000..c294eeb
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/modsub.c
> @@ -0,0 +1,30 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs     = 0xFFFFFFFF;
> +    rt     = 0x000000FF;
> +    result = 0xFFFFFF00;
> +    __asm
> +        ("modsub %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(result == rd);
> +
> +    rs     = 0x00000000;
> +    rt     = 0x00CD1FFF;
> +    result = 0x0000CD1F;
> +    __asm
> +        ("modsub %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(result == rd);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/msub.c b/tests/tcg/mips/mips32-dsp/msub.c
> new file mode 100644
> index 0000000..5779e6f
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/msub.c
> @@ -0,0 +1,30 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int achi, acli, rs, rt;
> +    int acho, aclo;
> +    int resulth, resultl;
> +
> +    rs      = 0x00BBAACC;
> +    rt      = 0x0B1C3D2F;
> +    achi    = 0x00004433;
> +    acli    = 0xFFCC0011;
> +    resulth = 0xFFF81F29;
> +    resultl = 0xB355089D;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "msub $ac1, %4, %5\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +    assert(acho == resulth);
> +    assert(aclo == resultl);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/msubu.c b/tests/tcg/mips/mips32-dsp/msubu.c
> new file mode 100644
> index 0000000..e0f9b5a
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/msubu.c
> @@ -0,0 +1,30 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int achi, acli, rs, rt;
> +    int acho, aclo;
> +    int resulth, resultl;
> +
> +    rs      = 0x00BBAACC;
> +    rt      = 0x0B1C3D2F;
> +    achi    = 0x00004433;
> +    acli    = 0xFFCC0011;
> +    resulth = 0xFFF81F29;
> +    resultl = 0xB355089D;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "msubu $ac1, %4, %5\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +    assert(acho == resulth);
> +    assert(aclo == resultl);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/mthi.c b/tests/tcg/mips/mips32-dsp/mthi.c
> new file mode 100644
> index 0000000..43a8066
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/mthi.c
> @@ -0,0 +1,21 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int achi, acho;
> +    int result;
> +
> +    achi   = 0x004433;
> +    result = 0x004433;
> +
> +    __asm
> +        ("mthi %1, $ac1\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         : "=r"(acho)
> +         : "r"(achi)
> +        );
> +    assert(result == acho);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/mthlip.c b/tests/tcg/mips/mips32-dsp/mthlip.c
> new file mode 100644
> index 0000000..74e83bf
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/mthlip.c
> @@ -0,0 +1,34 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, ach, acl, dsp;
> +    int result, resulth, resultl;
> +
> +    dsp = 0x07;
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    rs  = 0x00FFBBAA;
> +    resulth = 0xB4CB;
> +    resultl = 0x00FFBBAA;
> +    result  = 0x27;
> +
> +    __asm
> +        ("wrdsp %0, 0x01\n\t"
> +         "mthi %1, $ac1\n\t"
> +         "mtlo %2, $ac1\n\t"
> +         "mthlip %3, $ac1\n\t"
> +         "mfhi %1, $ac1\n\t"
> +         "mflo %2, $ac1\n\t"
> +         "rddsp %0\n\t"
> +         : "+r"(dsp), "+r"(ach), "+r"(acl)
> +         : "r"(rs)
> +        );
> +    dsp = dsp & 0x3F;
> +    assert(dsp == result);
> +    assert(ach == resulth);
> +    assert(acl == resultl);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/mtlo.c b/tests/tcg/mips/mips32-dsp/mtlo.c
> new file mode 100644
> index 0000000..caeafdb
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/mtlo.c
> @@ -0,0 +1,21 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int acli, aclo;
> +    int result;
> +
> +    acli   = 0x004433;
> +    result = 0x004433;
> +
> +    __asm
> +        ("mthi %1, $ac1\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         : "=r"(aclo)
> +         : "r"(acli)
> +        );
> +    assert(result == aclo);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/muleq_s_w_phl.c b/tests/tcg/mips/mips32-dsp/muleq_s_w_phl.c
> new file mode 100644
> index 0000000..b3a5370
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/muleq_s_w_phl.c
> @@ -0,0 +1,41 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt, dsp;
> +    int result, resultdsp;
> +
> +    rs = 0x80001234;
> +    rt = 0x80001234;
> +    result = 0x7FFFFFFF;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("muleq_s.w.phl %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 21) & 0x01;
> +    assert(rd  == result);
> +    assert(dsp == resultdsp);
> +
> +    rs = 0x12349988;
> +    rt = 0x43219988;
> +    result = 0x98be968;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("muleq_s.w.phl %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 21) & 0x01;
> +    assert(rd  == result);
> +    assert(dsp == resultdsp);
> +
> +    return 0;
> +}
> +
> diff --git a/tests/tcg/mips/mips32-dsp/muleq_s_w_phr.c b/tests/tcg/mips/mips32-dsp/muleq_s_w_phr.c
> new file mode 100644
> index 0000000..8066d7d
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/muleq_s_w_phr.c
> @@ -0,0 +1,40 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt, dsp;
> +    int result, resultdsp;
> +
> +    rs = 0x8000;
> +    rt = 0x8000;
> +    result = 0x7FFFFFFF;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("muleq_s.w.phr %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 21) & 0x01;
> +    assert(rd  == result);
> +    assert(dsp == resultdsp);
> +
> +    rs = 0x1234;
> +    rt = 0x4321;
> +    result = 0x98be968;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("muleq_s.w.phr %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 21) & 0x01;
> +    assert(rd  == result);
> +    assert(dsp == resultdsp);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/muleu_s_ph_qbl.c b/tests/tcg/mips/mips32-dsp/muleu_s_ph_qbl.c
> new file mode 100644
> index 0000000..66a3828
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/muleu_s_ph_qbl.c
> @@ -0,0 +1,25 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt, dsp;
> +    int result, resultdsp;
> +
> +    rs = 0x80001234;
> +    rt = 0x80004321;
> +    result = 0xFFFF0000;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("muleu_s.ph.qbl %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 21) & 0x01;
> +    assert(rd  == result);
> +    assert(dsp == resultdsp);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/muleu_s_ph_qbr.c b/tests/tcg/mips/mips32-dsp/muleu_s_ph_qbr.c
> new file mode 100644
> index 0000000..4cc6c8f
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/muleu_s_ph_qbr.c
> @@ -0,0 +1,25 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt, dsp;
> +    int result, resultdsp;
> +
> +    rs = 0x8000;
> +    rt = 0x80004321;
> +    result = 0xFFFF0000;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("muleu_s.ph.qbr %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 21) & 0x01;
> +    assert(rd  == result);
> +    assert(dsp == resultdsp);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/mulq_rs_ph.c b/tests/tcg/mips/mips32-dsp/mulq_rs_ph.c
> new file mode 100644
> index 0000000..c720603
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/mulq_rs_ph.c
> @@ -0,0 +1,25 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt, dsp;
> +    int result, resultdsp;
> +
> +    rs = 0x80001234;
> +    rt = 0x80004321;
> +    result = 0x7FFF098C;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("mulq_rs.ph %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 21) & 0x01;
> +    assert(rd  == result);
> +    assert(dsp == resultdsp);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/mult.c b/tests/tcg/mips/mips32-dsp/mult.c
> new file mode 100644
> index 0000000..15e6fde
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/mult.c
> @@ -0,0 +1,24 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, rt, ach, acl;
> +    int result, resulth, resultl;
> +
> +    rs  = 0x00FFBBAA;
> +    rt  = 0x4B231000;
> +    resulth = 0x4b0f01;
> +    resultl = 0x71f8a000;
> +    __asm
> +        ("mult $ac1, %2, %3\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(ach), "=r"(acl)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(ach == resulth);
> +    assert(acl == resultl);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/multu.c b/tests/tcg/mips/mips32-dsp/multu.c
> new file mode 100644
> index 0000000..15e6fde
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/multu.c
> @@ -0,0 +1,24 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, rt, ach, acl;
> +    int result, resulth, resultl;
> +
> +    rs  = 0x00FFBBAA;
> +    rt  = 0x4B231000;
> +    resulth = 0x4b0f01;
> +    resultl = 0x71f8a000;
> +    __asm
> +        ("mult $ac1, %2, %3\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(ach), "=r"(acl)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(ach == resulth);
> +    assert(acl == resultl);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/packrl_ph.c b/tests/tcg/mips/mips32-dsp/packrl_ph.c
> new file mode 100644
> index 0000000..1f8e699
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/packrl_ph.c
> @@ -0,0 +1,21 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result = 0x56788765;
> +
> +    __asm
> +        ("packrl.ph %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(result == rd);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/pick_ph.c b/tests/tcg/mips/mips32-dsp/pick_ph.c
> new file mode 100644
> index 0000000..73342cb
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/pick_ph.c
> @@ -0,0 +1,23 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt, dsp;
> +    int result;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    dsp = 0x0A000000;
> +    result = 0x12344321;
> +
> +    __asm
> +        ("wrdsp %3, 0x10\n\t"
> +         "pick.ph %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt), "r"(dsp)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/pick_qb.c b/tests/tcg/mips/mips32-dsp/pick_qb.c
> new file mode 100644
> index 0000000..052cc58
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/pick_qb.c
> @@ -0,0 +1,23 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt, dsp;
> +    int result;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    dsp = 0x0A000000;
> +    result = 0x12655621;
> +
> +    __asm
> +        ("wrdsp %3, 0x10\n\t"
> +         "pick.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt), "r"(dsp)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/preceq_w_phl.c b/tests/tcg/mips/mips32-dsp/preceq_w_phl.c
> new file mode 100644
> index 0000000..bf70bf7
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/preceq_w_phl.c
> @@ -0,0 +1,20 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rt;
> +    int result;
> +
> +    rt = 0x87654321;
> +    result = 0x87650000;
> +
> +    __asm
> +        ("preceq.w.phl %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    assert(result == rd);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/preceq_w_phr.c b/tests/tcg/mips/mips32-dsp/preceq_w_phr.c
> new file mode 100644
> index 0000000..3f885ef
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/preceq_w_phr.c
> @@ -0,0 +1,20 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rt;
> +    int result;
> +
> +    rt = 0x87654321;
> +    result = 0x43210000;
> +
> +    __asm
> +        ("preceq.w.phr %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    assert(result == rd);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/precequ_ph_qbl.c b/tests/tcg/mips/mips32-dsp/precequ_ph_qbl.c
> new file mode 100644
> index 0000000..63b7a95
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/precequ_ph_qbl.c
> @@ -0,0 +1,20 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rt;
> +    int result;
> +
> +    rt = 0x87654321;
> +    result = 0x43803280;
> +
> +    __asm
> +        ("precequ.ph.qbl %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    assert(result == rd);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/precequ_ph_qbla.c b/tests/tcg/mips/mips32-dsp/precequ_ph_qbla.c
> new file mode 100644
> index 0000000..31627f0
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/precequ_ph_qbla.c
> @@ -0,0 +1,20 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rt;
> +    int result;
> +
> +    rt = 0x87654321;
> +    result = 0x43802180;
> +
> +    __asm
> +        ("precequ.ph.qbla %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    assert(result == rd);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/precequ_ph_qbr.c b/tests/tcg/mips/mips32-dsp/precequ_ph_qbr.c
> new file mode 100644
> index 0000000..b6f72d3
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/precequ_ph_qbr.c
> @@ -0,0 +1,20 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rt;
> +    int result;
> +
> +    rt = 0x87654321;
> +    result = 0x21801080;
> +
> +    __asm
> +        ("precequ.ph.qbr %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    assert(result == rd);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/precequ_ph_qbra.c b/tests/tcg/mips/mips32-dsp/precequ_ph_qbra.c
> new file mode 100644
> index 0000000..4764fd0
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/precequ_ph_qbra.c
> @@ -0,0 +1,20 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rt;
> +    int result;
> +
> +    rt = 0x87654321;
> +    result = 0x32801080;
> +
> +    __asm
> +        ("precequ.ph.qbra %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    assert(result == rd);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/preceu_ph_qbl.c b/tests/tcg/mips/mips32-dsp/preceu_ph_qbl.c
> new file mode 100644
> index 0000000..fa95c26
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/preceu_ph_qbl.c
> @@ -0,0 +1,20 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rt;
> +    int result;
> +
> +    rt = 0x87654321;
> +    result = 0x00870065;
> +
> +    __asm
> +        ("preceu.ph.qbl %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    assert(result == rd);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/preceu_ph_qbla.c b/tests/tcg/mips/mips32-dsp/preceu_ph_qbla.c
> new file mode 100644
> index 0000000..021f21a
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/preceu_ph_qbla.c
> @@ -0,0 +1,20 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rt;
> +    int result;
> +
> +    rt = 0x87654321;
> +    result = 0x00870043;
> +
> +    __asm
> +        ("preceu.ph.qbla %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    assert(result == rd);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/preceu_ph_qbr.c b/tests/tcg/mips/mips32-dsp/preceu_ph_qbr.c
> new file mode 100644
> index 0000000..03df18c
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/preceu_ph_qbr.c
> @@ -0,0 +1,20 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rt;
> +    int result;
> +
> +    rt = 0x87654321;
> +    result = 0x00430021;
> +
> +    __asm
> +        ("preceu.ph.qbr %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    assert(result == rd);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/preceu_ph_qbra.c b/tests/tcg/mips/mips32-dsp/preceu_ph_qbra.c
> new file mode 100644
> index 0000000..6343276
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/preceu_ph_qbra.c
> @@ -0,0 +1,20 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rt;
> +    int result;
> +
> +    rt = 0x87654321;
> +    result = 0x00650021;
> +
> +    __asm
> +        ("preceu.ph.qbra %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    assert(result == rd);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/precrq_ph_w.c b/tests/tcg/mips/mips32-dsp/precrq_ph_w.c
> new file mode 100644
> index 0000000..25d45f1
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/precrq_ph_w.c
> @@ -0,0 +1,21 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result = 0x12348765;
> +
> +    __asm
> +        ("precrq.ph.w %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(result == rd);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/precrq_qb_ph.c b/tests/tcg/mips/mips32-dsp/precrq_qb_ph.c
> new file mode 100644
> index 0000000..fe23acc
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/precrq_qb_ph.c
> @@ -0,0 +1,21 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result = 0x12568743;
> +
> +    __asm
> +        ("precrq.qb.ph %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(result == rd);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/precrq_rs_ph_w.c b/tests/tcg/mips/mips32-dsp/precrq_rs_ph_w.c
> new file mode 100644
> index 0000000..87214b8
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/precrq_rs_ph_w.c
> @@ -0,0 +1,21 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result = 0x12348765;
> +
> +    __asm
> +        ("precrq_rs.ph.w %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(result == rd);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/precrqu_s_qb_ph.c b/tests/tcg/mips/mips32-dsp/precrqu_s_qb_ph.c
> new file mode 100644
> index 0000000..9a459cc
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/precrqu_s_qb_ph.c
> @@ -0,0 +1,21 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result = 0x24AC0086;
> +
> +    __asm
> +        ("precrqu_s.qb.ph %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(result == rd);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/raddu_w_qb.c b/tests/tcg/mips/mips32-dsp/raddu_w_qb.c
> new file mode 100644
> index 0000000..77a983c
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/raddu_w_qb.c
> @@ -0,0 +1,20 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs;
> +    int result;
> +
> +    rs = 0x12345678;
> +    result = 0x114;
> +
> +    __asm
> +        ("raddu.w.qb %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rs)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/rddsp.c b/tests/tcg/mips/mips32-dsp/rddsp.c
> new file mode 100644
> index 0000000..e8948ec
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/rddsp.c
> @@ -0,0 +1,54 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int dsp_i, dsp_o;
> +    int ccond_i, outflag_i, efi_i, c_i, scount_i, pos_i;
> +    int ccond_o, outflag_o, efi_o, c_o, scount_o, pos_o;
> +    int ccond_r, outflag_r, efi_r, c_r, scount_r, pos_r;
> +
> +    ccond_i   = 0x000000BC;/* 4 */
> +    outflag_i = 0x0000001B;/* 3 */
> +    efi_i     = 0x00000001;/* 5 */
> +    c_i       = 0x00000001;/* 2 */
> +    scount_i  = 0x0000000F;/* 1 */
> +    pos_i     = 0x0000000C;/* 0 */
> +
> +    dsp_i = (ccond_i   << 24) | \
> +            (outflag_i << 16) | \
> +            (efi_i     << 14) | \
> +            (c_i       << 13) | \
> +            (scount_i  <<  7) | \
> +            pos_i;
> +
> +    ccond_r   = ccond_i;
> +    outflag_r = outflag_i;
> +    efi_r     = efi_i;
> +    c_r       = c_i;
> +    scount_r  = scount_i;
> +    pos_r     = pos_i;
> +
> +    __asm
> +        ("wrdsp %1, 0x3F\n\t"
> +         "rddsp %0, 0x3F\n\t"
> +         : "=r"(dsp_o)
> +         : "r"(dsp_i)
> +        );
> +
> +    ccond_o   = (dsp_o >> 24) & 0xFF;
> +    outflag_o = (dsp_o >> 16) & 0xFF;
> +    efi_o     = (dsp_o >> 14) & 0x01;
> +    c_o       = (dsp_o >> 14) & 0x01;
> +    scount_o  = (dsp_o >>  7) & 0x3F;
> +    pos_o     =  dsp_o & 0x1F;
> +
> +    assert(ccond_o   == ccond_r);
> +    assert(outflag_o == outflag_r);
> +    assert(efi_o     == efi_r);
> +    assert(c_o       == c_r);
> +    assert(scount_o  == scount_r);
> +    assert(pos_o     == pos_r);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/repl_ph.c b/tests/tcg/mips/mips32-dsp/repl_ph.c
> new file mode 100644
> index 0000000..2107495
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/repl_ph.c
> @@ -0,0 +1,23 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, result;
> +
> +    result = 0x01BF01BF;
> +    __asm
> +        ("repl.ph %0, 0x1BF\n\t"
> +         : "=r"(rd)
> +        );
> +    assert(rd == result);
> +
> +    result = 0x01FF01FF;
> +    __asm
> +        ("repl.ph %0, 0x01FF\n\t"
> +         : "=r"(rd)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/repl_qb.c b/tests/tcg/mips/mips32-dsp/repl_qb.c
> new file mode 100644
> index 0000000..6631393
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/repl_qb.c
> @@ -0,0 +1,16 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, result;
> +
> +    result = 0xBFBFBFBF;
> +    __asm
> +        ("repl.qb %0, 0xBF\n\t"
> +         : "=r"(rd)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/replv_ph.c b/tests/tcg/mips/mips32-dsp/replv_ph.c
> new file mode 100644
> index 0000000..07fb15f
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/replv_ph.c
> @@ -0,0 +1,19 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rt;
> +    int result;
> +
> +    rt = 0x12345678;
> +    result = 0x56785678;
> +    __asm
> +        ("replv.ph %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/replv_qb.c b/tests/tcg/mips/mips32-dsp/replv_qb.c
> new file mode 100644
> index 0000000..dd1271f
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/replv_qb.c
> @@ -0,0 +1,19 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rt;
> +    int result;
> +
> +    rt     = 0x12345678;
> +    result = 0x78787878;
> +    __asm
> +        ("replv.qb %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/shilo.c b/tests/tcg/mips/mips32-dsp/shilo.c
> new file mode 100644
> index 0000000..b686616
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/shilo.c
> @@ -0,0 +1,27 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int ach, acl;
> +    int resulth, resultl;
> +
> +    ach = 0xBBAACCFF;
> +    acl = 0x1C3B001D;
> +
> +    resulth = 0x17755;
> +    resultl = 0x99fe3876;
> +
> +    __asm
> +        ("mthi %0, $ac1\n\t"
> +         "mtlo %1, $ac1\n\t"
> +         "shilo $ac1, 0x0F\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "+r"(ach), "+r"(acl)
> +        );
> +    assert(ach == resulth);
> +    assert(acl == resultl);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/shilov.c b/tests/tcg/mips/mips32-dsp/shilov.c
> new file mode 100644
> index 0000000..f186032
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/shilov.c
> @@ -0,0 +1,29 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, ach, acl;
> +    int resulth, resultl;
> +
> +    rs  = 0x0F;
> +    ach = 0xBBAACCFF;
> +    acl = 0x1C3B001D;
> +
> +    resulth = 0x17755;
> +    resultl = 0x99fe3876;
> +
> +    __asm
> +        ("mthi %0, $ac1\n\t"
> +         "mtlo %1, $ac1\n\t"
> +         "shilov $ac1, %2\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "+r"(ach), "+r"(acl)
> +         : "r"(rs)
> +        );
> +    assert(ach == resulth);
> +    assert(acl == resultl);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/shll_ph.c b/tests/tcg/mips/mips32-dsp/shll_ph.c
> new file mode 100644
> index 0000000..b8f1ff5
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/shll_ph.c
> @@ -0,0 +1,24 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rt, dsp;
> +    int result, resultdsp;
> +
> +    rt        = 0x12345678;
> +    result    = 0xA000C000;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("shll.ph %0, %2, 0x0B\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rt)
> +        );
> +    dsp = (dsp >> 22) & 0x01;
> +    assert(dsp == resultdsp);
> +    assert(rd  == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/shll_qb.c b/tests/tcg/mips/mips32-dsp/shll_qb.c
> new file mode 100644
> index 0000000..d79814c
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/shll_qb.c
> @@ -0,0 +1,23 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rt, dsp;
> +    int result, resultdsp;
> +
> +    rt     = 0x87654321;
> +    result = 0x38281808;
> +    resultdsp = 0x01;
> +
> +    __asm
> +        ("shll.qb %0, %2, 0x03\n\t"
> +         "rddsp   %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rt)
> +        );
> +    dsp = (dsp >> 22) & 0x01;
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/shll_s_ph.c b/tests/tcg/mips/mips32-dsp/shll_s_ph.c
> new file mode 100644
> index 0000000..910fea3
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/shll_s_ph.c
> @@ -0,0 +1,24 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rt, dsp;
> +    int result, resultdsp;
> +
> +    rt        = 0x12345678;
> +    result    = 0x7FFF7FFF;
> +    resultdsp = 0x01;
> +
> +    __asm
> +        ("shll_s.ph %0, %2, 0x0B\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rt)
> +        );
> +    dsp = (dsp >> 22) & 0x01;
> +    assert(dsp == resultdsp);
> +    assert(rd  == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/shll_s_w.c b/tests/tcg/mips/mips32-dsp/shll_s_w.c
> new file mode 100644
> index 0000000..c42c168
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/shll_s_w.c
> @@ -0,0 +1,24 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rt, dsp;
> +    int result, resultdsp;
> +
> +    rt        = 0x12345678;
> +    result    = 0x7FFFFFFF;
> +    resultdsp = 0x01;
> +
> +    __asm
> +        ("shll_s.w %0, %2, 0x0B\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rt)
> +        );
> +    dsp = (dsp >> 22) & 0x01;
> +    assert(dsp == resultdsp);
> +    assert(rd  == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/shllv_ph.c b/tests/tcg/mips/mips32-dsp/shllv_ph.c
> new file mode 100644
> index 0000000..b0fcae8
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/shllv_ph.c
> @@ -0,0 +1,25 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt, dsp;
> +    int result, resultdsp;
> +
> +    rs        = 0x0B;
> +    rt        = 0x12345678;
> +    result    = 0xA000C000;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("shllv.ph %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rt), "r"(rs)
> +        );
> +    dsp = (dsp >> 22) & 0x01;
> +    assert(dsp == resultdsp);
> +    assert(rd  == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/shllv_qb.c b/tests/tcg/mips/mips32-dsp/shllv_qb.c
> new file mode 100644
> index 0000000..0bcc24c
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/shllv_qb.c
> @@ -0,0 +1,24 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt, dsp;
> +    int result, resultdsp;
> +
> +    rs     = 0x03;
> +    rt     = 0x87654321;
> +    result = 0x38281808;
> +    resultdsp = 0x01;
> +
> +    __asm
> +        ("shllv.qb %0, %2, %3\n\t"
> +         "rddsp   %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rt), "r"(rs)
> +        );
> +    dsp = (dsp >> 22) & 0x01;
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/shllv_s_ph.c b/tests/tcg/mips/mips32-dsp/shllv_s_ph.c
> new file mode 100644
> index 0000000..a6d61b1
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/shllv_s_ph.c
> @@ -0,0 +1,25 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt, dsp;
> +    int result, resultdsp;
> +
> +    rs        = 0x0B;
> +    rt        = 0x12345678;
> +    result    = 0x7FFF7FFF;
> +    resultdsp = 0x01;
> +
> +    __asm
> +        ("shllv_s.ph %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rt), "r"(rs)
> +        );
> +    dsp = (dsp >> 22) & 0x01;
> +    assert(dsp == resultdsp);
> +    assert(rd  == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/shllv_s_w.c b/tests/tcg/mips/mips32-dsp/shllv_s_w.c
> new file mode 100644
> index 0000000..69c896d
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/shllv_s_w.c
> @@ -0,0 +1,25 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt, dsp;
> +    int result, resultdsp;
> +
> +    rs        = 0x0B;
> +    rt        = 0x12345678;
> +    result    = 0x7FFFFFFF;
> +    resultdsp = 0x01;
> +
> +    __asm
> +        ("shllv_s.w %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rt), "r"(rs)
> +        );
> +    dsp = (dsp >> 22) & 0x01;
> +    assert(dsp == resultdsp);
> +    assert(rd  == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/shra_ph.c b/tests/tcg/mips/mips32-dsp/shra_ph.c
> new file mode 100644
> index 0000000..be7711a
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/shra_ph.c
> @@ -0,0 +1,20 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rt;
> +    int result;
> +
> +    rt     = 0x87654321;
> +    result = 0xF0EC0864;
> +
> +    __asm
> +        ("shra.ph %0, %1, 0x03\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/shra_r_ph.c b/tests/tcg/mips/mips32-dsp/shra_r_ph.c
> new file mode 100644
> index 0000000..bb64683
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/shra_r_ph.c
> @@ -0,0 +1,20 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rt;
> +    int result;
> +
> +    rt     = 0x87654321;
> +    result = 0xF0ED0864;
> +
> +    __asm
> +        ("shra_r.ph %0, %1, 0x03\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/shra_r_w.c b/tests/tcg/mips/mips32-dsp/shra_r_w.c
> new file mode 100644
> index 0000000..b94748c
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/shra_r_w.c
> @@ -0,0 +1,20 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rt;
> +    int result;
> +
> +    rt     = 0x87654321;
> +    result = 0xF0ECA864;
> +
> +    __asm
> +        ("shra_r.w %0, %1, 0x03\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/shrav_ph.c b/tests/tcg/mips/mips32-dsp/shrav_ph.c
> new file mode 100644
> index 0000000..a4db736
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/shrav_ph.c
> @@ -0,0 +1,21 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs     = 0x03;
> +    rt     = 0x87654321;
> +    result = 0xF0EC0864;
> +
> +    __asm
> +        ("shrav.ph %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rt), "r"(rs)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/shrav_r_ph.c b/tests/tcg/mips/mips32-dsp/shrav_r_ph.c
> new file mode 100644
> index 0000000..f6d3c70
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/shrav_r_ph.c
> @@ -0,0 +1,21 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs     = 0x03;
> +    rt     = 0x87654321;
> +    result = 0xF0ED0864;
> +
> +    __asm
> +        ("shrav_r.ph %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rt), "r"(rs)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/shrav_r_w.c b/tests/tcg/mips/mips32-dsp/shrav_r_w.c
> new file mode 100644
> index 0000000..1841381
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/shrav_r_w.c
> @@ -0,0 +1,21 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs     = 0x03;
> +    rt     = 0x87654321;
> +    result = 0xF0ECA864;
> +
> +    __asm
> +        ("shrav_r.w %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rt), "r"(rs)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/shrl_qb.c b/tests/tcg/mips/mips32-dsp/shrl_qb.c
> new file mode 100644
> index 0000000..ccc991f
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/shrl_qb.c
> @@ -0,0 +1,20 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rt;
> +    int result;
> +
> +    rt     = 0x12345678;
> +    result = 0x00010203;
> +
> +    __asm
> +        ("shrl.qb %0, %1, 0x05\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/shrlv_qb.c b/tests/tcg/mips/mips32-dsp/shrlv_qb.c
> new file mode 100644
> index 0000000..4b0a826
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/shrlv_qb.c
> @@ -0,0 +1,21 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs     = 0x05;
> +    rt     = 0x12345678;
> +    result = 0x00010203;
> +
> +    __asm
> +        ("shrlv.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rt), "r"(rs)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/subq_ph.c b/tests/tcg/mips/mips32-dsp/subq_ph.c
> new file mode 100644
> index 0000000..e9d349a
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/subq_ph.c
> @@ -0,0 +1,25 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt, dsp;
> +    int result, resultdsp;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result    = 0x8ACF1357;
> +    resultdsp = 0x01;
> +
> +    __asm
> +        ("subq.ph %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 20) & 0x01;
> +    assert(dsp == resultdsp);
> +    assert(rd  == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/subq_s_ph.c b/tests/tcg/mips/mips32-dsp/subq_s_ph.c
> new file mode 100644
> index 0000000..56fed9b
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/subq_s_ph.c
> @@ -0,0 +1,25 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt, dsp;
> +    int result, resultdsp;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result    = 0x7FFF1357;
> +    resultdsp = 0x01;
> +
> +    __asm
> +        ("subq_s.ph %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 20) & 0x01;
> +    assert(dsp == resultdsp);
> +    assert(rd  == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/subq_s_w.c b/tests/tcg/mips/mips32-dsp/subq_s_w.c
> new file mode 100644
> index 0000000..f44f36e
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/subq_s_w.c
> @@ -0,0 +1,25 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt, dsp;
> +    int result, resultdsp;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result    = 0x7FFFFFFF;
> +    resultdsp = 0x01;
> +
> +    __asm
> +        ("subq_s.w %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 20) & 0x01;
> +    assert(dsp == resultdsp);
> +    assert(rd  == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/subu_qb.c b/tests/tcg/mips/mips32-dsp/subu_qb.c
> new file mode 100644
> index 0000000..4209096
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/subu_qb.c
> @@ -0,0 +1,25 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt, dsp;
> +    int result, resultdsp;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result    = 0x8BCF1357;
> +    resultdsp = 0x01;
> +
> +    __asm
> +        ("subu.qb %0, %2, %3\n\t"
> +         "rddsp   %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 20) & 0x01;
> +    assert(dsp == resultdsp);
> +    assert(rd  == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/subu_s_qb.c b/tests/tcg/mips/mips32-dsp/subu_s_qb.c
> new file mode 100644
> index 0000000..3d65053
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/subu_s_qb.c
> @@ -0,0 +1,25 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt, dsp;
> +    int result, resultdsp;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result    = 0x00001357;
> +    resultdsp = 0x01;
> +
> +    __asm
> +        ("subu_s.qb %0, %2, %3\n\t"
> +         "rddsp   %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 20) & 0x01;
> +    assert(dsp == resultdsp);
> +    assert(rd  == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dsp/wrdsp.c b/tests/tcg/mips/mips32-dsp/wrdsp.c
> new file mode 100644
> index 0000000..e8948ec
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dsp/wrdsp.c
> @@ -0,0 +1,54 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int dsp_i, dsp_o;
> +    int ccond_i, outflag_i, efi_i, c_i, scount_i, pos_i;
> +    int ccond_o, outflag_o, efi_o, c_o, scount_o, pos_o;
> +    int ccond_r, outflag_r, efi_r, c_r, scount_r, pos_r;
> +
> +    ccond_i   = 0x000000BC;/* 4 */
> +    outflag_i = 0x0000001B;/* 3 */
> +    efi_i     = 0x00000001;/* 5 */
> +    c_i       = 0x00000001;/* 2 */
> +    scount_i  = 0x0000000F;/* 1 */
> +    pos_i     = 0x0000000C;/* 0 */
> +
> +    dsp_i = (ccond_i   << 24) | \
> +            (outflag_i << 16) | \
> +            (efi_i     << 14) | \
> +            (c_i       << 13) | \
> +            (scount_i  <<  7) | \
> +            pos_i;
> +
> +    ccond_r   = ccond_i;
> +    outflag_r = outflag_i;
> +    efi_r     = efi_i;
> +    c_r       = c_i;
> +    scount_r  = scount_i;
> +    pos_r     = pos_i;
> +
> +    __asm
> +        ("wrdsp %1, 0x3F\n\t"
> +         "rddsp %0, 0x3F\n\t"
> +         : "=r"(dsp_o)
> +         : "r"(dsp_i)
> +        );
> +
> +    ccond_o   = (dsp_o >> 24) & 0xFF;
> +    outflag_o = (dsp_o >> 16) & 0xFF;
> +    efi_o     = (dsp_o >> 14) & 0x01;
> +    c_o       = (dsp_o >> 14) & 0x01;
> +    scount_o  = (dsp_o >>  7) & 0x3F;
> +    pos_o     =  dsp_o & 0x1F;
> +
> +    assert(ccond_o   == ccond_r);
> +    assert(outflag_o == outflag_r);
> +    assert(efi_o     == efi_r);
> +    assert(c_o       == c_r);
> +    assert(scount_o  == scount_r);
> +    assert(pos_o     == pos_r);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/Makefile b/tests/tcg/mips/mips32-dspr2/Makefile
> new file mode 100644
> index 0000000..5a07a72
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/Makefile
> @@ -0,0 +1,72 @@
> +-include ../../config-host.mak
> +
> +CROSS=mips64el-unknown-linux-gnu-
> +
> +SIM=qemu-mipsel
> +SIM_FLAGS=-cpu 74Kf
> +
> +CC      = $(CROSS)gcc
> +CFLAGS  = -mabi=32 -march=mips32r2 -mgp32 -mdspr2 -static
> +
> +TESTCASES = absq_s_qb.tst
> +TESTCASES += addqh_ph.tst
> +TESTCASES += addqh_r_ph.tst
> +TESTCASES += addqh_r_w.tst
> +TESTCASES += addqh_w.tst
> +TESTCASES += adduh_qb.tst
> +TESTCASES += adduh_r_qb.tst
> +TESTCASES += addu_ph.tst
> +TESTCASES += addu_s_ph.tst
> +TESTCASES += append.tst
> +TESTCASES += balign.tst
> +TESTCASES += cmpgdu_eq_qb.tst
> +TESTCASES += cmpgdu_le_qb.tst
> +TESTCASES += cmpgdu_lt_qb.tst
> +TESTCASES += dpaqx_sa_w_ph.tst
> +TESTCASES += dpa_w_ph.tst
> +TESTCASES += dpax_w_ph.tst
> +TESTCASES += dpaqx_s_w_ph.tst
> +TESTCASES += dpsqx_sa_w_ph.tst
> +TESTCASES += dpsqx_s_w_ph.tst
> +TESTCASES += dps_w_ph.tst
> +TESTCASES += dpsx_w_ph.tst
> +TESTCASES += muleq_s_w_phl.tst
> +TESTCASES += mul_ph.tst
> +TESTCASES += mulq_rs_w.tst
> +TESTCASES += mulq_s_ph.tst
> +TESTCASES += mulq_s_w.tst
> +TESTCASES += mulsaq_s_w_ph.tst
> +TESTCASES += mulsa_w_ph.tst
> +TESTCASES += mul_s_ph.tst
> +TESTCASES += precr_qb_ph.tst
> +TESTCASES += precr_sra_ph_w.tst
> +TESTCASES += precr_sra_r_ph_w.tst
> +TESTCASES += prepend.tst
> +TESTCASES += shra_qb.tst
> +TESTCASES += shra_r_qb.tst
> +TESTCASES += shrav_qb.tst
> +TESTCASES += shrav_r_qb.tst
> +TESTCASES += shrl_ph.tst
> +TESTCASES += shrlv_ph.tst
> +TESTCASES += subqh_ph.tst
> +TESTCASES += subqh_r_ph.tst
> +TESTCASES += subqh_r_w.tst
> +TESTCASES += subqh_w.tst
> +TESTCASES += subuh_qb.tst
> +TESTCASES += subuh_r_qb.tst
> +TESTCASES += subu_ph.tst
> +TESTCASES += subu_s_ph.tst
> +
> +all: $(TESTCASES)
> +
> +%.tst: %.c
> +	$(CC) $(CFLAGS) $< -o $@
> +
> +check: $(TESTCASES)
> +	@for case in $(TESTCASES); do \
> +        echo $(SIM) $(SIM_FLAGS) ./$$case;\
> +		$(SIM) $(SIM_FLAGS) ./$$case; \
> +	done
> +
> +clean:
> +	$(RM) -rf $(TESTCASES)
> diff --git a/tests/tcg/mips/mips32-dspr2/absq_s_qb.c b/tests/tcg/mips/mips32-dspr2/absq_s_qb.c
> new file mode 100644
> index 0000000..af4683f
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/absq_s_qb.c
> @@ -0,0 +1,35 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int input, result, dsp;
> +    int hope;
> +
> +    input = 0x701BA35E;
> +    hope  = 0x701B5D5E;
> +
> +    __asm
> +        ("absq_s.qb %0, %1\n\t"
> +         : "=r"(result)
> +         : "r"(input)
> +        );
> +    assert(result == hope);
> +
> +
> +    input = 0x801BA35E;
> +    hope  = 0x7F1B5D5E;
> +
> +    __asm
> +        ("absq_s.qb %0, %2\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(result), "=r"(dsp)
> +         : "r"(input)
> +        );
> +    dsp = dsp >> 20;
> +    dsp &= 0x01;
> +    assert(dsp == 1);
> +    assert(result == hope);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/addqh_ph.c b/tests/tcg/mips/mips32-dspr2/addqh_ph.c
> new file mode 100644
> index 0000000..11f8597
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/addqh_ph.c
> @@ -0,0 +1,30 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs     = 0x706A13FE;
> +    rt     = 0x13065174;
> +    result = 0x41B832B9;
> +    __asm
> +        ("addqh.ph %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    rs     = 0x01000100;
> +    rt     = 0x02000100;
> +    result = 0x01800100;
> +    __asm
> +        ("addqh.ph %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/addqh_r_ph.c b/tests/tcg/mips/mips32-dspr2/addqh_r_ph.c
> new file mode 100644
> index 0000000..ab91c0f
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/addqh_r_ph.c
> @@ -0,0 +1,30 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs     = 0x706A13FE;
> +    rt     = 0x13065174;
> +    result = 0x41B832B9;
> +    __asm
> +        ("addqh_r.ph %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    rs     = 0x01000100;
> +    rt     = 0x02000100;
> +    result = 0x01800100;
> +    __asm
> +        ("addqh_r.ph %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/addqh_r_w.c b/tests/tcg/mips/mips32-dspr2/addqh_r_w.c
> new file mode 100644
> index 0000000..75a75c5
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/addqh_r_w.c
> @@ -0,0 +1,34 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs     = 0x00000010;
> +    rt     = 0x00000001;
> +    result = 0x00000009;
> +
> +    __asm
> +        ("addqh_r.w  %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    assert(rd == result);
> +
> +    rs     = 0xFFFFFFFE;
> +    rt     = 0x00000001;
> +    result = 0x00000000;
> +
> +    __asm
> +        ("addqh_r.w  %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/addqh_w.c b/tests/tcg/mips/mips32-dspr2/addqh_w.c
> new file mode 100644
> index 0000000..de6926e
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/addqh_w.c
> @@ -0,0 +1,34 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs     = 0x00000010;
> +    rt     = 0x00000001;
> +    result = 0x00000008;
> +
> +    __asm
> +        ("addqh.w  %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    assert(rd == result);
> +
> +    rs     = 0xFFFFFFFE;
> +    rt     = 0x00000001;
> +    result = 0xFFFFFFFF;
> +
> +    __asm
> +        ("addqh.w  %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/addu_ph.c b/tests/tcg/mips/mips32-dspr2/addu_ph.c
> new file mode 100644
> index 0000000..01efb3d
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/addu_ph.c
> @@ -0,0 +1,30 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs     = 0x00FF00FF;
> +    rt     = 0x00010001;
> +    result = 0x01000100;
> +    __asm
> +        ("addu.ph %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    rs     = 0xFFFF1111;
> +    rt     = 0x00020001;
> +    result = 0x00011112;
> +    __asm
> +        ("addu.ph %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/addu_s_ph.c b/tests/tcg/mips/mips32-dspr2/addu_s_ph.c
> new file mode 100644
> index 0000000..51cc2ac
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/addu_s_ph.c
> @@ -0,0 +1,30 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs     = 0x00FE00FE;
> +    rt     = 0x00020001;
> +    result = 0x010000FF;
> +    __asm
> +        ("addu_s.ph %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    rs     = 0xFFFF1111;
> +    rt     = 0x00020001;
> +    result = 0xFFFF1112;
> +    __asm
> +        ("addu_s.ph %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/adduh_qb.c b/tests/tcg/mips/mips32-dspr2/adduh_qb.c
> new file mode 100644
> index 0000000..a1f5d63
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/adduh_qb.c
> @@ -0,0 +1,30 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs     = 0xFF0055AA;
> +    rt     = 0x0113421B;
> +    result = 0x80094B62;
> +    __asm
> +        ("adduh.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    rs     = 0xFFFF0FFF;
> +    rt     = 0x00010111;
> +    result = 0x7F800888;
> +    __asm
> +        ("adduh.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/adduh_r_qb.c b/tests/tcg/mips/mips32-dspr2/adduh_r_qb.c
> new file mode 100644
> index 0000000..81e98c1
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/adduh_r_qb.c
> @@ -0,0 +1,30 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs     = 0xFF0055AA;
> +    rt     = 0x01112211;
> +    result = 0x80093C5E;
> +    __asm
> +        ("adduh_r.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    rs     = 0xFFFF0FFF;
> +    rt     = 0x00010111;
> +    result = 0x80800888;
> +    __asm
> +        ("adduh_r.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/append.c b/tests/tcg/mips/mips32-dspr2/append.c
> new file mode 100644
> index 0000000..9a91e16
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/append.c
> @@ -0,0 +1,30 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, rt;
> +    int result;
> +
> +    rs     = 0xFF0055AA;
> +    rt     = 0x0113421B;
> +    result = 0x02268436;
> +    __asm
> +        ("append %0, %1, 0x01\n\t"
> +         : "+r"(rt)
> +         : "r"(rs)
> +        );
> +    assert(rt == result);
> +
> +    rs     = 0xFFFF0FFF;
> +    rt     = 0x00010111;
> +    result = 0x0010111F;
> +    __asm
> +        ("append %0, %1, 0x04\n\t"
> +         : "+r"(rt)
> +         : "r"(rs)
> +        );
> +    assert(rt == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/balign.c b/tests/tcg/mips/mips32-dspr2/balign.c
> new file mode 100644
> index 0000000..537cf04
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/balign.c
> @@ -0,0 +1,30 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, rt;
> +    int result;
> +
> +    rs     = 0xFF0055AA;
> +    rt     = 0x0113421B;
> +    result = 0x13421BFF;
> +    __asm
> +        ("balign %0, %1, 0x01\n\t"
> +         : "+r"(rt)
> +         : "r"(rs)
> +        );
> +    assert(rt == result);
> +
> +    rs     = 0xFFFF0FFF;
> +    rt     = 0x00010111;
> +    result = 0x11FFFF0F;
> +    __asm
> +        ("balign %0, %1, 0x03\n\t"
> +         : "+r"(rt)
> +         : "r"(rs)
> +        );
> +    assert(rt == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/cmpgdu_eq_qb.c b/tests/tcg/mips/mips32-dspr2/cmpgdu_eq_qb.c
> new file mode 100644
> index 0000000..fccd975
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/cmpgdu_eq_qb.c
> @@ -0,0 +1,37 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int dsp;
> +    int result;
> +
> +    rs         = 0x11777066;
> +    rt         = 0x55AA70FF;
> +    result     = 0x02;
> +    __asm
> +        ("cmpgdu.eq.qb %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 24) & 0x0F;
> +    assert(rd  == result);
> +    assert(dsp == result);
> +
> +    rs     = 0x11777066;
> +    rt     = 0x11777066;
> +    result = 0x0F;
> +    __asm
> +        ("cmpgdu.eq.qb %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 24) & 0x0F;
> +    assert(rd  == result);
> +    assert(dsp == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/cmpgdu_le_qb.c b/tests/tcg/mips/mips32-dspr2/cmpgdu_le_qb.c
> new file mode 100644
> index 0000000..a0ecdca
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/cmpgdu_le_qb.c
> @@ -0,0 +1,37 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int dsp;
> +    int result;
> +
> +    rs         = 0x11777066;
> +    rt         = 0x55AA70FF;
> +    result     = 0x0F;
> +    __asm
> +        ("cmpgdu.le.qb %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 24) & 0x0F;
> +    assert(rd  == result);
> +    assert(dsp == result);
> +
> +    rs     = 0x11777066;
> +    rt     = 0x11707066;
> +    result = 0x0B;
> +    __asm
> +        ("cmpgdu.le.qb %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 24) & 0x0F;
> +    assert(rd  == result);
> +    assert(dsp == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/cmpgdu_lt_qb.c b/tests/tcg/mips/mips32-dspr2/cmpgdu_lt_qb.c
> new file mode 100644
> index 0000000..dba99e3
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/cmpgdu_lt_qb.c
> @@ -0,0 +1,37 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int dsp;
> +    int result;
> +
> +    rs         = 0x11777066;
> +    rt         = 0x55AA70FF;
> +    result     = 0x0D;
> +    __asm
> +        ("cmpgdu.lt.qb %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 24) & 0x0F;
> +    assert(rd  == result);
> +    assert(dsp == result);
> +
> +    rs     = 0x11777066;
> +    rt     = 0x11777066;
> +    result = 0x00;
> +    __asm
> +        ("cmpgdu.lt.qb %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 24) & 0x0F;
> +    assert(rd  == result);
> +    assert(dsp == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/dpa_w_ph.c b/tests/tcg/mips/mips32-dspr2/dpa_w_ph.c
> new file mode 100644
> index 0000000..d2bf3be
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/dpa_w_ph.c
> @@ -0,0 +1,27 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, rt;
> +    int ach = 5, acl = 5;
> +    int resulth, resultl;
> +
> +    rs     = 0x00FF00FF;
> +    rt     = 0x00010002;
> +    resulth = 0x05;
> +    resultl = 0x0302;
> +    __asm
> +        ("mthi  %0, $ac1\n\t"
> +         "mtlo  %1, $ac1\n\t"
> +         "dpa.w.ph $ac1, %2, %3\n\t"
> +         "mfhi  %0, $ac1\n\t"
> +         "mflo  %1, $ac1\n\t"
> +         : "+r"(ach), "+r"(acl)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(ach == resulth);
> +    assert(acl == resultl);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/dpaqx_s_w_ph.c b/tests/tcg/mips/mips32-dspr2/dpaqx_s_w_ph.c
> new file mode 100644
> index 0000000..841808d
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/dpaqx_s_w_ph.c
> @@ -0,0 +1,57 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, rt, dsp;
> +    int ach = 5, acl = 5;
> +    int resulth, resultl, resultdsp;
> +
> +    rs     = 0x800000FF;
> +    rt     = 0x00018000;
> +    resulth = 0x05;
> +    resultl = 0x80000202;
> +    resultdsp = 0x01;
> +    __asm
> +        ("mthi  %0, $ac1\n\t"
> +         "mtlo  %1, $ac1\n\t"
> +         "dpaqx_s.w.ph $ac1, %3, %4\n\t"
> +         "mfhi  %0, $ac1\n\t"
> +         "mflo  %1, $ac1\n\t"
> +         "rddsp %2\n\t"
> +         : "+r"(ach), "+r"(acl), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 17) & 0x01;
> +    assert(dsp == resultdsp);
> +    assert(ach == resulth);
> +    assert(acl == resultl);
> +
> +    ach    = 5;
> +    acl    = 5;
> +    rs     = 0x00FF00FF;
> +    rt     = 0x00010002;
> +    resulth = 0x05;
> +    resultl = 0x05FF;
> +    /***********************************************************
> +     * Because of we set outflag at last time, although this
> +     * time we set nothing, but it is stay the last time value.
> +     **********************************************************/
> +    resultdsp = 0x01;
> +    __asm
> +        ("mthi  %0, $ac1\n\t"
> +         "mtlo  %1, $ac1\n\t"
> +         "dpaqx_s.w.ph $ac1, %3, %4\n\t"
> +         "mfhi  %0, $ac1\n\t"
> +         "mflo  %1, $ac1\n\t"
> +         "rddsp %2\n\t"
> +         : "+r"(ach), "+r"(acl), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 17) & 0x01;
> +    assert(dsp == resultdsp);
> +    assert(ach == resulth);
> +    assert(acl == resultl);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/dpaqx_sa_w_ph.c b/tests/tcg/mips/mips32-dspr2/dpaqx_sa_w_ph.c
> new file mode 100644
> index 0000000..65d3993
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/dpaqx_sa_w_ph.c
> @@ -0,0 +1,31 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, rt, dsp;
> +    int ach = 5, acl = 5;
> +    int resulth, resultl, resultdsp;
> +
> +    rs     = 0x00FF00FF;
> +    rt     = 0x00010002;
> +    resulth = 0x00;
> +    resultl = 0x7FFFFFFF;
> +    resultdsp = 0x01;
> +    __asm
> +        ("wrdsp %2\n\t"
> +         "mthi  %0, $ac1\n\t"
> +         "mtlo  %1, $ac1\n\t"
> +         "dpaqx_sa.w.ph $ac1, %3, %4\n\t"
> +         "mfhi  %0, $ac1\n\t"
> +         "mflo  %1, $ac1\n\t"
> +         "rddsp %2\n\t"
> +         : "+r"(ach), "+r"(acl), "+r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(dsp >> (16 + 1) == resultdsp);
> +    assert(ach == resulth);
> +    assert(acl == resultl);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/dpax_w_ph.c b/tests/tcg/mips/mips32-dspr2/dpax_w_ph.c
> new file mode 100644
> index 0000000..f756997
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/dpax_w_ph.c
> @@ -0,0 +1,27 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, rt;
> +    int ach = 5, acl = 5;
> +    int resulth, resultl;
> +
> +    rs     = 0x00FF00FF;
> +    rt     = 0x00010002;
> +    resulth = 0x05;
> +    resultl = 0x0302;
> +    __asm
> +        ("mthi  %0, $ac1\n\t"
> +         "mtlo  %1, $ac1\n\t"
> +         "dpax.w.ph $ac1, %2, %3\n\t"
> +         "mfhi  %0, $ac1\n\t"
> +         "mflo  %1, $ac1\n\t"
> +         : "+r"(ach), "+r"(acl)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(ach == resulth);
> +    assert(acl == resultl);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/dps_w_ph.c b/tests/tcg/mips/mips32-dspr2/dps_w_ph.c
> new file mode 100644
> index 0000000..8303643
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/dps_w_ph.c
> @@ -0,0 +1,27 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, rt;
> +    int ach = 5, acl = 5;
> +    int resulth, resultl;
> +
> +    rs     = 0x00FF00FF;
> +    rt     = 0x00010002;
> +    resulth = 0x04;
> +    resultl = 0xFFFFFD08;
> +    __asm
> +        ("mthi  %0, $ac1\n\t"
> +         "mtlo  %1, $ac1\n\t"
> +         "dps.w.ph $ac1, %2, %3\n\t"
> +         "mfhi  %0, $ac1\n\t"
> +         "mflo  %1, $ac1\n\t"
> +         : "+r"(ach), "+r"(acl)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(ach == resulth);
> +    assert(acl == resultl);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/dpsqx_s_w_ph.c b/tests/tcg/mips/mips32-dspr2/dpsqx_s_w_ph.c
> new file mode 100644
> index 0000000..0f26071
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/dpsqx_s_w_ph.c
> @@ -0,0 +1,31 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, rt, dsp;
> +    int ach = 5, acl = 5;
> +    int resulth, resultl, resultdsp;
> +
> +    rs      = 0xBC0123AD;
> +    rt      = 0x01643721;
> +    resulth = 0x04;
> +    resultl = 0xAEA3E09B;
> +    resultdsp = 0x00;
> +    __asm
> +        ("mthi  %0, $ac1\n\t"
> +         "mtlo  %1, $ac1\n\t"
> +         "dpsqx_s.w.ph $ac1, %3, %4\n\t"
> +         "mfhi  %0, $ac1\n\t"
> +         "mflo  %1, $ac1\n\t"
> +         "rddsp %2\n\t"
> +         : "+r"(ach), "+r"(acl), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 17) & 0x01;
> +    assert(dsp == resultdsp);
> +    assert(ach == resulth);
> +    assert(acl == resultl);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/dpsqx_sa_w_ph.c b/tests/tcg/mips/mips32-dspr2/dpsqx_sa_w_ph.c
> new file mode 100644
> index 0000000..4688caf
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/dpsqx_sa_w_ph.c
> @@ -0,0 +1,31 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, rt, dsp;
> +    int ach = 5, acl = 5;
> +    int resulth, resultl, resultdsp;
> +
> +    rs      = 0xBC0123AD;
> +    rt      = 0x01643721;
> +    resulth = 0x00;
> +    resultl = 0x7FFFFFFF;
> +    resultdsp = 0x01;
> +    __asm
> +        ("mthi  %0, $ac1\n\t"
> +         "mtlo  %1, $ac1\n\t"
> +         "dpsqx_sa.w.ph $ac1, %3, %4\n\t"
> +         "mfhi  %0, $ac1\n\t"
> +         "mflo  %1, $ac1\n\t"
> +         "rddsp %2\n\t"
> +         : "+r"(ach), "+r"(acl), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 17) & 0x01;
> +    assert(dsp == resultdsp);
> +    assert(ach == resulth);
> +    assert(acl == resultl);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/dpsx_w_ph.c b/tests/tcg/mips/mips32-dspr2/dpsx_w_ph.c
> new file mode 100644
> index 0000000..6db59a4
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/dpsx_w_ph.c
> @@ -0,0 +1,27 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, rt;
> +    int ach = 5, acl = 5;
> +    int resulth, resultl;
> +
> +    rs      = 0xBC0123AD;
> +    rt      = 0x01643721;
> +    resulth = 0x04;
> +    resultl = 0xD751F050;
> +    __asm
> +        ("mthi  %0, $ac1\n\t"
> +         "mtlo  %1, $ac1\n\t"
> +         "dpsx.w.ph $ac1, %2, %3\n\t"
> +         "mfhi  %0, $ac1\n\t"
> +         "mflo  %1, $ac1\n\t"
> +         : "+r"(ach), "+r"(acl)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(ach == resulth);
> +    assert(acl == resultl);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/mul_ph.c b/tests/tcg/mips/mips32-dspr2/mul_ph.c
> new file mode 100644
> index 0000000..fc91f5d
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/mul_ph.c
> @@ -0,0 +1,25 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt, dsp;
> +    int result, resultdsp;
> +
> +    rs = 0x03FB1234;
> +    rt = 0x0BCC4321;
> +    result = 0xF504F4B4;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("mul.ph %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 21) & 0x01;
> +    assert(rd  == result);
> +    assert(dsp == resultdsp);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/mul_s_ph.c b/tests/tcg/mips/mips32-dspr2/mul_s_ph.c
> new file mode 100644
> index 0000000..949ea5e
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/mul_s_ph.c
> @@ -0,0 +1,25 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt, dsp;
> +    int result, resultdsp;
> +
> +    rs = 0x03FB1234;
> +    rt = 0x0BCC4321;
> +    result = 0x7fff7FFF;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("mul_s.ph %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 21) & 0x01;
> +    assert(rd  == result);
> +    assert(dsp == resultdsp);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/muleq_s_w_phl.c b/tests/tcg/mips/mips32-dspr2/muleq_s_w_phl.c
> new file mode 100644
> index 0000000..4e3262f
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/muleq_s_w_phl.c
> @@ -0,0 +1,40 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt, dsp;
> +    int result, resultdsp;
> +
> +    rs = 0x80001234;
> +    rt = 0x80004321;
> +    result = 0x7FFFFFFF;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("muleq_s.w.phl %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 21) & 0x01;
> +    assert(rd  == result);
> +    assert(dsp == resultdsp);
> +
> +    rs = 0x12340000;
> +    rt = 0x43210000;
> +    result = 0x98be968;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("muleq_s.w.phl %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 21) & 0x01;
> +    assert(rd  == result);
> +    assert(dsp == resultdsp);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/mulq_rs_w.c b/tests/tcg/mips/mips32-dspr2/mulq_rs_w.c
> new file mode 100644
> index 0000000..669405f
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/mulq_rs_w.c
> @@ -0,0 +1,36 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt, dsp;
> +    int result, resultdsp;
> +
> +    rs = 0x80001234;
> +    rt = 0x80004321;
> +    result = 0x80005555;
> +
> +    __asm
> +        ("mulq_rs.w %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd  == result);
> +
> +    rs = 0x80000000;
> +    rt = 0x80000000;
> +    result = 0x7FFFFFFF;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("mulq_rs.w %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 21) & 0x01;
> +    assert(rd  == result);
> +    assert(dsp == resultdsp);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/mulq_s_ph.c b/tests/tcg/mips/mips32-dspr2/mulq_s_ph.c
> new file mode 100644
> index 0000000..d0f7674
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/mulq_s_ph.c
> @@ -0,0 +1,25 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt, dsp;
> +    int result, resultdsp;
> +
> +    rs = 0x80001234;
> +    rt = 0x80004321;
> +    result = 0x7FFF098B;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("mulq_s.ph %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 21) & 0x01;
> +    assert(rd  == result);
> +    assert(dsp == resultdsp);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/mulq_s_w.c b/tests/tcg/mips/mips32-dspr2/mulq_s_w.c
> new file mode 100644
> index 0000000..df148b7
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/mulq_s_w.c
> @@ -0,0 +1,36 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt, dsp;
> +    int result, resultdsp;
> +
> +    rs = 0x80001234;
> +    rt = 0x80004321;
> +    result = 0x80005555;
> +
> +    __asm
> +        ("mulq_s.w %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd  == result);
> +
> +    rs = 0x80000000;
> +    rt = 0x80000000;
> +    result = 0x7FFFFFFF;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("mulq_s.w %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 21) & 0x01;
> +    assert(rd  == result);
> +    assert(dsp == resultdsp);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/mulsa_w_ph.c b/tests/tcg/mips/mips32-dspr2/mulsa_w_ph.c
> new file mode 100644
> index 0000000..a694093
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/mulsa_w_ph.c
> @@ -0,0 +1,29 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, rt, ach, acl;
> +    int resulth, resultl;
> +
> +    ach = 0x05;
> +    acl = 0x00BBDDCC;
> +    rs = 0x80001234;
> +    rt = 0x80004321;
> +    resulth = 0x05;
> +    resultl = 0x3BF5E918;
> +
> +    __asm
> +        ("mthi %0, $ac1\n\t"
> +         "mtlo %1, $ac1\n\t"
> +         "mulsa.w.ph $ac1, %2, %3\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "+r"(ach), "+r"(acl)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(ach == resulth);
> +    assert(acl == resultl);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/mulsaq_s_w_ph.c b/tests/tcg/mips/mips32-dspr2/mulsaq_s_w_ph.c
> new file mode 100644
> index 0000000..06c91a4
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/mulsaq_s_w_ph.c
> @@ -0,0 +1,29 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, rt, ach, acl;
> +    int resulth, resultl;
> +
> +    ach = 0x05;
> +    acl = 0x00BBDDCC;
> +    rs = 0x80001234;
> +    rt = 0x80004321;
> +    resulth = 0x05;
> +    resultl = 0x772ff463;
> +
> +    __asm
> +        ("mthi %0, $ac1\n\t"
> +         "mtlo %1, $ac1\n\t"
> +         "mulsaq_s.w.ph $ac1, %2, %3\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "+r"(ach), "+r"(acl)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(ach == resulth);
> +    assert(acl == resultl);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/precr_qb_ph.c b/tests/tcg/mips/mips32-dspr2/precr_qb_ph.c
> new file mode 100644
> index 0000000..3a2b3fd
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/precr_qb_ph.c
> @@ -0,0 +1,21 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result = 0x34786521;
> +
> +    __asm
> +        ("precr.qb.ph %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(result == rd);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/precr_sra_ph_w.c b/tests/tcg/mips/mips32-dspr2/precr_sra_ph_w.c
> new file mode 100644
> index 0000000..5c9baab
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/precr_sra_ph_w.c
> @@ -0,0 +1,32 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, rt;
> +    int result;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result = 0x43215678;
> +
> +    __asm
> +        ("precr_sra.ph.w %0, %1, 0x00\n\t"
> +         : "+r"(rt)
> +         : "r"(rs)
> +        );
> +    assert(result == rt);
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result = 0xFFFF0000;
> +
> +    __asm
> +        ("precr_sra.ph.w %0, %1, 0x1F\n\t"
> +         : "+r"(rt)
> +         : "r"(rs)
> +        );
> +    assert(result == rt);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/precr_sra_r_ph_w.c b/tests/tcg/mips/mips32-dspr2/precr_sra_r_ph_w.c
> new file mode 100644
> index 0000000..6474a10
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/precr_sra_r_ph_w.c
> @@ -0,0 +1,32 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, rt;
> +    int result;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result = 0x43215678;
> +
> +    __asm
> +        ("precr_sra_r.ph.w %0, %1, 0x00\n\t"
> +         : "+r"(rt)
> +         : "r"(rs)
> +        );
> +    assert(result == rt);
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result = 0xFFFF0000;
> +
> +    __asm
> +        ("precr_sra_r.ph.w %0, %1, 0x1F\n\t"
> +         : "+r"(rt)
> +         : "r"(rs)
> +        );
> +    assert(result == rt);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/prepend.c b/tests/tcg/mips/mips32-dspr2/prepend.c
> new file mode 100644
> index 0000000..f6bcd47
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/prepend.c
> @@ -0,0 +1,30 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rs, rt;
> +    int result;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result = 0x87654321;
> +    __asm
> +        ("prepend %0, %1, 0x00\n\t"
> +         : "+r"(rt)
> +         : "r"(rs)
> +        );
> +    assert(rt == result);
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result = 0xACF10ECA;
> +    __asm
> +        ("prepend %0, %1, 0x0F\n\t"
> +         : "+r"(rt)
> +         : "r"(rs)
> +        );
> +    assert(rt == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/shra_qb.c b/tests/tcg/mips/mips32-dspr2/shra_qb.c
> new file mode 100644
> index 0000000..48193de
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/shra_qb.c
> @@ -0,0 +1,30 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rt;
> +    int result;
> +
> +    rt = 0x12345678;
> +    result = 0x02060A0F;
> +
> +    __asm
> +        ("shra.qb %0, %1, 0x03\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    rt = 0x87654321;
> +    result = 0xF00C0804;
> +
> +    __asm
> +        ("shra.qb %0, %1, 0x03\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/shra_r_qb.c b/tests/tcg/mips/mips32-dspr2/shra_r_qb.c
> new file mode 100644
> index 0000000..29afa0e
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/shra_r_qb.c
> @@ -0,0 +1,30 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rt;
> +    int result;
> +
> +    rt = 0x12345678;
> +    result = 0x02070B0F;
> +
> +    __asm
> +        ("shra_r.qb %0, %1, 0x03\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    rt = 0x87654321;
> +    result = 0xF10D0804;
> +
> +    __asm
> +        ("shra_r.qb %0, %1, 0x03\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/shrav_qb.c b/tests/tcg/mips/mips32-dspr2/shrav_qb.c
> new file mode 100644
> index 0000000..b21e1b7
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/shrav_qb.c
> @@ -0,0 +1,32 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs = 0x03;
> +    rt = 0x12345678;
> +    result = 0x02060A0F;
> +
> +    __asm
> +        ("shrav.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rt), "r"(rs)
> +        );
> +    assert(rd == result);
> +
> +    rs = 0x03;
> +    rt = 0x87654321;
> +    result = 0xF00C0804;
> +
> +    __asm
> +        ("shrav.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rt), "r"(rs)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/shrav_r_qb.c b/tests/tcg/mips/mips32-dspr2/shrav_r_qb.c
> new file mode 100644
> index 0000000..9ea8aa0
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/shrav_r_qb.c
> @@ -0,0 +1,32 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs = 0x03;
> +    rt = 0x12345678;
> +    result = 0x02070B0F;
> +
> +    __asm
> +        ("shrav_r.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rt), "r"(rs)
> +        );
> +    assert(rd == result);
> +
> +    rs = 0x03;
> +    rt = 0x87654321;
> +    result = 0xF10D0804;
> +
> +    __asm
> +        ("shrav_r.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rt), "r"(rs)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/shrl_ph.c b/tests/tcg/mips/mips32-dspr2/shrl_ph.c
> new file mode 100644
> index 0000000..724b9a7
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/shrl_ph.c
> @@ -0,0 +1,20 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rt;
> +    int result;
> +
> +    rt     = 0x12345678;
> +    result = 0x009102B3;
> +
> +    __asm
> +        ("shrl.ph %0, %1, 0x05\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/shrlv_ph.c b/tests/tcg/mips/mips32-dspr2/shrlv_ph.c
> new file mode 100644
> index 0000000..ac79aa6
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/shrlv_ph.c
> @@ -0,0 +1,21 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs     = 0x05;
> +    rt     = 0x12345678;
> +    result = 0x009102B3;
> +
> +    __asm
> +        ("shrlv.ph %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rt), "r"(rs)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/subqh_ph.c b/tests/tcg/mips/mips32-dspr2/subqh_ph.c
> new file mode 100644
> index 0000000..dbc0967
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/subqh_ph.c
> @@ -0,0 +1,21 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result = 0x456709AB;
> +
> +    __asm
> +        ("subqh.ph %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/subqh_r_ph.c b/tests/tcg/mips/mips32-dspr2/subqh_r_ph.c
> new file mode 100644
> index 0000000..24ef0f1
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/subqh_r_ph.c
> @@ -0,0 +1,21 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result = 0x456809AC;
> +
> +    __asm
> +        ("subqh_r.ph %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/subqh_r_w.c b/tests/tcg/mips/mips32-dspr2/subqh_r_w.c
> new file mode 100644
> index 0000000..d460f86
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/subqh_r_w.c
> @@ -0,0 +1,21 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result = 0x456789AC;
> +
> +    __asm
> +        ("subqh_r.w %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/subqh_w.c b/tests/tcg/mips/mips32-dspr2/subqh_w.c
> new file mode 100644
> index 0000000..42be3de
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/subqh_w.c
> @@ -0,0 +1,21 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result = 0x456789AB;
> +
> +    __asm
> +        ("subqh.w %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/subu_ph.c b/tests/tcg/mips/mips32-dspr2/subu_ph.c
> new file mode 100644
> index 0000000..244ecea
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/subu_ph.c
> @@ -0,0 +1,25 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt, dsp;
> +    int result, resultdsp;
> +
> +    rs = 0x87654321;
> +    rt = 0x12345678;
> +    result    = 0x7531ECA9;
> +    resultdsp = 0x01;
> +
> +    __asm
> +        ("subu.ph %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 20) & 0x01;
> +    assert(dsp == resultdsp);
> +    assert(rd  == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/subu_s_ph.c b/tests/tcg/mips/mips32-dspr2/subu_s_ph.c
> new file mode 100644
> index 0000000..8e4da4f
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/subu_s_ph.c
> @@ -0,0 +1,25 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt, dsp;
> +    int result, resultdsp;
> +
> +    rs = 0x87654321;
> +    rt = 0x12345678;
> +    result    = 0x75310000;
> +    resultdsp = 0x01;
> +
> +    __asm
> +        ("subu_s.ph %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 20) & 0x01;
> +    assert(dsp == resultdsp);
> +    assert(rd  == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/subuh_qb.c b/tests/tcg/mips/mips32-dspr2/subuh_qb.c
> new file mode 100644
> index 0000000..92cfc76
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/subuh_qb.c
> @@ -0,0 +1,21 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result = 0xC5E7092B;
> +
> +    __asm
> +        ("subuh.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips32-dspr2/subuh_r_qb.c b/tests/tcg/mips/mips32-dspr2/subuh_r_qb.c
> new file mode 100644
> index 0000000..d9e6f2f
> --- /dev/null
> +++ b/tests/tcg/mips/mips32-dspr2/subuh_r_qb.c
> @@ -0,0 +1,21 @@
> +#include<stdio.h>
> +#include<assert.h>
> +
> +int main()
> +{
> +    int rd, rs, rt;
> +    int result;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result = 0xC6E80A2C;
> +
> +    __asm
> +        ("subuh_r.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    assert(rd == result);
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/Makefile b/tests/tcg/mips/mips64-dsp/Makefile
> new file mode 100644
> index 0000000..b6e358d
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/Makefile
> @@ -0,0 +1,305 @@
> +
> +CROSS_COMPILE	?= mips64el-unknown-linux-gnu-
> +
> +SIM = qemu-system-mips64el
> +SIMFLAGS = -nographic -cpu mips64dspr2 -kernel
> +
> +AS      = $(CROSS_COMPILE)as
> +LD      = $(CROSS_COMPILE)ld
> +CC      = $(CROSS_COMPILE)gcc
> +AR      = $(CROSS_COMPILE)ar
> +NM      = $(CROSS_COMPILE)nm
> +STRIP       = $(CROSS_COMPILE)strip
> +RANLIB      = $(CROSS_COMPILE)ranlib
> +OBJCOPY     = $(CROSS_COMPILE)objcopy
> +OBJDUMP     = $(CROSS_COMPILE)objdump
> +
> +VECTORS_OBJ ?= ./head.o ./printf.o
> +
> +HEAD_FLAGS ?= -nostdinc -mabi=64 -G 0 -mno-abicalls -fno-pic -pipe \
> +              -msoft-float -march=mips64 -Wa,-mips64 -Wa,--trap \
> +              -msym32 -DKBUILD_64BIT_SYM32 -I./
> +
> +CFLAGS ?= -nostdinc -mabi=64 -G 0 -mno-abicalls -fno-pic -fno-builtin  \
> +          -pipe -march=mips64r2 -mgp64 -mdsp -static -Wa,--trap -msym32 \
> +          -DKBUILD_64BIT_SYM32 -I./
> +
> +LDFLAGS = -T./mips_boot.lds -L./
> +FLAGS = -nostdlib -mabi=64 -march=mips64r2 -mgp64 -mdsp
> +
> +
> +#TESTCASES = absq_s_ob.tst
> +TESTCASES = absq_s_ph.tst
> +TESTCASES += absq_s_pw.tst
> +TESTCASES += absq_s_qh.tst
> +TESTCASES += absq_s_w.tst
> +TESTCASES += addq_ph.tst
> +TESTCASES += addq_pw.tst
> +TESTCASES += addq_qh.tst
> +TESTCASES += addq_s_ph.tst
> +TESTCASES += addq_s_pw.tst
> +TESTCASES += addq_s_qh.tst
> +TESTCASES += addsc.tst
> +TESTCASES += addu_ob.tst
> +TESTCASES += addu_qb.tst
> +TESTCASES += addu_s_ob.tst
> +TESTCASES += addu_s_qb.tst
> +TESTCASES += addwc.tst
> +TESTCASES += bitrev.tst
> +TESTCASES += bposge32.tst
> +TESTCASES += bposge64.tst
> +TESTCASES += cmp_eq_ph.tst
> +TESTCASES += cmp_eq_pw.tst
> +TESTCASES += cmp_eq_qh.tst
> +TESTCASES += cmpgu_eq_ob.tst
> +TESTCASES += cmpgu_eq_qb.tst
> +TESTCASES += cmpgu_le_ob.tst
> +TESTCASES += cmpgu_le_qb.tst
> +TESTCASES += cmpgu_lt_ob.tst
> +TESTCASES += cmpgu_lt_qb.tst
> +TESTCASES += cmp_le_ph.tst
> +TESTCASES += cmp_le_pw.tst
> +TESTCASES += cmp_le_qh.tst
> +TESTCASES += cmp_lt_ph.tst
> +TESTCASES += cmp_lt_pw.tst
> +TESTCASES += cmp_lt_qh.tst
> +TESTCASES += cmpu_eq_ob.tst
> +TESTCASES += cmpu_eq_qb.tst
> +TESTCASES += cmpu_le_ob.tst
> +TESTCASES += cmpu_le_qb.tst
> +TESTCASES += cmpu_lt_ob.tst
> +TESTCASES += cmpu_lt_qb.tst
> +#TESTCASES += dappend.tst
> +TESTCASES += dextp.tst
> +TESTCASES += dextpdp.tst
> +TESTCASES += dextpdpv.tst
> +TESTCASES += dextpv.tst
> +TESTCASES += dextr_l.tst
> +TESTCASES += dextr_r_l.tst
> +TESTCASES += dextr_rs_l.tst
> +TESTCASES += dextr_rs_w.tst
> +TESTCASES += dextr_r_w.tst
> +TESTCASES += dextr_s_h.tst
> +TESTCASES += dextrv_l.tst
> +TESTCASES += dextrv_r_l.tst
> +TESTCASES += dextrv_rs_l.tst
> +TESTCASES += dextrv_rs_w.tst
> +TESTCASES += dextrv_r_w.tst
> +TESTCASES += dextrv_s_h.tst
> +TESTCASES += dextrv_w.tst
> +TESTCASES += dextr_w.tst
> +TESTCASES += dinsv.tst
> +TESTCASES += dmadd.tst
> +TESTCASES += dmaddu.tst
> +TESTCASES += dmsub.tst
> +TESTCASES += dmsubu.tst
> +TESTCASES += dmthlip.tst
> +TESTCASES += dpaq_sa_l_pw.tst
> +TESTCASES += dpaq_sa_l_w.tst
> +TESTCASES += dpaq_s_w_ph.tst
> +TESTCASES += dpaq_s_w_qh.tst
> +TESTCASES += dpau_h_obl.tst
> +TESTCASES += dpau_h_obr.tst
> +TESTCASES += dpau_h_qbl.tst
> +TESTCASES += dpau_h_qbr.tst
> +TESTCASES += dpsq_sa_l_pw.tst
> +TESTCASES += dpsq_sa_l_w.tst
> +TESTCASES += dpsq_s_w_ph.tst
> +TESTCASES += dpsq_s_w_qh.tst
> +TESTCASES += dpsu_h_obl.tst
> +TESTCASES += dpsu_h_obr.tst
> +TESTCASES += dpsu_h_qbl.tst
> +TESTCASES += dpsu_h_qbr.tst
> +TESTCASES += dshilo.tst
> +TESTCASES += dshilov.tst
> +TESTCASES += extp.tst
> +TESTCASES += extpdp.tst
> +TESTCASES += extpdpv.tst
> +TESTCASES += extpv.tst
> +TESTCASES += extr_rs_w.tst
> +TESTCASES += extr_r_w.tst
> +TESTCASES += extr_s_h.tst
> +TESTCASES += extrv_rs_w.tst
> +TESTCASES += extrv_r_w.tst
> +TESTCASES += extrv_s_h.tst
> +TESTCASES += extrv_w.tst
> +TESTCASES += extr_w.tst
> +TESTCASES += insv.tst
> +TESTCASES += lbux.tst
> +TESTCASES += lhx.tst
> +TESTCASES += lwx.tst
> +TESTCASES += ldx.tst
> +TESTCASES += madd.tst
> +TESTCASES += maddu.tst
> +TESTCASES += maq_sa_w_phl.tst
> +TESTCASES += maq_sa_w_phr.tst
> +TESTCASES += maq_sa_w_qhll.tst
> +TESTCASES += maq_sa_w_qhlr.tst
> +TESTCASES += maq_sa_w_qhrl.tst
> +TESTCASES += maq_sa_w_qhrr.tst
> +TESTCASES += maq_s_l_pwl.tst
> +TESTCASES += maq_s_l_pwr.tst
> +TESTCASES += maq_s_w_phl.tst
> +TESTCASES += maq_s_w_phr.tst
> +TESTCASES += maq_s_w_qhll.tst
> +TESTCASES += maq_s_w_qhlr.tst
> +TESTCASES += maq_s_w_qhrl.tst
> +TESTCASES += maq_s_w_qhrr.tst
> +TESTCASES += mfhi.tst
> +TESTCASES += mflo.tst
> +TESTCASES += modsub.tst
> +TESTCASES += msub.tst
> +TESTCASES += msubu.tst
> +TESTCASES += mthi.tst
> +TESTCASES += mthlip.tst
> +TESTCASES += mtlo.tst
> +TESTCASES += muleq_s_pw_qhl.tst
> +TESTCASES += muleq_s_pw_qhr.tst
> +TESTCASES += muleq_s_w_phl.tst
> +TESTCASES += muleq_s_w_phr.tst
> +TESTCASES += muleu_s_ph_qbl.tst
> +TESTCASES += muleu_s_ph_qbr.tst
> +TESTCASES += muleu_s_qh_obl.tst
> +TESTCASES += muleu_s_qh_obr.tst
> +TESTCASES += mulq_rs_ph.tst
> +TESTCASES += mulq_rs_qh.tst
> +TESTCASES += mulsaq_s_l_pw.tst
> +TESTCASES += mulsaq_s_w_qh.tst
> +TESTCASES += mult.tst
> +TESTCASES += multu.tst
> +TESTCASES += packrl_ph.tst
> +TESTCASES += packrl_pw.tst
> +TESTCASES += pick_ob.tst
> +TESTCASES += pick_ph.tst
> +TESTCASES += pick_pw.tst
> +TESTCASES += pick_qb.tst
> +TESTCASES += pick_qh.tst
> +#TESTCASES += preceq_l_pwl.tst
> +#TESTCASES += preceq_l_pwr.tst
> +TESTCASES += preceq_pw_qhla.tst
> +TESTCASES += preceq_pw_qhl.tst
> +TESTCASES += preceq_pw_qhra.tst
> +TESTCASES += preceq_pw_qhr.tst
> +TESTCASES += precequ_ph_qbla.tst
> +TESTCASES += precequ_ph_qbl.tst
> +TESTCASES += precequ_ph_qbra.tst
> +TESTCASES += precequ_ph_qbr.tst
> +#TESTCASES += precequ_qh_obla.tst
> +#TESTCASES += precequ_qh_obl.tst
> +#TESTCASES += precequ_qh_obra.tst
> +#TESTCASES += precequ_qh_obr.tst
> +TESTCASES += preceq_w_phl.tst
> +TESTCASES += preceq_w_phr.tst
> +TESTCASES += preceu_ph_qbla.tst
> +TESTCASES += preceu_ph_qbl.tst
> +TESTCASES += preceu_ph_qbra.tst
> +TESTCASES += preceu_ph_qbr.tst
> +TESTCASES += preceu_qh_obla.tst
> +TESTCASES += preceu_qh_obl.tst
> +TESTCASES += preceu_qh_obra.tst
> +TESTCASES += preceu_qh_obr.tst
> +#TESTCASES += precr_ob_qh.tst
> +TESTCASES += precrq_ob_qh.tst
> +TESTCASES += precrq_ph_w.tst
> +TESTCASES += precrq_pw_l.tst
> +TESTCASES += precrq_qb_ph.tst
> +TESTCASES += precrq_qh_pw.tst
> +TESTCASES += precrq_rs_ph_w.tst
> +TESTCASES += precrq_rs_qh_pw.tst
> +TESTCASES += precrqu_s_ob_qh.tst
> +TESTCASES += precrqu_s_qb_ph.tst
> +#TESTCASES += precr_sra_qh_pw.tst
> +#TESTCASES += precr_sra_r_qh_pw.tst
> +#TESTCASES += prependd.tst
> +#TESTCASES += prependw.tst
> +#TESTCASES += raddu_l_ob.tst
> +TESTCASES += raddu_w_qb.tst
> +TESTCASES += rddsp.tst
> +TESTCASES += repl_ob.tst
> +TESTCASES += repl_ph.tst
> +TESTCASES += repl_pw.tst
> +TESTCASES += repl_qb.tst
> +TESTCASES += repl_qh.tst
> +TESTCASES += replv_ob.tst
> +TESTCASES += replv_ph.tst
> +TESTCASES += replv_pw.tst
> +TESTCASES += replv_qb.tst
> +TESTCASES += shilo.tst
> +TESTCASES += shilov.tst
> +TESTCASES += shll_ob.tst
> +TESTCASES += shll_ph.tst
> +TESTCASES += shll_pw.tst
> +TESTCASES += shll_qb.tst
> +TESTCASES += shll_qh.tst
> +TESTCASES += shll_s_ph.tst
> +TESTCASES += shll_s_pw.tst
> +TESTCASES += shll_s_qh.tst
> +TESTCASES += shll_s_w.tst
> +TESTCASES += shllv_ob.tst
> +TESTCASES += shllv_ph.tst
> +TESTCASES += shllv_pw.tst
> +TESTCASES += shllv_qb.tst
> +TESTCASES += shllv_qh.tst
> +TESTCASES += shllv_s_ph.tst
> +TESTCASES += shllv_s_pw.tst
> +TESTCASES += shllv_s_qh.tst
> +TESTCASES += shllv_s_w.tst
> +#TESTCASES += shra_ob.tst
> +TESTCASES += shra_ph.tst
> +TESTCASES += shra_pw.tst
> +TESTCASES += shra_qh.tst
> +#TESTCASES += shra_r_ob.tst
> +TESTCASES += shra_r_ph.tst
> +TESTCASES += shra_r_pw.tst
> +TESTCASES += shra_r_qh.tst
> +TESTCASES += shra_r_w.tst
> +TESTCASES += shrav_ph.tst
> +TESTCASES += shrav_pw.tst
> +TESTCASES += shrav_qh.tst
> +TESTCASES += shrav_r_ph.tst
> +TESTCASES += shrav_r_pw.tst
> +TESTCASES += shrav_r_qh.tst
> +TESTCASES += shrav_r_w.tst
> +TESTCASES += shrl_ob.tst
> +TESTCASES += shrl_qb.tst
> +#TESTCASES += shrl_qh.tst
> +TESTCASES += shrlv_ob.tst
> +TESTCASES += shrlv_qb.tst
> +#TESTCASES += shrlv_qh.tst
> +TESTCASES += subq_ph.tst
> +TESTCASES += subq_pw.tst
> +TESTCASES += subq_qh.tst
> +TESTCASES += subq_s_ph.tst
> +TESTCASES += subq_s_pw.tst
> +TESTCASES += subq_s_qh.tst
> +TESTCASES += subq_s_w.tst
> +TESTCASES += subu_ob.tst
> +TESTCASES += subu_qb.tst
> +TESTCASES += subu_s_ob.tst
> +TESTCASES += subu_s_qb.tst
> +TESTCASES += wrdsp.tst
> +
> +all: build
> +
> +head.o : head.S
> +	$(Q)$(CC) $(HEAD_FLAGS) -D"STACK_TOP=0xffffffff80200000" -c $< -o $@
> +
> +%.o  : %.S
> +	$(CC) $(CFLAGS) -c $< -o $@
> +
> +%.o  : %.c
> +	$(CC) $(CFLAGS) -c $< -o $@
> +
> +%.tst: %.o $(VECTORS_OBJ)
> +	$(CC) $(VECTORS_OBJ) $(FLAGS) $(LDFLAGS) $< -o $@
> +
> +build: $(VECTORS_OBJ) $(MIPSSOC_LIB) $(TESTCASES)
> +
> +check:  $(VECTORS_OBJ) $(MIPSSOC_LIB) $(TESTCASES)
> +	@for case in $(TESTCASES); do \
> +		echo $(SIM) $(SIMFLAGS) ./$$case; \
> +		$(SIM) $(SIMFLAGS) ./$$case & (sleep 1; killall $(SIM)); \
> +	done
> +
> +clean:
> +	$(Q)rm -f *.o *.tst *.a
> diff --git a/tests/tcg/mips/mips64-dsp/absq_s_ob.c b/tests/tcg/mips/mips64-dsp/absq_s_ob.c
> new file mode 100644
> index 0000000..6214031
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/absq_s_ob.c
> @@ -0,0 +1,63 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, result, dspcontrol;
> +    rt = 0x7F7F7F7F7F7F7F7F;
> +    result = 0x7F7F7F7F7F7F7F7F;
> +
> +
> +    __asm
> +        (".set mips64\n\t"
> +         "absq_s.ob %0 %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +
> +    if (result != rd) {
> +        printf("absq_s.ob test 1 error\n");
> +
> +        return -1;
> +    }
> +
> +    __asm
> +        ("rddsp %0\n\t"
> +         : "=r"(rd)
> +        );
> +    rd >> 20;
> +    rd = rd & 0x1;
> +    if (rd != 0) {
> +        printf("absq_s.ob test 1 dspcontrol overflow flag error\n");
> +
> +        return -1;
> +    }
> +
> +    rt = 0x80FFFFFFFFFFFFFF;
> +    result = 0x7F01010101010101;
> +
> +    __asm
> +        ("absq_s.ob %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    if (result != rd) {
> +        printf("absq_s.ob test 2 error\n");
> +
> +        return -1;
> +    }
> +
> +    __asm
> +        ("rddsp %0\n\t"
> +         : "=r"(rd)
> +        );
> +    rd = rd >> 20;
> +    rd = rd & 0x1;
> +    if (rd != 1) {
> +        printf("absq_s.ob test 2 dspcontrol overflow flag error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> +
> diff --git a/tests/tcg/mips/mips64-dsp/absq_s_ph.c b/tests/tcg/mips/mips64-dsp/absq_s_ph.c
> new file mode 100644
> index 0000000..238416d
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/absq_s_ph.c
> @@ -0,0 +1,37 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt;
> +    long long result;
> +
> +    rt     = 0x10017EFD;
> +    result = 0x10017EFD;
> +
> +    __asm
> +        ("absq_s.ph %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    if (rd != result) {
> +        printf("absq_s.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    rt     = 0x8000A536;
> +    result = 0x7FFF5ACA;
> +
> +    __asm
> +        ("absq_s.ph %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    if (rd != result) {
> +        printf("absq_s.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/absq_s_pw.c b/tests/tcg/mips/mips64-dsp/absq_s_pw.c
> new file mode 100644
> index 0000000..48fc763
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/absq_s_pw.c
> @@ -0,0 +1,66 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, result, dspcontrol;
> +    rd = 0;
> +    rt = 0x7F7F7F7F7F7F7F7F;
> +    result = 0x7F7F7F7F7F7F7F7F;
> +
> +
> +    __asm
> +        ("absq_s.pw %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +
> +    if (result != rd) {
> +        printf("absq_s.pw test 1 error\n");
> +
> +        return -1;
> +    }
> +
> +    rd = 0;
> +    __asm
> +        ("rddsp %0\n\t"
> +         : "=r"(rd)
> +        );
> +    rd >> 20;
> +    rd = rd & 0x1;
> +    if (rd != 0) {
> +        printf("absq_s.pw test 1 dspcontrol overflow flag error\n");
> +
> +        return -1;
> +    }
> +
> +    rd = 0;
> +    rt = 0x80000000FFFFFFFF;
> +    result = 0x7FFFFFFF00000001;
> +
> +    __asm
> +        ("absq_s.pw %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    if (result != rd) {
> +        printf("absq_s.pw test 2 error\n");
> +
> +        return -1;
> +    }
> +
> +    rd = 0;
> +    __asm
> +        ("rddsp %0\n\t"
> +         : "=r"(rd)
> +        );
> +    rd = rd >> 20;
> +    rd = rd & 0x1;
> +    if (rd != 1) {
> +        printf("absq_s.pw test 2 dspcontrol overflow flag error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> +
> diff --git a/tests/tcg/mips/mips64-dsp/absq_s_qh.c b/tests/tcg/mips/mips64-dsp/absq_s_qh.c
> new file mode 100644
> index 0000000..9001a9e
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/absq_s_qh.c
> @@ -0,0 +1,40 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, result, dspcontrol;
> +    rd = 0;
> +    rt = 0x7F7F7F7F7F7F7F7F;
> +    result = 0x7F7F7F7F7F7F7F7F;
> +
> +
> +    __asm
> +        ("absq_s.qh %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +
> +    if (result != rd) {
> +        printf("absq_s.qh test 1 error\n");
> +
> +        return -1;
> +    }
> +
> +    rd = 0;
> +    rt = 0x8000FFFFFFFFFFFF;
> +    result = 0x7FFF000100000001;
> +
> +    __asm
> +        ("absq_s.pw %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    if (result != rd) {
> +        printf("absq_s.rw test 2 error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> +
> diff --git a/tests/tcg/mips/mips64-dsp/absq_s_w.c b/tests/tcg/mips/mips64-dsp/absq_s_w.c
> new file mode 100644
> index 0000000..414c8bd
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/absq_s_w.c
> @@ -0,0 +1,48 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt;
> +    long long result;
> +
> +    rt     = 0x80000000;
> +    result = 0x7FFFFFFF;
> +    __asm
> +        ("absq_s.w %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    if (rd != result) {
> +        printf("absq_s_w.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    rt     = 0x80030000;
> +    result = 0x7FFD0000;
> +    __asm
> +        ("absq_s.w %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    if (rd != result) {
> +        printf("absq_s_w.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    rt     = 0x31036080;
> +    result = 0x31036080;
> +    __asm
> +        ("absq_s.w %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    if (rd != result) {
> +        printf("absq_s_w.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/addq_ph.c b/tests/tcg/mips/mips64-dsp/addq_ph.c
> new file mode 100644
> index 0000000..212d3d9
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/addq_ph.c
> @@ -0,0 +1,37 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt;
> +    long long result;
> +
> +    rs     = 0xFFFFFFFF;
> +    rt     = 0x10101010;
> +    result = 0x100F100F;
> +    __asm
> +        ("addq.ph   %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if (rd != result) {
> +        printf("addq.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    rs     = 0x3712847D;
> +    rt     = 0x0031AF2D;
> +    result = 0x374333AA;
> +    __asm
> +        ("addq.ph   %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if (rd != result) {
> +        printf("addq.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/addq_pw.c b/tests/tcg/mips/mips64-dsp/addq_pw.c
> new file mode 100644
> index 0000000..e170256
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/addq_pw.c
> @@ -0,0 +1,26 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, result, dspreg, dspresult;
> +    rs = 0x123456787FFFFFFF;
> +    rt = 0x1111111100000001;
> +    result = 0x2345678980000000;
> +    dspresult = 0x1;
> +
> +    __asm
> +        ("addq.pw %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dspreg)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    dspreg = ((dspreg >> 20) & 0x01);
> +    if ((rd != result) || (dspreg != dspresult)) {
> +        printf("addq.pw error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/addq_qh.c b/tests/tcg/mips/mips64-dsp/addq_qh.c
> new file mode 100644
> index 0000000..415f743
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/addq_qh.c
> @@ -0,0 +1,28 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, result, dspreg, dspresult;
> +
> +    rs = 0x123456787FFF0000;
> +    rt = 0x1111111100010000;
> +    result = 0x2345678980000000;
> +    dspresult = 0x1;
> +
> +    __asm
> +        ("addq.qh %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dspreg)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    dspreg = ((dspreg >> 20) & 0x01);
> +
> +    if ((rd != result) || (dspreg != dspresult)) {
> +        printf("addq.qh error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/addq_s_ph.c b/tests/tcg/mips/mips64-dsp/addq_s_ph.c
> new file mode 100644
> index 0000000..5cc94c4
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/addq_s_ph.c
> @@ -0,0 +1,37 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt;
> +    long long result;
> +
> +    rs     = 0xFFFFFFFF;
> +    rt     = 0x10101010;
> +    result = 0x100F100F;
> +    __asm
> +        ("addq_s.ph   %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if (rd != result) {
> +        printf("addq_s.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    rs     = 0x3712847D;
> +    rt     = 0x0031AF2D;
> +    result = 0x37438000;
> +    __asm
> +        ("addq_s.ph   %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if (rd != result) {
> +        printf("addq_s.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/addq_s_pw.c b/tests/tcg/mips/mips64-dsp/addq_s_pw.c
> new file mode 100644
> index 0000000..6cd2314
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/addq_s_pw.c
> @@ -0,0 +1,45 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, result, dspreg, dspresult;
> +    rs = 0x123456787FFFFFFF;
> +    rt = 0x1111111100000001;
> +    result = 0x234567897FFFFFFF;
> +    dspresult = 0x1;
> +
> +    __asm
> +        ("addq_s.pw %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dspreg)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    dspreg = ((dspreg >> 20) & 0x01);
> +    if ((rd != result) || (dspreg != dspresult)) {
> +        printf("addq_s.pw error\n");
> +
> +        return -1;
> +    }
> +
> +    rs = 0x7FFFFFFFE00000FF;
> +    rt = 0x00000001200000DD;
> +    result = 0x7FFFFFFF000001DC;
> +    dspresult = 0x01;
> +
> +    __asm
> +        ("addq_s.pw %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dspreg)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    dspreg = ((dspreg >> 20) & 0x01);
> +    if ((rd != result) || (dspreg != dspresult)) {
> +        printf("addq_s.pw error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/addq_s_qh.c b/tests/tcg/mips/mips64-dsp/addq_s_qh.c
> new file mode 100644
> index 0000000..3057ce6
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/addq_s_qh.c
> @@ -0,0 +1,26 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, result, dspreg, dspresult;
> +    rs = 0x123456787FFF0000;
> +    rt = 0x1111111100020000;
> +    result = 0x234567897FFF0000;
> +    dspresult = 0x1;
> +
> +    __asm
> +        ("addq_s.qh %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dspreg)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    dspreg = ((dspreg >> 20) & 0x01);
> +    if ((rd != result) || (dspreg != dspresult)) {
> +        printf("addq_s.qh error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/addsc.c b/tests/tcg/mips/mips64-dsp/addsc.c
> new file mode 100644
> index 0000000..c753376
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/addsc.c
> @@ -0,0 +1,37 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt;
> +    long long result;
> +
> +    rs     = 0x0000000F;
> +    rt     = 0x00000001;
> +    result = 0x00000010;
> +    __asm
> +        ("addsc %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if (rd != result) {
> +        printf("addsc wrong\n");
> +
> +        return -1;
> +    }
> +
> +    rs     = 0xFFFF0FFF;
> +    rt     = 0x00010111;
> +    result = 0x00001110;
> +    __asm
> +        ("addsc %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if (rd != result) {
> +        printf("addsc wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/addu_ob.c b/tests/tcg/mips/mips64-dsp/addu_ob.c
> new file mode 100644
> index 0000000..1069e68
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/addu_ob.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, result, dspreg, dspresult;
> +    rs = 0x123456789ABCDEF0;
> +    rt = 0x3456123498DEF390;
> +    result = 0x468A68AC329AD180;
> +    dspresult = 0x01;
> +
> +    __asm
> +        ("addu.ob %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dspreg)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    dspreg = ((dspreg >> 20) & 0x01);
> +
> +    if ((rd != result) || (dspreg != dspresult)) {
> +        printf("addu.ob error\n\t");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/addu_qb.c b/tests/tcg/mips/mips64-dsp/addu_qb.c
> new file mode 100644
> index 0000000..a5ecdcd
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/addu_qb.c
> @@ -0,0 +1,37 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt;
> +    long long result;
> +
> +    rs     = 0x00FF00FF;
> +    rt     = 0x00010001;
> +    result = 0x00000000;
> +    __asm
> +        ("addu.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if (rd != result) {
> +        printf("addu.qb wrong\n");
> +
> +        return -1;
> +    }
> +
> +    rs     = 0xFFFF1111;
> +    rt     = 0x00020001;
> +    result = 0xFFFFFFFFFF011112;
> +    __asm
> +        ("addu.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if (rd != result) {
> +        printf("addu.qb wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/addu_s_ob.c b/tests/tcg/mips/mips64-dsp/addu_s_ob.c
> new file mode 100644
> index 0000000..e89a463
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/addu_s_ob.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, result, dspreg, dspresult;
> +    rs = 0x123456789ABCDEF0;
> +    rt = 0x3456123498DEF390;
> +    result = 0x468A68ACFFFFFFFF;
> +    dspresult = 0x01;
> +
> +    __asm
> +        ("addu_s.ob %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dspreg)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    dspreg = ((dspreg >> 20) & 0x01);
> +
> +    if ((rd != result) || (dspreg != dspresult)) {
> +        printf("addu_s.ob error\n\t");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/addu_s_qb.c b/tests/tcg/mips/mips64-dsp/addu_s_qb.c
> new file mode 100644
> index 0000000..7a09965
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/addu_s_qb.c
> @@ -0,0 +1,38 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt;
> +    long long result;
> +
> +    rs     = 0x10FF01FF;
> +    rt     = 0x10010001;
> +    result = 0x20FF01FF;
> +    __asm
> +        ("addu_s.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if (rd != result) {
> +        printf("addu_s.qb error 1\n");
> +
> +        return -1;
> +    }
> +
> +    rs     = 0xFFFFFFFFFFFF1111;
> +    rt     = 0x00020001;
> +    result = 0xFFFFFFFFFFFF1112;
> +    __asm
> +        ("addu_s.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if (rd != result) {
> +        printf("addu_s.qb error 2\n");
> +
> +        return -1;
> +    }
> +
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/addwc.c b/tests/tcg/mips/mips64-dsp/addwc.c
> new file mode 100644
> index 0000000..fb3ef11
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/addwc.c
> @@ -0,0 +1,37 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt;
> +    long long result;
> +
> +    rs     = 0x10FF01FF;
> +    rt     = 0x10010001;
> +    result = 0x21000200;
> +    __asm
> +        ("addwc %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if (rd != result) {
> +        printf("addwc wrong\n");
> +
> +        return -1;
> +    }
> +
> +    rs     = 0xFFFF1111;
> +    rt     = 0x00020001;
> +    result = 0x00011112;
> +    __asm
> +        ("addwc %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if (rd != result) {
> +        printf("addwc wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/bitrev.c b/tests/tcg/mips/mips64-dsp/bitrev.c
> new file mode 100644
> index 0000000..ac24ef3
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/bitrev.c
> @@ -0,0 +1,23 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt;
> +    long long result;
> +
> +    rt     = 0x12345678;
> +    result = 0x00001E6A;
> +
> +    __asm
> +        ("bitrev %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    if (rd != result) {
> +        printf("bitrev wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/bposge32.c b/tests/tcg/mips/mips64-dsp/bposge32.c
> new file mode 100644
> index 0000000..97bce44
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/bposge32.c
> @@ -0,0 +1,50 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long dsp, sum;
> +    long long result;
> +
> +    dsp =  0x20;
> +    sum = 0x01;
> +    result = 0x02;
> +
> +    __asm
> +        ("wrdsp %1\n\t"
> +         "bposge32 test1\n\t"
> +         "nop\n\t"
> +         "addi %0, 0xA2\n\t"
> +         "nop\n\t"
> +         "test1:\n\t"
> +         "addi %0, 0x01\n\t"
> +         : "+r"(sum)
> +         : "r"(dsp)
> +        );
> +    if (sum != result) {
> +        printf("bposge32 wrong\n");
> +
> +        return -1;
> +    }
> +
> +    dsp =  0x10;
> +    sum = 0x01;
> +    result = 0xA4;
> +
> +    __asm
> +        ("wrdsp %1\n\t"
> +         "bposge32 test2\n\t"
> +         "nop\n\t"
> +         "addi %0, 0xA2\n\t"
> +         "nop\n\t"
> +         "test2:\n\t"
> +         "addi %0, 0x01\n\t"
> +         : "+r"(sum)
> +         : "r"(dsp)
> +        );
> +    if (sum != result) {
> +        printf("bposge32 wrong\n");
> +
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/bposge64.c b/tests/tcg/mips/mips64-dsp/bposge64.c
> new file mode 100644
> index 0000000..961fb61
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/bposge64.c
> @@ -0,0 +1,50 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long dsp, sum;
> +    long long result;
> +
> +    dsp =  0x40;
> +    sum = 0x01;
> +    result = 0x02;
> +
> +    __asm
> +        ("wrdsp %1\n\t"
> +         "bposge32 test1\n\t"
> +         "nop\n\t"
> +         "addi %0, 0xA2\n\t"
> +         "nop\n\t"
> +         "test1:\n\t"
> +         "addi %0, 0x01\n\t"
> +         : "+r"(sum)
> +         : "r"(dsp)
> +        );
> +    if (sum != result) {
> +        printf("bposge32 wrong\n");
> +
> +        return -1;
> +    }
> +
> +    dsp =  0x10;
> +    sum = 0x01;
> +    result = 0xA4;
> +
> +    __asm
> +        ("wrdsp %1\n\t"
> +         "bposge32 test2\n\t"
> +         "nop\n\t"
> +         "addi %0, 0xA2\n\t"
> +         "nop\n\t"
> +         "test2:\n\t"
> +         "addi %0, 0x01\n\t"
> +         : "+r"(sum)
> +         : "r"(dsp)
> +        );
> +    if (sum != result) {
> +        printf("bposge32 wrong\n");
> +
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/cmp_eq_ph.c b/tests/tcg/mips/mips64-dsp/cmp_eq_ph.c
> new file mode 100644
> index 0000000..63069d0
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/cmp_eq_ph.c
> @@ -0,0 +1,42 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt;
> +    long long result;
> +
> +    rs     = 0x11777066;
> +    rt     = 0x55AA33FF;
> +    result = 0x00;
> +    __asm
> +        ("cmp.eq.ph %1, %2\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    rd = (rd >> 24) & 0x03;
> +    if (rd != result) {
> +        printf("cmp.eq.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    rs     = 0x11777066;
> +    rt     = 0x11777066;
> +    result = 0x03;
> +    __asm
> +        ("cmp.eq.ph %1, %2\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    rd = (rd >> 24) & 0x03;
> +    if (rd != result) {
> +        printf("cmp.eq.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/cmp_eq_pw.c b/tests/tcg/mips/mips64-dsp/cmp_eq_pw.c
> new file mode 100644
> index 0000000..46e3417
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/cmp_eq_pw.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +  long long rs, rt, dspreg, dspresult;
> +
> +  rs = 0x123456789ABCDEF0;
> +  rt = 0x123456789ABCDEFF;
> +  dspresult = 0x02;
> +
> +  __asm
> +      ("cmp.eq.pw %1, %2\n\t"
> +       "rddsp %0\n\t"
> +       : "=r"(dspreg)
> +       : "r"(rs), "r"(rt)
> +      );
> +
> +  dspreg = ((dspreg >> 24) & 0x03);
> +
> +  if (dspreg != dspresult) {
> +    printf("cmp.eq.pw error\n");
> +
> +    return -1;
> +  }
> +
> +  return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/cmp_eq_qh.c b/tests/tcg/mips/mips64-dsp/cmp_eq_qh.c
> new file mode 100644
> index 0000000..7b5381c
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/cmp_eq_qh.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +  long long rs, rt, dspreg, dspresult;
> +
> +  rs = 0x123456789ABCDEF0;
> +  rt = 0x123456789ABCDEFF;
> +  dspresult = 0x0E;
> +
> +  __asm
> +      ("cmp.eq.qh %1, %2\n\t"
> +        "rddsp %0\n\t"
> +        : "=r"(dspreg)
> +        : "r"(rs), "r"(rt)
> +       );
> +
> +  dspreg = ((dspreg >> 24) & 0x0F);
> +
> +  if (dspreg != dspresult) {
> +    printf("cmp.eq.qh error\n");
> +
> +    return -1;
> +  }
> +
> +  return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/cmp_le_ph.c b/tests/tcg/mips/mips64-dsp/cmp_le_ph.c
> new file mode 100644
> index 0000000..12d24f1
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/cmp_le_ph.c
> @@ -0,0 +1,40 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt;
> +    long long result;
> +
> +    rs     = 0x11777066;
> +    rt     = 0x55AA33FF;
> +    result = 0x02;
> +    __asm
> +        ("cmp.le.ph %1, %2\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    rd = (rd >> 24) & 0x03;
> +    if (rd != result) {
> +        printf("cmp.le.ph wrong\n");
> +
> +        return -1;
> +    }
> +    rs     = 0x11777066;
> +    rt     = 0x11777066;
> +    result = 0x03;
> +    __asm
> +        ("cmp.le.ph %1, %2\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    rd = (rd >> 24) & 0x03;
> +    if (rd != result) {
> +        printf("cmp.le.ph wrong\n");
> +
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/cmp_le_pw.c b/tests/tcg/mips/mips64-dsp/cmp_le_pw.c
> new file mode 100644
> index 0000000..51bdec4
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/cmp_le_pw.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt, dspreg, dspresult;
> +
> +    rs = 0x123456789ABCDEF0;
> +    rt = 0x123456789ABCDEFF;
> +    dspresult = 0x03;
> +
> +    __asm
> +        ("cmp.le.pw %1, %2\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(dspreg)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    dspreg = ((dspreg >> 24) & 0x03);
> +
> +    if (dspreg != dspresult) {
> +        printf("cmp.le.pw error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/cmp_le_qh.c b/tests/tcg/mips/mips64-dsp/cmp_le_qh.c
> new file mode 100644
> index 0000000..0dff2b1
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/cmp_le_qh.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt, dspreg, dspresult;
> +
> +    rs = 0x123456789ABCDEF0;
> +    rt = 0x123456789ABCDEFF;
> +    dspresult = 0x0F;
> +
> +    __asm
> +        ("cmp.le.qh %1, %2\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(dspreg)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    dspreg = ((dspreg >> 24) & 0x0F);
> +
> +    if (dspreg != dspresult) {
> +        printf("cmp.le.qh error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/cmp_lt_ph.c b/tests/tcg/mips/mips64-dsp/cmp_lt_ph.c
> new file mode 100644
> index 0000000..1d91228
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/cmp_lt_ph.c
> @@ -0,0 +1,41 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt;
> +    long long result;
> +
> +    rs     = 0x11777066;
> +    rt     = 0x55AA33FF;
> +    result = 0x02;
> +    __asm
> +        ("cmp.lt.ph %1, %2\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    rd = (rd >> 24) & 0x03;
> +    if (rd != result) {
> +        printf("cmp.lt.ph wrong\n");
> +
> +        return -1;
> +    }
> +    rs     = 0x11777066;
> +    rt     = 0x11777066;
> +    result = 0x00;
> +    __asm
> +        ("cmp.lt.ph %1, %2\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    rd = (rd >> 24) & 0x03;
> +    if (rd != result) {
> +        printf("cmp.lt.ph2 wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/cmp_lt_pw.c b/tests/tcg/mips/mips64-dsp/cmp_lt_pw.c
> new file mode 100644
> index 0000000..9c7f8a2
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/cmp_lt_pw.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt, dspreg, dspresult;
> +
> +    rs = 0x123456789ABCDEF0;
> +    rt = 0x123456789ABCDEFF;
> +    dspresult = 0x01;
> +
> +    __asm
> +        ("cmp.lt.pw %1, %2\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(dspreg)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    dspreg = ((dspreg >> 24) & 0x03);
> +
> +    if (dspreg != dspresult) {
> +        printf("cmp.lt.pw error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/cmp_lt_qh.c b/tests/tcg/mips/mips64-dsp/cmp_lt_qh.c
> new file mode 100644
> index 0000000..56fee15
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/cmp_lt_qh.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt, dspreg, dspresult;
> +
> +    rs = 0x123456789ABCDEF0;
> +    rt = 0x123456789ABCDEFF;
> +    dspresult = 0x01;
> +
> +    __asm
> +        ("cmp.lt.qh %1, %2\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(dspreg)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    dspreg = ((dspreg >> 24) & 0x0F);
> +
> +    if (dspreg != dspresult) {
> +        printf("cmp.lt.qh error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/cmpgu_eq_ob.c b/tests/tcg/mips/mips64-dsp/cmpgu_eq_ob.c
> new file mode 100644
> index 0000000..2232073
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/cmpgu_eq_ob.c
> @@ -0,0 +1,24 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, result;
> +
> +    rs = 0x123456789ABCDEF0;
> +    rt = 0x123456789ABCDEFF;
> +    result = 0xFE;
> +
> +    __asm
> +        ("cmpgu.eq.ob %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    if (rd != result) {
> +        printf("cmpgu.eq.ob error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/cmpgu_eq_qb.c b/tests/tcg/mips/mips64-dsp/cmpgu_eq_qb.c
> new file mode 100644
> index 0000000..b41c443
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/cmpgu_eq_qb.c
> @@ -0,0 +1,38 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt;
> +    long long result;
> +
> +    rs     = 0x11777066;
> +    rt     = 0x55AA70FF;
> +    result = 0x02;
> +    __asm
> +        ("cmpgu.eq.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    if (rd != result) {
> +        printf("cmpgu.eq.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    rs     = 0x11777066;
> +    rt     = 0x11777066;
> +    result = 0x0F;
> +    __asm
> +        ("cmpgu.eq.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if (rd != result) {
> +        printf("cmpgu.eq.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/cmpgu_le_ob.c b/tests/tcg/mips/mips64-dsp/cmpgu_le_ob.c
> new file mode 100644
> index 0000000..f28dceb
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/cmpgu_le_ob.c
> @@ -0,0 +1,24 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, result;
> +
> +    rs = 0x123456789ABCDEF0;
> +    rt = 0x123456789ABCDEFF;
> +    result = 0xFF;
> +
> +    __asm
> +        ("cmpgu.le.ob %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    if (rd != result) {
> +        printf("cmpgu.le.ob error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/cmpgu_le_qb.c b/tests/tcg/mips/mips64-dsp/cmpgu_le_qb.c
> new file mode 100644
> index 0000000..dd2b091
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/cmpgu_le_qb.c
> @@ -0,0 +1,37 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt;
> +    long long result;
> +
> +    rs     = 0x11777066;
> +    rt     = 0x55AA70FF;
> +    result = 0x0F;
> +    __asm
> +        ("cmpgu.le.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if (rd != result) {
> +        printf("cmpgu.le.qb wrong\n");
> +
> +        return -1;
> +    }
> +
> +    rs     = 0x11777066;
> +    rt     = 0x11766066;
> +    result = 0x09;
> +    __asm
> +        ("cmpgu.le.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if (rd != result) {
> +        printf("cmpgu.le.qb wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/cmpgu_lt_ob.c b/tests/tcg/mips/mips64-dsp/cmpgu_lt_ob.c
> new file mode 100644
> index 0000000..aa335ac
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/cmpgu_lt_ob.c
> @@ -0,0 +1,24 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, result;
> +
> +    rs = 0x123456789ABCDEF0;
> +    rt = 0x123456789ABCDEFF;
> +    result = 0x01;
> +
> +    __asm
> +        ("cmpgu.lt.ob %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    if (rd != result) {
> +        printf("cmpgu.lt.ob error\n");
> +
> +        return -1;
> +    }
> +
> +   return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/cmpgu_lt_qb.c b/tests/tcg/mips/mips64-dsp/cmpgu_lt_qb.c
> new file mode 100644
> index 0000000..a467cb7
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/cmpgu_lt_qb.c
> @@ -0,0 +1,38 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt;
> +    long long result;
> +
> +    rs     = 0x11777066;
> +    rt     = 0x55AA70FF;
> +    result = 0x0D;
> +    __asm
> +        ("cmpgu.lt.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    if (rd != result) {
> +        printf("cmpgu.lt.qb wrong\n");
> +
> +        return -1;
> +    }
> +
> +    rs     = 0x11777066;
> +    rt     = 0x11766066;
> +    result = 0x00;
> +    __asm
> +        ("cmpgu.lt.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if (rd != result) {
> +        printf("cmpgu.lt.qb wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/cmpu_eq_ob.c b/tests/tcg/mips/mips64-dsp/cmpu_eq_ob.c
> new file mode 100644
> index 0000000..a2b5681
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/cmpu_eq_ob.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, dspreg, dspresult;
> +
> +    rs = 0x123456789ABCDEF0;
> +    rt = 0x123456789ABCDEFF;
> +    dspresult = 0xFE;
> +
> +    __asm
> +        ("cmpu.eq.ob %1, %2\n\t"
> +         "rddsp %0"
> +         : "=r"(dspreg)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    dspreg = ((dspreg >> 24) & 0xFF);
> +
> +    if (dspreg != dspresult) {
> +        printf("cmpu.eq.ob error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/cmpu_eq_qb.c b/tests/tcg/mips/mips64-dsp/cmpu_eq_qb.c
> new file mode 100644
> index 0000000..28f3bec
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/cmpu_eq_qb.c
> @@ -0,0 +1,42 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt;
> +    long long dsp;
> +    long long result;
> +
> +    rs         = 0x11777066;
> +    rt         = 0x55AA70FF;
> +    result     = 0x02;
> +    __asm
> +        ("cmpu.eq.qb %1, %2\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 24) & 0x0F;
> +    if (dsp != result) {
> +        printf("cmpu.eq.qb wrong\n");
> +
> +        return -1;
> +    }
> +
> +    rs     = 0x11777066;
> +    rt     = 0x11777066;
> +    result = 0x0F;
> +    __asm
> +        ("cmpu.eq.qb %1, %2\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 24) & 0x0F;
> +    if (dsp != result) {
> +        printf("cmpu.eq.qb wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/cmpu_le_ob.c b/tests/tcg/mips/mips64-dsp/cmpu_le_ob.c
> new file mode 100644
> index 0000000..71845bc
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/cmpu_le_ob.c
> @@ -0,0 +1,26 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt, dspreg, dspresult;
> +
> +    rs = 0x123456789ABCDEF0;
> +    rt = 0x123456789ABCDEFF;
> +    dspresult = 0xFF;
> +
> +    __asm
> +        ("cmpu.le.ob %1, %2\n\t"
> +         "rddsp %0"
> +         : "=r"(dspreg)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    dspreg = dspreg >> 24;
> +    if (dspreg != dspresult) {
> +        printf("cmpu.le.ob error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/cmpu_le_qb.c b/tests/tcg/mips/mips64-dsp/cmpu_le_qb.c
> new file mode 100644
> index 0000000..8a17a08
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/cmpu_le_qb.c
> @@ -0,0 +1,41 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt;
> +    long long dsp;
> +    long long result;
> +
> +    rs         = 0x11777066;
> +    rt         = 0x55AA70FF;
> +    result     = 0x0F;
> +    __asm
> +        ("cmpu.le.qb %1, %2\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 24) & 0x0F;
> +    if (dsp != result) {
> +        printf("cmpu.le.qb wrong\n");
> +
> +        return -1;
> +    }
> +
> +    rs     = 0x11777066;
> +    rt     = 0x11777066;
> +    result = 0x0F;
> +    __asm
> +        ("cmpu.le.qb %1, %2\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 24) & 0x0F;
> +    if (dsp != result) {
> +        printf("cmpu.le.qb wrong\n");
> +
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/cmpu_lt_ob.c b/tests/tcg/mips/mips64-dsp/cmpu_lt_ob.c
> new file mode 100644
> index 0000000..832f6d3
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/cmpu_lt_ob.c
> @@ -0,0 +1,26 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt, dspreg, dspresult;
> +
> +    rs = 0x123456789ABCDEF0;
> +    rt = 0x123456789ABCDEFF;
> +    dspresult = 0x01;
> +
> +    __asm
> +        ("cmpu.lt.ob %1, %2\n\t"
> +         "rddsp %0"
> +         : "=r"(dspreg)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    dspreg = dspreg >> 24;
> +    if (dspreg != dspresult) {
> +        printf("cmpu.lt.ob error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/cmpu_lt_qb.c b/tests/tcg/mips/mips64-dsp/cmpu_lt_qb.c
> new file mode 100644
> index 0000000..adb75ee
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/cmpu_lt_qb.c
> @@ -0,0 +1,42 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt;
> +    long long dsp;
> +    long long result;
> +
> +    rs         = 0x11777066;
> +    rt         = 0x55AA70FF;
> +    result     = 0x0D;
> +    __asm
> +        ("cmpu.lt.qb %1, %2\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 24) & 0x0F;
> +    if (dsp != result) {
> +        printf("cmpu.lt.qb wrong\n");
> +
> +        return -1;
> +    }
> +
> +    rs     = 0x11777066;
> +    rt     = 0x11777066;
> +    result = 0x00;
> +    __asm
> +        ("cmpu.lt.qb %1, %2\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 24) & 0x0F;
> +    if (dsp != result) {
> +        printf("cmpu.lt.qb wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dappend.c b/tests/tcg/mips/mips64-dsp/dappend.c
> new file mode 100644
> index 0000000..ba8e121
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dappend.c
> @@ -0,0 +1,37 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs;
> +    long long res;
> +    rt = 0x1234567887654321;
> +    rs = 0xabcd1234abcd8765;
> +
> +    res = 0x1234567887654321;
> +    __asm
> +        ("dappend %0, %1, 0x0\n\t"
> +         : "=r"(rt)
> +         : "r"(rs)
> +        );
> +
> +    if (rt != res) {
> +        printf("dappend error\n");
> +        return -1;
> +    }
> +
> +    rt = 0x1234567887654321;
> +    rs = 0xabcd1234abcd8765;
> +
> +    res = 0x2345678876543215;
> +    __asm
> +        ("dappend %0, %1, 0x4\n\t"
> +         : "=r"(rt)
> +         : "r"(rs)
> +        );
> +
> +    if (rt != res) {
> +        printf("dappend error\n");
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dextp.c b/tests/tcg/mips/mips64-dsp/dextp.c
> new file mode 100644
> index 0000000..794ad48
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dextp.c
> @@ -0,0 +1,33 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, dsp;
> +    long long achi, acli;
> +    long long res, resdsp;
> +    int rs;
> +    rs = 0xabcd1234;
> +
> +    achi = 0x12345678;
> +    acli = 0x87654321;
> +    res = 0xff;
> +    resdsp = 0x0;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "wrdsp %4, 0x1\n\t"
> +         "wrdsp %4\n\t"
> +         "dextp %0, $ac1, 0x7\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "=r"(dsp)
> +         : "r"(achi), "r"(acli), "r"(rs)
> +        );
> +    dsp = (dsp >> 14) & 0x1;
> +    if ((dsp != resdsp) || (rt != res)) {
> +        printf("dextp error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dextpdp.c b/tests/tcg/mips/mips64-dsp/dextpdp.c
> new file mode 100644
> index 0000000..a0cb069
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dextpdp.c
> @@ -0,0 +1,37 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, dsp;
> +    long long achi, acli;
> +    long long res, resdsp, resdsppos;
> +    int rs;
> +    int tmp1, tmp2;
> +    rs = 0xabcd1234;
> +
> +    achi = 0x12345678;
> +    acli = 0x87654321;
> +    res = 0xff;
> +    resdsp = 0x0;
> +    resdsppos = 0x2c;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "wrdsp %4, 0x1\n\t"
> +         "wrdsp %4\n\t"
> +         "dextpdp %0, $ac1, 0x7\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "=r"(dsp)
> +         : "r"(achi), "r"(acli), "r"(rs)
> +        );
> +    tmp1 = (dsp >> 14) & 0x1;
> +    tmp2 = dsp & 0x3f;
> +
> +    if ((tmp1 != resdsp) || (rt != res) || (tmp2 != resdsppos)) {
> +        printf("dextpdp error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dextpdpv.c b/tests/tcg/mips/mips64-dsp/dextpdpv.c
> new file mode 100644
> index 0000000..70b3ed8
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dextpdpv.c
> @@ -0,0 +1,38 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs, dsp;
> +    long long achi, acli;
> +    long long res, resdsp, resdsppos;
> +    int rsdsp;
> +    int tmp1, tmp2;
> +    rsdsp = 0xabcd1234;
> +    rs = 0x7;
> +    achi = 0x12345678;
> +    acli = 0x87654321;
> +    res = 0xff;
> +    resdsp = 0x0;
> +    resdsppos = 0x2c;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "wrdsp %4, 0x1\n\t"
> +         "wrdsp %4\n\t"
> +         "dextpdpv %0, $ac1, %5\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "=r"(dsp)
> +         : "r"(achi), "r"(acli), "r"(rsdsp), "r"(rs)
> +        );
> +
> +    tmp1 = (dsp >> 14) & 0x1;
> +    tmp2 = dsp & 0x3f;
> +
> +    if ((tmp1 != resdsp) || (rt != res) || (tmp2 != resdsppos)) {
> +        printf("dextpdpv error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dextpv.c b/tests/tcg/mips/mips64-dsp/dextpv.c
> new file mode 100644
> index 0000000..78b6aec
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dextpv.c
> @@ -0,0 +1,34 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs, dsp;
> +    long long achi, acli;
> +    long long res, resdsp;
> +    int rsdsp;
> +    rsdsp = 0xabcd1234;
> +    rs = 0x7;
> +
> +    achi = 0x12345678;
> +    acli = 0x87654321;
> +    res = 0xff;
> +    resdsp = 0x0;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "wrdsp %4, 0x1\n\t"
> +         "wrdsp %4\n\t"
> +         "dextpv %0, $ac1, %5\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "=r"(dsp)
> +         : "r"(achi), "r"(acli), "r"(rsdsp), "r"(rs)
> +        );
> +    dsp = (dsp >> 14) & 0x1;
> +    if ((dsp != resdsp) || (rt != res)) {
> +        printf("dextpv error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dextr_l.c b/tests/tcg/mips/mips64-dsp/dextr_l.c
> new file mode 100644
> index 0000000..dd0565f
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dextr_l.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt;
> +    long long achi, acli;
> +    long long res;
> +
> +    achi = 0x87654321;
> +    acli = 0x12345678;
> +
> +    res = 0x2100000000123456;
> +
> +    __asm
> +        ("mthi %1, $ac1\n\t"
> +         "mtlo %2, $ac1\n\t"
> +         "dextr.l %0, $ac1, 0x8\n\t"
> +         : "=r"(rt)
> +         : "r"(achi), "r"(acli)
> +        );
> +    if (rt != res) {
> +        printf("dextr.l error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dextr_r_l.c b/tests/tcg/mips/mips64-dsp/dextr_r_l.c
> new file mode 100644
> index 0000000..ab3c351
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dextr_r_l.c
> @@ -0,0 +1,32 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, dsp;
> +    long long achi, acli;
> +    long long res, resdsp;
> +
> +    achi = 0x87654321;
> +    acli = 0x12345678;
> +
> +    res = 0x2100000000123456;
> +    resdsp = 0x01;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "dextr_r.l %0, $ac1, 0x8\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "=r"(dsp)
> +         : "r"(achi), "r"(acli)
> +        );
> +
> +    dsp = (dsp >> 23) & 0x1;
> +
> +    if ((dsp != resdsp) || (rt != res)) {
> +        printf("dextr_r.l error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dextr_r_w.c b/tests/tcg/mips/mips64-dsp/dextr_r_w.c
> new file mode 100644
> index 0000000..e4a2072
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dextr_r_w.c
> @@ -0,0 +1,32 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, dsp;
> +    long long achi, acli;
> +    long long res, resdsp;
> +
> +    achi = 0x87654321;
> +    acli = 0x12345678;
> +
> +    res = 0x123456;
> +    resdsp = 0x01;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "dextr_r.w %0, $ac1, 0x8\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "=r"(dsp)
> +         : "r"(achi), "r"(acli)
> +        );
> +
> +    dsp = (dsp >> 23) & 0x1;
> +
> +    if ((dsp != resdsp) || (rt != res)) {
> +        printf("dextr_r.w error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dextr_rs_l.c b/tests/tcg/mips/mips64-dsp/dextr_rs_l.c
> new file mode 100644
> index 0000000..fbe021d
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dextr_rs_l.c
> @@ -0,0 +1,31 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, dsp;
> +    long long achi, acli;
> +    long long res, resdsp;
> +
> +    achi = 0x87654321;
> +    acli = 0x12345678;
> +
> +    res = 0x8000000000000000;
> +    resdsp = 0x1;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "dextr_rs.l %0, $ac1, 0x8\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "=r"(dsp)
> +         : "r"(achi), "r"(acli)
> +        );
> +    dsp = (dsp >> 23) & 0x1;
> +
> +    if ((dsp != resdsp) || (rt != res)) {
> +        printf("dextr_rs.l error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dextr_rs_w.c b/tests/tcg/mips/mips64-dsp/dextr_rs_w.c
> new file mode 100644
> index 0000000..c97e2e5
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dextr_rs_w.c
> @@ -0,0 +1,31 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, dsp;
> +    long long achi, acli;
> +    long long res, resdsp;
> +
> +    achi = 0x87654321;
> +    acli = 0x12345678;
> +
> +    res = 0xffffffff80000000;
> +    resdsp = 0x1;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "dextr_rs.w %0, $ac1, 0x8\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "=r"(dsp)
> +         : "r"(achi), "r"(acli)
> +        );
> +    dsp = (dsp >> 23) & 0x1;
> +
> +    if ((dsp != resdsp) || (rt != res)) {
> +        printf("dextr_rs.w error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dextr_s_h.c b/tests/tcg/mips/mips64-dsp/dextr_s_h.c
> new file mode 100644
> index 0000000..a664b73
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dextr_s_h.c
> @@ -0,0 +1,31 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, dsp;
> +    long long achi, acli;
> +    long long res, resdsp;
> +
> +    achi = 0x87654321;
> +    acli = 0x12345678;
> +
> +    res = 0xffffffffffff8000;
> +    resdsp = 0x1;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "dextr_s.h %0, $ac1, 0x8\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "=r"(dsp)
> +         : "r"(achi), "r"(acli)
> +        );
> +    dsp = (dsp >> 23) & 0x1;
> +
> +    if ((dsp != resdsp) || (rt != res)) {
> +        printf("dextr_s.h error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dextr_w.c b/tests/tcg/mips/mips64-dsp/dextr_w.c
> new file mode 100644
> index 0000000..654dfaf
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dextr_w.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt;
> +    long long achi, acli;
> +    long long res;
> +
> +    achi = 0x87654321;
> +    acli = 0x12345678;
> +
> +    res = 0x123456;
> +
> +    __asm
> +        ("mthi %1, $ac1\n\t"
> +         "mtlo %2, $ac1\n\t"
> +         "dextr.w %0, $ac1, 0x8\n\t"
> +         : "=r"(rt)
> +         : "r"(achi), "r"(acli)
> +        );
> +    if (rt != res) {
> +        printf("dextr.w error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dextrv_l.c b/tests/tcg/mips/mips64-dsp/dextrv_l.c
> new file mode 100644
> index 0000000..44b0160
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dextrv_l.c
> @@ -0,0 +1,28 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs;
> +    long long achi, acli;
> +    long long res;
> +
> +    achi = 0x87654321;
> +    acli = 0x12345678;
> +    rs = 0x8;
> +
> +    res = 0x2100000000123456;
> +
> +    __asm
> +        ("mthi %1, $ac1\n\t"
> +         "mtlo %2, $ac1\n\t"
> +         "dextrv.l %0, $ac1, %3\n\t"
> +         : "=r"(rt)
> +         : "r"(achi), "r"(acli), "r"(rs)
> +        );
> +    if (rt != res) {
> +        printf("dextrv.l error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dextrv_r_l.c b/tests/tcg/mips/mips64-dsp/dextrv_r_l.c
> new file mode 100644
> index 0000000..c5b3850
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dextrv_r_l.c
> @@ -0,0 +1,33 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, dsp, rs;
> +    long long achi, acli;
> +    long long res, resdsp;
> +
> +    achi = 0x87654321;
> +    acli = 0x12345678;
> +    rs = 0x8;
> +
> +    res = 0x2100000000123456;
> +    resdsp = 0x01;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "dextrv_r.l %0, $ac1, %4\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "=r"(dsp)
> +         : "r"(achi), "r"(acli), "r"(rs)
> +        );
> +
> +    dsp = (dsp >> 23) & 0x1;
> +
> +    if ((dsp != resdsp) || (rt != res)) {
> +        printf("dextrv_r.l error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dextrv_r_w.c b/tests/tcg/mips/mips64-dsp/dextrv_r_w.c
> new file mode 100644
> index 0000000..7cefdab
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dextrv_r_w.c
> @@ -0,0 +1,33 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs, dsp;
> +    long long achi, acli;
> +    long long res, resdsp;
> +
> +    achi = 0x87654321;
> +    acli = 0x12345678;
> +    rs = 0x8;
> +
> +    res = 0x123456;
> +    resdsp = 0x01;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "dextrv_r.w %0, $ac1, %4\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "=r"(dsp)
> +         : "r"(achi), "r"(acli), "r"(rs)
> +        );
> +
> +    dsp = (dsp >> 23) & 0x1;
> +
> +    if ((dsp != resdsp) || (rt != res)) {
> +        printf("dextrv_r.w error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dextrv_rs_l.c b/tests/tcg/mips/mips64-dsp/dextrv_rs_l.c
> new file mode 100644
> index 0000000..6a2594f
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dextrv_rs_l.c
> @@ -0,0 +1,32 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs, dsp;
> +    long long achi, acli;
> +    long long res, resdsp;
> +
> +    achi = 0x87654321;
> +    acli = 0x12345678;
> +    rs = 0x8;
> +
> +    res = 0x8000000000000000;
> +    resdsp = 0x1;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "dextrv_rs.l %0, $ac1, %4\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "=r"(dsp)
> +         : "r"(achi), "r"(acli), "r"(rs)
> +        );
> +    dsp = (dsp >> 23) & 0x1;
> +
> +    if ((dsp != resdsp) || (rt != res)) {
> +        printf("dextrv_rs.l error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dextrv_rs_w.c b/tests/tcg/mips/mips64-dsp/dextrv_rs_w.c
> new file mode 100644
> index 0000000..9f8a9b3
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dextrv_rs_w.c
> @@ -0,0 +1,32 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs, dsp;
> +    long long achi, acli;
> +    long long res, resdsp;
> +
> +    achi = 0x87654321;
> +    acli = 0x12345678;
> +    rs = 0x8;
> +
> +    res = 0xffffffff80000000;
> +    resdsp = 0x1;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "dextrv_rs.w %0, $ac1, %4\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "=r"(dsp)
> +         : "r"(achi), "r"(acli), "r"(rs)
> +        );
> +    dsp = (dsp >> 23) & 0x1;
> +
> +    if ((dsp != resdsp) || (rt != res)) {
> +        printf("dextrv_rs.w error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dextrv_s_h.c b/tests/tcg/mips/mips64-dsp/dextrv_s_h.c
> new file mode 100644
> index 0000000..87d3aee
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dextrv_s_h.c
> @@ -0,0 +1,32 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs, dsp;
> +    long long achi, acli;
> +    long long res, resdsp;
> +
> +    achi = 0x87654321;
> +    acli = 0x12345678;
> +    rs = 0x8;
> +
> +    res = 0xffffffffffff8000;
> +    resdsp = 0x1;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "dextrv_s.h %0, $ac1, %4\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "=r"(dsp)
> +         : "r"(achi), "r"(acli), "r"(rs)
> +        );
> +    dsp = (dsp >> 23) & 0x1;
> +
> +    if ((dsp != resdsp) || (rt != res)) {
> +        printf("dextrv_s.h error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dextrv_w.c b/tests/tcg/mips/mips64-dsp/dextrv_w.c
> new file mode 100644
> index 0000000..4028a7a
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dextrv_w.c
> @@ -0,0 +1,28 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs;
> +    long long achi, acli;
> +    long long res;
> +
> +    achi = 0x87654321;
> +    acli = 0x12345678;
> +    rs = 0x8;
> +
> +    res = 0x123456;
> +
> +    __asm
> +        ("mthi %1, $ac1\n\t"
> +         "mtlo %2, $ac1\n\t"
> +         "dextrv.w %0, $ac1, %3\n\t"
> +         : "=r"(rt)
> +         : "r"(achi), "r"(acli), "r"(rs)
> +        );
> +    if (rt != res) {
> +        printf("dextrv.w error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dinsv.c b/tests/tcg/mips/mips64-dsp/dinsv.c
> new file mode 100644
> index 0000000..25152c0
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dinsv.c
> @@ -0,0 +1,25 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt, dsp;
> +    long long res;
> +
> +    rs = 0x1234567887654321;
> +    rt = 0x1234567812345678;
> +    dsp = 0x2222;
> +    res = 0x1234567812345678;
> +    __asm
> +        ("wrdsp  %1, 0x3\n\t"
> +         "wrdsp %1\n\t"
> +         "dinsv %0, %2\n\t"
> +         : "+r"(rt)
> +         : "r"(dsp), "r"(rs)
> +        );
> +
> +    if (rt != res) {
> +        printf("dinsv error\n");
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dmadd.c b/tests/tcg/mips/mips64-dsp/dmadd.c
> new file mode 100644
> index 0000000..fb22614
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dmadd.c
> @@ -0,0 +1,57 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs;
> +    long long achi, acli;
> +    long long acho, aclo;
> +    long long resh, resl;
> +
> +    achi = 0x1;
> +    acli = 0x1;
> +
> +    rs = 0x0000000100000001;
> +    rt = 0x0000000200000002;
> +
> +    resh = 0x1;
> +    resl = 0x5;
> +    __asm
> +       ("mthi %2, $ac1 \t\n"
> +        "mtlo %3, $ac1 \t\n"
> +        "dmadd $ac1, %4, %5\t\n"
> +        "mfhi %0, $ac1 \t\n"
> +        "mflo %1, $ac1 \t\n"
> +        : "=r"(acho), "=r"(aclo)
> +        : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +      );
> +    if ((acho != resh) || (aclo != resl)) {
> +        printf("1 dmadd error\n");
> +
> +        return -1;
> +    }
> +
> +    achi = 0x1;
> +    acli = 0x1;
> +
> +    rs = 0xaaaabbbbccccdddd;
> +    rt = 0xaaaabbbbccccdddd;
> +
> +    resh = 0x0000000000000000;
> +    resl = 0xffffffffca860b63;
> +
> +    __asm
> +       ("mthi %2, $ac1 \t\n"
> +        "mtlo %3, $ac1 \t\n"
> +        "dmadd $ac1, %4, %5\t\n"
> +        "mfhi %0, $ac1 \t\n"
> +        "mflo %1, $ac1 \t\n"
> +        : "=r"(acho), "=r"(aclo)
> +        : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +      );
> +    if ((acho != resh) || (aclo != resl)) {
> +        printf("2 dmadd error\n");
> +
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dmaddu.c b/tests/tcg/mips/mips64-dsp/dmaddu.c
> new file mode 100644
> index 0000000..39ab0c1
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dmaddu.c
> @@ -0,0 +1,56 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs;
> +    long long achi, acli;
> +    long long acho, aclo;
> +    long long resh, resl;
> +    achi = 0x1;
> +    acli = 0x2;
> +
> +    rs = 0x0000000200000002;
> +    rt = 0x0000000200000002;
> +    resh = 0x1;
> +    resl = 0xa;
> +    __asm
> +        ("mthi %2, $ac1 \t\n"
> +         "mtlo %3, $ac1 \t\n"
> +         "dmaddu $ac1, %4, %5\t\n"
> +         "mfhi %0, $ac1 \t\n"
> +         "mflo %1, $ac1 \t\n"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +    if ((acho != resh) || (aclo != resl)) {
> +        printf("1 dmaddu error\n");
> +
> +        return -1;
> +    }
> +
> +    achi = 0x1;
> +    acli = 0x1;
> +
> +    rs = 0xaaaabbbbccccdddd;
> +    rt = 0xaaaabbbbccccdddd;
> +
> +    resh = 0x0000000000000002;
> +    resl = 0xffffffffca860b63;
> +
> +    __asm
> +        ("mthi %2, $ac1 \t\n"
> +         "mtlo %3, $ac1 \t\n"
> +         "dmaddu $ac1, %4, %5\t\n"
> +         "mfhi %0, $ac1 \t\n"
> +         "mflo %1, $ac1 \t\n"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +    if ((acho != resh) || (aclo != resl)) {
> +        printf("2 dmaddu error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dmsub.c b/tests/tcg/mips/mips64-dsp/dmsub.c
> new file mode 100644
> index 0000000..16be617
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dmsub.c
> @@ -0,0 +1,59 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs;
> +    long long achi, acli;
> +    long long acho, aclo;
> +    long long resh, resl;
> +    achi = 0x1;
> +    acli = 0x8;
> +
> +    rs = 0x0000000100000001;
> +    rt = 0x0000000200000002;
> +
> +    resh = 0x1;
> +    resl = 0x4;
> +
> +    __asm
> +        ("mthi %2, $ac1 \t\n"
> +         "mtlo %3, $ac1 \t\n"
> +         "dmsub $ac1, %4, %5\t\n"
> +         "mfhi %0, $ac1 \t\n"
> +         "mflo %1, $ac1 \t\n"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +    if ((acho != resh) || (aclo != resl)) {
> +        printf("1 dmsub error\n");
> +
> +        return -1;
> +    }
> +
> +    achi = 0xfffffffF;
> +    acli = 0xfffffffF;
> +
> +    rs = 0x8888999977776666;
> +    rt = 0x9999888877776666;
> +
> +    resh = 0xffffffffffffffff;
> +    resl = 0x789aae13;
> +
> +    __asm
> +        ("mthi %2, $ac1 \t\n"
> +         "mtlo %3, $ac1 \t\n"
> +         "dmsub $ac1, %4, %5\t\n"
> +         "mfhi %0, $ac1 \t\n"
> +         "mflo %1, $ac1 \t\n"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +
> +    if ((acho != resh) || (aclo != resl)) {
> +        printf("2 dmsub error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dmsubu.c b/tests/tcg/mips/mips64-dsp/dmsubu.c
> new file mode 100644
> index 0000000..cc4838a
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dmsubu.c
> @@ -0,0 +1,59 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs;
> +    long long achi, acli;
> +    long long acho, aclo;
> +    long long resh, resl;
> +    achi = 0x1;
> +    acli = 0x8;
> +
> +    rs = 0x0000000100000001;
> +    rt = 0x0000000200000002;
> +
> +    resh = 0x1;
> +    resl = 0x4;
> +
> +    __asm
> +        ("mthi %2, $ac1 \t\n"
> +         "mtlo %3, $ac1 \t\n"
> +         "dmsubu $ac1, %4, %5\t\n"
> +         "mfhi %0, $ac1 \t\n"
> +         "mflo %1, $ac1 \t\n"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +    if ((acho != resh) || (aclo != resl)) {
> +        printf("1 dmsubu error\n");
> +
> +        return -1;
> +    }
> +
> +    achi = 0xfffffffF;
> +    acli = 0xfffffffF;
> +
> +    rs = 0x8888999977776666;
> +    rt = 0x9999888877776666;
> +
> +    resh = 0xffffffffffffffff;
> +    resl = 0x789aae13;
> +
> +    __asm
> +        ("mthi %2, $ac1 \t\n"
> +         "mtlo %3, $ac1 \t\n"
> +         "dmsubu $ac1, %4, %5\t\n"
> +         "mfhi %0, $ac1 \t\n"
> +         "mflo %1, $ac1 \t\n"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +
> +    if ((acho != resh) || (aclo != resl)) {
> +        printf("2 dmsubu error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dmthlip.c b/tests/tcg/mips/mips64-dsp/dmthlip.c
> new file mode 100644
> index 0000000..4a001f2
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dmthlip.c
> @@ -0,0 +1,32 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, dsp;
> +    long long achi, acli;
> +    long long res, rsdsp;
> +
> +
> +    rs = 0xaaaabbbbccccdddd;
> +    achi = 0x87654321;
> +    acli = 0x12345678;
> +    dsp = 0x22;
> +
> +    res = 0x62;
> +
> +    __asm
> +        ("mthi %1, $ac1\n\t"
> +         "mtlo %2, $ac1\n\t"
> +         "wrdsp %3\n\t"
> +         "dmthlip %4, $ac1\n\t"
> +         "rddsp %0\n\t"
> +         : "=r"(rsdsp)
> +         : "r"(achi), "r"(acli), "r"(dsp), "r"(rs)
> +        );
> +    if (rsdsp != res) {
> +        printf("dmthlip error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dpaq_s_w_ph.c b/tests/tcg/mips/mips64-dsp/dpaq_s_w_ph.c
> new file mode 100644
> index 0000000..1bca935
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dpaq_s_w_ph.c
> @@ -0,0 +1,32 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt, dsp;
> +    long long ach = 0, acl = 0;
> +    long long resulth, resultl, resultdsp;
> +
> +    rs        = 0x800000FF;
> +    rt        = 0x80000002;
> +    resulth   = 0x00;
> +    resultl   = 0xFFFFFFFF800003FB;
> +    resultdsp = 0x01;
> +    __asm
> +        ("mthi        %0, $ac1\n\t"
> +         "mtlo        %1, $ac1\n\t"
> +         "dpaq_s.w.ph $ac1, %3, %4\n\t"
> +         "mfhi        %0,   $ac1\n\t"
> +         "mflo        %1,   $ac1\n\t"
> +         "rddsp       %2\n\t"
> +         : "+r"(ach), "+r"(acl), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = dsp >> 17 & 0x01;
> +    if ((dsp != resultdsp) || (ach != resulth) || (acl != resultl)) {
> +        printf("dpaq_w.w.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dpaq_s_w_qh.c b/tests/tcg/mips/mips64-dsp/dpaq_s_w_qh.c
> new file mode 100644
> index 0000000..94fc8c1
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dpaq_s_w_qh.c
> @@ -0,0 +1,57 @@
> +#include"io.h"
> +int main(void)
> +{
> +    long long rt, rs;
> +    long long achi, acli;
> +    long long acho, aclo;
> +    long long resh, resl;
> +
> +    achi = 0x1;
> +    acli = 0x1;
> +    rs = 0x0001000100010001;
> +    rt = 0x0002000200020002;
> +    resh = 0x1;
> +    resl = 0x11;
> +
> +    __asm
> +        ("mthi %2, $ac1\t\n"
> +         "mtlo %3, $ac1\t\n"
> +         "dpaq_s.w.qh $ac1, %4, %5\t\n"
> +         "mfhi %0, $ac1\t\n"
> +         "mflo %1, $ac1\t\n"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +    if ((acho != resh) || (aclo != resl)) {
> +        printf("1 dpaq_s.w.qh error\n");
> +
> +        return -1;
> +    }
> +
> +    achi = 0xffffffff;
> +    acli = 0xaaaaaaaa;
> +
> +    rs = 0x1111222233334444;
> +    rt = 0xffffeeeeddddcccc;
> +
> +    resh = 0xffffffffffffffff;
> +    resl = 0xffffffffd27ad82e;
> +
> +    __asm
> +        ("mthi %2, $ac1\t\n"
> +         "mtlo %3, $ac1\t\n"
> +         "dpaq_s.w.qh $ac1, %4, %5\t\n"
> +         "mfhi %0, $ac1\t\n"
> +         "mflo %1, $ac1\t\n"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +
> +    if ((acho != resh) || (aclo != resl)) {
> +        printf("2 dpaq_s.w.qh error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dpaq_sa_l_pw.c b/tests/tcg/mips/mips64-dsp/dpaq_sa_l_pw.c
> new file mode 100644
> index 0000000..8789e84
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dpaq_sa_l_pw.c
> @@ -0,0 +1,62 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt;
> +    long long achi, acli;
> +    long long acho, aclo;
> +    long long dsp;
> +    long long resh, resl;
> +    long long resdsp;
> +
> +    rs = 0x0000000100000001;
> +    rt = 0x0000000200000002;
> +    achi = 0x1;
> +    acli = 0x1;
> +    resh = 0x1;
> +    resl = 0x9;
> +    resdsp = 0x00;
> +
> +    __asm
> +        ("mthi        %3, $ac1\n\t"
> +         "mtlo        %4, $ac1\n\t"
> +         "dpaq_sa.l.pw $ac1, %5, %6\n\t"
> +         "mfhi        %0,   $ac1\n\t"
> +         "mflo        %1,   $ac1\n\t"
> +         "rddsp       %2\n\t"
> +         : "=r"(acho), "=r"(aclo), "=r"(dsp)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +
> +    if ((acho != resh) || (aclo != resl) || ((dsp >> (16 + 1)) != resdsp)) {
> +        printf("1 dpaq_sa_l_pw error\n");
> +
> +        return -1;
> +    }
> +
> +    rs = 0xaaaabbbbccccdddd;
> +    rt = 0x3333444455556666;
> +    achi = 0x88888888;
> +    acli = 0x66666666;
> +
> +    resh = 0xffffffff88888887;
> +    resl = 0xffffffff9e2661da;
> +
> +    __asm
> +        ("mthi        %2, $ac1\n\t"
> +         "mtlo        %3, $ac1\n\t"
> +         "dpaq_sa.l.pw $ac1, %4, %5\n\t"
> +         "mfhi        %0,   $ac1\n\t"
> +         "mflo        %1,   $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +
> +    if ((acho != resh) || (aclo != resl)) {
> +        printf("1 dpaq_sa_l_pw error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dpaq_sa_l_w.c b/tests/tcg/mips/mips64-dsp/dpaq_sa_l_w.c
> new file mode 100644
> index 0000000..54490f2
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dpaq_sa_l_w.c
> @@ -0,0 +1,32 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt, dsp;
> +    long long ach = 0, acl = 0;
> +    long long resulth, resultl, resultdsp;
> +
> +    rs        = 0x800000FF;
> +    rt        = 0x80000002;
> +    resulth   = 0x7FFFFFFF;
> +    resultl   = 0xFFFFFFFFFFFFFFFF;
> +    resultdsp = 0x01;
> +    __asm
> +        ("mthi        %0, $ac1\n\t"
> +         "mtlo        %0, $ac1\n\t"
> +         "dpaq_sa.l.w $ac1, %3, %4\n\t"
> +         "mfhi        %0,   $ac1\n\t"
> +         "mflo        %1,   $ac1\n\t"
> +         "rddsp       %2\n\t"
> +         : "+r"(ach), "+r"(acl), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 17) & 0x01;
> +    if ((dsp != resultdsp) || (ach != resulth) || (acl != resultl)) {
> +        printf("dpaq_sa.l.w wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dpau_h_obl.c b/tests/tcg/mips/mips64-dsp/dpau_h_obl.c
> new file mode 100644
> index 0000000..54905e8
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dpau_h_obl.c
> @@ -0,0 +1,59 @@
> +
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt;
> +    long long achi, acli;
> +    long long acho, aclo;
> +    long long resh, resl;
> +
> +    rs = 0x0000000100000001;
> +    rt = 0x0000000200000002;
> +    achi = 0x1;
> +    acli = 0x1;
> +    resh = 0x1;
> +    resl = 0x3;
> +
> +    __asm
> +        ("mthi        %2, $ac1\n\t"
> +         "mtlo        %3, $ac1\n\t"
> +         "dpau.h.obl $ac1, %4, %5\n\t"
> +         "mfhi        %0,   $ac1\n\t"
> +         "mflo        %1,   $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +
> +    if ((acho != resh) || (aclo != resl)) {
> +        printf("1 dpau.h.obl error\n");
> +
> +        return -1;
> +    }
> +
> +    rs = 0xaaaabbbbccccdddd;
> +    rt = 0x3333444455556666;
> +    achi = 0x88888888;
> +    acli = 0x66666666;
> +
> +    resh = 0xffffffff88888888;
> +    resl = 0x66670d7a;
> +
> +    __asm
> +        ("mthi        %2, $ac1\n\t"
> +         "mtlo        %3, $ac1\n\t"
> +         "dpau.h.obl $ac1, %4, %5\n\t"
> +         "mfhi        %0,   $ac1\n\t"
> +         "mflo        %1,   $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +
> +    if ((acho != resh) || (aclo != resl)) {
> +        printf("1 dpau.h.obl error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dpau_h_obr.c b/tests/tcg/mips/mips64-dsp/dpau_h_obr.c
> new file mode 100644
> index 0000000..d7aa60b
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dpau_h_obr.c
> @@ -0,0 +1,59 @@
> +
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt;
> +    long long achi, acli;
> +    long long acho, aclo;
> +    long long resh, resl;
> +
> +    rs = 0x0000000100000001;
> +    rt = 0x0000000200000002;
> +    achi = 0x1;
> +    acli = 0x1;
> +    resh = 0x1;
> +    resl = 0x3;
> +
> +    __asm
> +        ("mthi        %2, $ac1\n\t"
> +         "mtlo        %3, $ac1\n\t"
> +         "dpau.h.obr $ac1, %4, %5\n\t"
> +         "mfhi        %0,   $ac1\n\t"
> +         "mflo        %1,   $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +
> +    if ((acho != resh) || (aclo != resl)) {
> +        printf("1 dpau.h.obr error\n");
> +
> +        return -1;
> +    }
> +
> +    rs = 0xccccddddaaaabbbb;
> +    rt = 0x5555666633334444;
> +    achi = 0x88888888;
> +    acli = 0x66666666;
> +
> +    resh = 0xffffffff88888888;
> +    resl = 0x66670d7a;
> +
> +    __asm
> +        ("mthi        %2, $ac1\n\t"
> +         "mtlo        %3, $ac1\n\t"
> +         "dpau.h.obr $ac1, %4, %5\n\t"
> +         "mfhi        %0,   $ac1\n\t"
> +         "mflo        %1,   $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +
> +    if ((acho != resh) || (aclo != resl)) {
> +        printf("1 dpau.h.obr error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dpau_h_qbl.c b/tests/tcg/mips/mips64-dsp/dpau_h_qbl.c
> new file mode 100644
> index 0000000..fcfd764
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dpau_h_qbl.c
> @@ -0,0 +1,29 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt;
> +    long long ach = 5, acl = 3;
> +    long long resulth, resultl;
> +
> +    rs        = 0x800000FF;
> +    rt        = 0x80000002;
> +    resulth   = 0x05;
> +    resultl   = 0x4003;
> +    __asm
> +        ("mthi       %0, $ac1\n\t"
> +         "mtlo       %1, $ac1\n\t"
> +         "dpau.h.qbl $ac1, %2, %3\n\t"
> +         "mfhi       %0,   $ac1\n\t"
> +         "mflo       %1,   $ac1\n\t"
> +         : "+r"(ach), "+r"(acl)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if ((ach != resulth) || (acl != resultl)) {
> +        printf("dpau.h.qbl wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dpau_h_qbr.c b/tests/tcg/mips/mips64-dsp/dpau_h_qbr.c
> new file mode 100644
> index 0000000..3282461
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dpau_h_qbr.c
> @@ -0,0 +1,29 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt;
> +    long long ach = 5, acl = 3;
> +    long long resulth, resultl;
> +
> +    rs        = 0x800000FF;
> +    rt        = 0x80000002;
> +    resulth   = 0x05;
> +    resultl   = 0x0201;
> +    __asm
> +        ("mthi       %0, $ac1\n\t"
> +         "mtlo       %1, $ac1\n\t"
> +         "dpau.h.qbr $ac1, %2, %3\n\t"
> +         "mfhi       %0,   $ac1\n\t"
> +         "mflo       %1,   $ac1\n\t"
> +         : "+r"(ach), "+r"(acl)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if ((ach != resulth) || (acl != resultl)) {
> +        printf("dpau.h.qbr wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dpsq_s_w_ph.c b/tests/tcg/mips/mips64-dsp/dpsq_s_w_ph.c
> new file mode 100644
> index 0000000..c8a414b
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dpsq_s_w_ph.c
> @@ -0,0 +1,29 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt;
> +    long long ach = 5, acl = 5;
> +    long long resulth, resultl;
> +
> +    rs      = 0xBC0123AD;
> +    rt      = 0x01643721;
> +    resulth = 0x04;
> +    resultl = 0xFFFFFFFFEE9794A3;
> +    __asm
> +        ("mthi  %0, $ac1\n\t"
> +         "mtlo  %1, $ac1\n\t"
> +         "dpsq_s.w.ph $ac1, %2, %3\n\t"
> +         "mfhi  %0, $ac1\n\t"
> +         "mflo  %1, $ac1\n\t"
> +         : "+r"(ach), "+r"(acl)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if ((ach != resulth) || (acl != resultl)) {
> +        printf("dpsq_s.w.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dpsq_s_w_qh.c b/tests/tcg/mips/mips64-dsp/dpsq_s_w_qh.c
> new file mode 100644
> index 0000000..8fd5e25
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dpsq_s_w_qh.c
> @@ -0,0 +1,33 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt;
> +    long long achi, acli;
> +    long long acho, aclo;
> +    long long resh, resl;
> +
> +    rs      = 0xffffeeeeddddcccc;
> +    rt      = 0x9999888877776666;
> +    achi = 0x67576;
> +    acli = 0x98878;
> +
> +    resh = 0x67576;
> +    resl = 0x5b1682c4;
> +    __asm
> +        ("mthi  %2, $ac1\n\t"
> +         "mtlo  %3, $ac1\n\t"
> +         "dpsq_s.w.qh $ac1, %4, %5\n\t"
> +         "mfhi  %0, $ac1\n\t"
> +         "mflo  %1, $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +    if ((acho != resh) || (aclo != resl)) {
> +        printf("dpsq_s.w.qh wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dpsq_sa_l_pw.c b/tests/tcg/mips/mips64-dsp/dpsq_sa_l_pw.c
> new file mode 100644
> index 0000000..4bfb00b
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dpsq_sa_l_pw.c
> @@ -0,0 +1,39 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt, dsp;
> +    long long achi, acli;
> +    long long resh, resl, resdsp;
> +
> +    rs      = 0x89789BC0123AD;
> +    rt      = 0x5467591643721;
> +
> +    achi = 0x98765437;
> +    acli = 0x65489709;
> +
> +    resh = 0xffffffffffffffff;
> +    resl = 0x00;
> +
> +    resdsp = 0x01;
> +
> +    __asm
> +        ("mthi  %0, $ac1\n\t"
> +         "mtlo  %1, $ac1\n\t"
> +         "dpsq_sa.l.pw $ac1, %3, %4\n\t"
> +         "mfhi  %0, $ac1\n\t"
> +         "mflo  %1, $ac1\n\t"
> +         "rddsp %2\n\t"
> +         : "+r"(achi), "+r"(acli), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    dsp = (dsp >> 17) & 0x01;
> +    if ((dsp != resdsp) || (achi != resh) || (acli != resl)) {
> +        printf("dpsq_sa.l.pw wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dpsq_sa_l_w.c b/tests/tcg/mips/mips64-dsp/dpsq_sa_l_w.c
> new file mode 100644
> index 0000000..9a5b090
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dpsq_sa_l_w.c
> @@ -0,0 +1,32 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt, dsp;
> +    long long ach = 5, acl = 5;
> +    long long resulth, resultl, resultdsp;
> +
> +    rs      = 0xBC0123AD;
> +    rt      = 0x01643721;
> +    resulth = 0x7FFFFFFF;
> +    resultl = 0xFFFFFFFFFFFFFFFF;
> +    resultdsp = 0x01;
> +    __asm
> +        ("mthi  %0, $ac1\n\t"
> +         "mtlo  %1, $ac1\n\t"
> +         "dpsq_sa.l.w $ac1, %3, %4\n\t"
> +         "mfhi  %0, $ac1\n\t"
> +         "mflo  %1, $ac1\n\t"
> +         "rddsp %2\n\t"
> +         : "+r"(ach), "+r"(acl), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 17) & 0x01;
> +    if ((dsp != resultdsp) || (ach != resulth) || (acl != resultl)) {
> +        printf("dpsq_sa.l.w wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dpsu_h_obl.c b/tests/tcg/mips/mips64-dsp/dpsu_h_obl.c
> new file mode 100644
> index 0000000..c0a8f4d
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dpsu_h_obl.c
> @@ -0,0 +1,32 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt;
> +    long long ach = 5, acl = 5;
> +    long long resulth, resultl;
> +
> +    rs      = 0x88886666BC0123AD;
> +    rt      = 0x9999888801643721;
> +
> +    resulth = 0x04;
> +    resultl = 0xFFFFFFFFFFFEF115;
> +
> +    __asm
> +        ("mthi  %0, $ac1\n\t"
> +         "mtlo  %1, $ac1\n\t"
> +         "dpsu.h.obl $ac1, %2, %3\n\t"
> +         "mfhi  %0, $ac1\n\t"
> +         "mflo  %1, $ac1\n\t"
> +         : "+r"(ach), "+r"(acl)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    if ((ach != resulth) || (acl != resultl)) {
> +        printf("dpsu.h.obl wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dpsu_h_obr.c b/tests/tcg/mips/mips64-dsp/dpsu_h_obr.c
> new file mode 100644
> index 0000000..aa0d47a
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dpsu_h_obr.c
> @@ -0,0 +1,32 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt;
> +    long long ach = 5, acl = 5;
> +    long long resulth, resultl;
> +
> +    rs      = 0x7878878888886666;
> +    rt      = 0x9865454399998888;
> +
> +    resulth = 0x04;
> +    resultl = 0xFFFFFFFFFFFeF115;
> +
> +    __asm
> +        ("mthi  %0, $ac1\n\t"
> +         "mtlo  %1, $ac1\n\t"
> +         "dpsu.h.obr $ac1, %2, %3\n\t"
> +         "mfhi  %0, $ac1\n\t"
> +         "mflo  %1, $ac1\n\t"
> +         : "+r"(ach), "+r"(acl)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    if ((ach != resulth) || (acl != resultl)) {
> +        printf("dpsu.h.qbr wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dpsu_h_qbl.c b/tests/tcg/mips/mips64-dsp/dpsu_h_qbl.c
> new file mode 100644
> index 0000000..da6dbb6
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dpsu_h_qbl.c
> @@ -0,0 +1,29 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt;
> +    long long ach = 5, acl = 5;
> +    long long resulth, resultl;
> +
> +    rs      = 0xBC0123AD;
> +    rt      = 0x01643721;
> +    resulth = 0x04;
> +    resultl = 0xFFFFFFFFFFFFFEE5;
> +    __asm
> +        ("mthi  %0, $ac1\n\t"
> +         "mtlo  %1, $ac1\n\t"
> +         "dpsu.h.qbl $ac1, %2, %3\n\t"
> +         "mfhi  %0, $ac1\n\t"
> +         "mflo  %1, $ac1\n\t"
> +         : "+r"(ach), "+r"(acl)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if ((ach != resulth) || (acl != resultl)) {
> +        printf("dpsu.h.qbl wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dpsu_h_qbr.c b/tests/tcg/mips/mips64-dsp/dpsu_h_qbr.c
> new file mode 100644
> index 0000000..bf00b70
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dpsu_h_qbr.c
> @@ -0,0 +1,29 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt;
> +    long long ach = 5, acl = 5;
> +    long long resulth, resultl;
> +
> +    rs      = 0xBC0123AD;
> +    rt      = 0x01643721;
> +    resulth = 0x04;
> +    resultl = 0xFFFFFFFFFFFFE233;
> +    __asm
> +        ("mthi  %0, $ac1\n\t"
> +         "mtlo  %1, $ac1\n\t"
> +         "dpsu.h.qbr $ac1, %2, %3\n\t"
> +         "mfhi  %0, $ac1\n\t"
> +         "mflo  %1, $ac1\n\t"
> +         : "+r"(ach), "+r"(acl)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if ((ach != resulth) || (acl != resultl)) {
> +        printf("dpsu.h.qbr wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dshilo.c b/tests/tcg/mips/mips64-dsp/dshilo.c
> new file mode 100644
> index 0000000..2784f58
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dshilo.c
> @@ -0,0 +1,31 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long achi, acli;
> +    long long acho, aclo;
> +    long long reshi, reslo;
> +
> +    achi = 0x87654321;
> +    acli = 0x12345678;
> +
> +    reshi = 0xfffffffff8765432;
> +    reslo = 0x1234567;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "dshilo $ac1, 0x4\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli)
> +        );
> +
> +    if ((acho != reshi) || (aclo != reslo)) {
> +        printf("dshilo error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/dshilov.c b/tests/tcg/mips/mips64-dsp/dshilov.c
> new file mode 100644
> index 0000000..dd5fa94
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/dshilov.c
> @@ -0,0 +1,32 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long achi, acli, rs;
> +    long long acho, aclo;
> +    long long reshi, reslo;
> +
> +    achi = 0x87654321;
> +    acli = 0x12345678;
> +    rs = 0x4;
> +
> +    reshi = 0xfffffffff8765432;
> +    reslo = 0x1234567;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "dshilov $ac1, %4\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs)
> +        );
> +
> +    if ((acho != reshi) || (aclo != reslo)) {
> +        printf("dshilov error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/extp.c b/tests/tcg/mips/mips64-dsp/extp.c
> new file mode 100644
> index 0000000..c72f54b
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/extp.c
> @@ -0,0 +1,50 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, ach, acl, dsp;
> +    long long result;
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    dsp = 0x07;
> +    result = 0x000C;
> +
> +    __asm
> +        ("wrdsp %1, 0x01\n\t"
> +         "mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "extp %0, $ac1, 0x03\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "+r"(dsp)
> +         : "r"(ach), "r"(acl)
> +        );
> +    dsp = (dsp >> 14) & 0x01;
> +    if ((dsp != 0) || (result != rt)) {
> +        printf("extp wrong\n");
> +
> +        return -1;
> +    }
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    dsp = 0x01;
> +
> +    __asm
> +        ("wrdsp %1, 0x01\n\t"
> +         "mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "extp %0, $ac1, 0x03\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "+r"(dsp)
> +         : "r"(ach), "r"(acl)
> +        );
> +    dsp = (dsp >> 14) & 0x01;
> +    if (dsp != 1) {
> +        printf("extp wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/extpdp.c b/tests/tcg/mips/mips64-dsp/extpdp.c
> new file mode 100644
> index 0000000..f430193
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/extpdp.c
> @@ -0,0 +1,51 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, ach, acl, dsp, pos, efi;
> +    long long result;
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    dsp = 0x07;
> +    result = 0x000C;
> +
> +    __asm
> +        ("wrdsp %1, 0x01\n\t"
> +         "mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "extpdp %0, $ac1, 0x03\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "+r"(dsp)
> +         : "r"(ach), "r"(acl)
> +        );
> +    pos =  dsp & 0x3F;
> +    efi = (dsp >> 14) & 0x01;
> +    if ((pos != 3) || (efi != 0) || (result != rt)) {
> +        printf("extpdp wrong\n");
> +
> +        return -1;
> +    }
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    dsp = 0x01;
> +
> +    __asm
> +        ("wrdsp %1, 0x01\n\t"
> +         "mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "extpdp %0, $ac1, 0x03\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "+r"(dsp)
> +         : "r"(ach), "r"(acl)
> +        );
> +    efi = (dsp >> 14) & 0x01;
> +    if (efi != 1) {
> +        printf("extpdp wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/extpdpv.c b/tests/tcg/mips/mips64-dsp/extpdpv.c
> new file mode 100644
> index 0000000..ba57426
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/extpdpv.c
> @@ -0,0 +1,52 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs, ach, acl, dsp, pos, efi;
> +    long long result;
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    dsp = 0x07;
> +    rs  = 0x03;
> +    result = 0x000C;
> +
> +    __asm
> +        ("wrdsp %1, 0x01\n\t"
> +         "mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "extpdpv %0, $ac1, %4\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "+r"(dsp)
> +         : "r"(ach), "r"(acl), "r"(rs)
> +        );
> +    pos =  dsp & 0x3F;
> +    efi = (dsp >> 14) & 0x01;
> +    if ((pos != 3) || (efi != 0) || (result != rt)) {
> +        printf("extpdpv wrong\n");
> +
> +        return -1;
> +    }
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    dsp = 0x01;
> +
> +    __asm
> +        ("wrdsp %1, 0x01\n\t"
> +         "mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "extpdpv %0, $ac1, %4\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "+r"(dsp)
> +         : "r"(ach), "r"(acl), "r"(rs)
> +        );
> +    efi = (dsp >> 14) & 0x01;
> +    if (efi != 1) {
> +        printf("extpdpv wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/extpv.c b/tests/tcg/mips/mips64-dsp/extpv.c
> new file mode 100644
> index 0000000..158472b
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/extpv.c
> @@ -0,0 +1,51 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, ac, ach, acl, dsp;
> +    long long result;
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    dsp = 0x07;
> +    ac  = 0x03;
> +    result = 0x000C;
> +
> +    __asm
> +        ("wrdsp %1, 0x01\n\t"
> +         "mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "extpv %0, $ac1, %4\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "+r"(dsp)
> +         : "r"(ach), "r"(acl), "r"(ac)
> +        );
> +    dsp = (dsp >> 14) & 0x01;
> +    if ((dsp != 0) || (result != rt)) {
> +        printf("extpv wrong\n");
> +
> +        return -1;
> +    }
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    dsp = 0x01;
> +
> +    __asm
> +        ("wrdsp %1, 0x01\n\t"
> +         "mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "extpv %0, $ac1, %4\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "+r"(dsp)
> +         : "r"(ach), "r"(acl), "r"(ac)
> +        );
> +    dsp = (dsp >> 14) & 0x01;
> +    if (dsp != 1) {
> +        printf("extpv wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/extr_r_w.c b/tests/tcg/mips/mips64-dsp/extr_r_w.c
> new file mode 100644
> index 0000000..097b5e5
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/extr_r_w.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, ach, acl, dsp;
> +    long long result;
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    result = 0xFFFFFFFFA0001699;
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "extr_r.w %0, $ac1, 0x03\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "=r"(dsp)
> +         : "r"(ach), "r"(acl)
> +        );
> +    dsp = (dsp >> 23) & 0x01;
> +    if ((dsp != 1) || (result != rt)) {
> +        printf("extr_r.w wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/extr_rs_w.c b/tests/tcg/mips/mips64-dsp/extr_rs_w.c
> new file mode 100644
> index 0000000..b9798a3
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/extr_rs_w.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, ach, acl, dsp;
> +    long long result;
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    result = 0x7FFFFFFF;
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "extr_rs.w %0, $ac1, 0x03\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "=r"(dsp)
> +         : "r"(ach), "r"(acl)
> +        );
> +    dsp = (dsp >> 23) & 0x01;
> +    if ((dsp != 1) || (result != rt)) {
> +        printf("extr_rs.w wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/extr_s_h.c b/tests/tcg/mips/mips64-dsp/extr_s_h.c
> new file mode 100644
> index 0000000..2c2328f
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/extr_s_h.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, ach, acl, dsp;
> +    long long result;
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    result = 0x00007FFF;
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "extr_s.h %0, $ac1, 0x03\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "=r"(dsp)
> +         : "r"(ach), "r"(acl)
> +        );
> +    dsp = (dsp >> 23) & 0x01;
> +    if ((dsp != 1) || (result != rt)) {
> +        printf("extr_s.h wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/extr_w.c b/tests/tcg/mips/mips64-dsp/extr_w.c
> new file mode 100644
> index 0000000..a5142d9
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/extr_w.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, ach, acl, dsp;
> +    long long result;
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    result = 0xFFFFFFFFA0001699;
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "extr.w %0, $ac1, 0x03\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "=r"(dsp)
> +         : "r"(ach), "r"(acl)
> +        );
> +    dsp = (dsp >> 23) & 0x01;
> +    if ((dsp != 1) || (result != rt)) {
> +        printf("extr.w wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/extrv_r_w.c b/tests/tcg/mips/mips64-dsp/extrv_r_w.c
> new file mode 100644
> index 0000000..ebe0700
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/extrv_r_w.c
> @@ -0,0 +1,31 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs, ach, acl, dsp;
> +    long long result;
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    dsp = 0x07;
> +    rs  = 0x03;
> +    result = 0xFFFFFFFFA0001699;
> +
> +    __asm
> +        ("wrdsp %1, 0x01\n\t"
> +         "mthi %3, $ac1\n\t"
> +         "mtlo %4, $ac1\n\t"
> +         "extrv_r.w %0, $ac1, %2\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "+r"(dsp)
> +         : "r"(rs), "r"(ach), "r"(acl)
> +        );
> +    dsp = (dsp >> 23) & 0x01;
> +    if ((dsp != 1) || (result != rt)) {
> +        printf("extrv_r.w wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/extrv_rs_w.c b/tests/tcg/mips/mips64-dsp/extrv_rs_w.c
> new file mode 100644
> index 0000000..b551f51
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/extrv_rs_w.c
> @@ -0,0 +1,31 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs, ach, acl, dsp;
> +    long long result;
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    dsp = 0x07;
> +    rs  = 0x03;
> +    result = 0x7FFFFFFF;
> +
> +    __asm
> +        ("wrdsp %1, 0x01\n\t"
> +         "mthi %3, $ac1\n\t"
> +         "mtlo %4, $ac1\n\t"
> +         "extrv_rs.w %0, $ac1, %2\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "+r"(dsp)
> +         : "r"(rs), "r"(ach), "r"(acl)
> +        );
> +    dsp = (dsp >> 23) & 0x01;
> +    if ((dsp != 1) || (result != rt)) {
> +        printf("extrv_rs.w wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/extrv_s_h.c b/tests/tcg/mips/mips64-dsp/extrv_s_h.c
> new file mode 100644
> index 0000000..a8b3860
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/extrv_s_h.c
> @@ -0,0 +1,31 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs, ach, acl, dsp;
> +    long long result;
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    dsp = 0x07;
> +    rs  = 0x03;
> +    result = 0x00007FFF;
> +
> +    __asm
> +        ("wrdsp %1, 0x01\n\t"
> +         "mthi %3, $ac1\n\t"
> +         "mtlo %4, $ac1\n\t"
> +         "extrv_s.h %0, $ac1, %2\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "+r"(dsp)
> +         : "r"(rs), "r"(ach), "r"(acl)
> +        );
> +    dsp = (dsp >> 23) & 0x01;
> +    if ((dsp != 1) || (result != rt)) {
> +        printf("extrv_s.h wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/extrv_w.c b/tests/tcg/mips/mips64-dsp/extrv_w.c
> new file mode 100644
> index 0000000..a553f6b
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/extrv_w.c
> @@ -0,0 +1,31 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs, ach, acl, dsp;
> +    long long result;
> +
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    dsp = 0x07;
> +    rs  = 0x03;
> +    result = 0xFFFFFFFFA0001699;
> +
> +    __asm
> +        ("wrdsp %1, 0x01\n\t"
> +         "mthi %3, $ac1\n\t"
> +         "mtlo %4, $ac1\n\t"
> +         "extrv.w %0, $ac1, %2\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rt), "+r"(dsp)
> +         : "r"(rs), "r"(ach), "r"(acl)
> +        );
> +    dsp = (dsp >> 23) & 0x01;
> +    if ((dsp != 1) || (result != rt)) {
> +        printf("extrv.w wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/head.S b/tests/tcg/mips/mips64-dsp/head.S
> new file mode 100644
> index 0000000..9a099ae
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/head.S
> @@ -0,0 +1,16 @@
> +/*
> + *  Startup Code for MIPS64 CPU-core
> + *
> + */
> +.text
> +.globl _start
> +.align 4
> +_start:
> +    ori    $2, $2, 0xffff
> +    sll    $2, $2, 16
> +    ori    $2, $2, 0xffff
> +    mtc0   $2, $12, 0
> +    jal    main
> +
> +end:
> +    b end
> diff --git a/tests/tcg/mips/mips64-dsp/insv.c b/tests/tcg/mips/mips64-dsp/insv.c
> new file mode 100644
> index 0000000..fc5696f
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/insv.c
> @@ -0,0 +1,26 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs, dsp;
> +    long long result;
> +
> +    /* msb = 10, lsb = 5 */
> +    dsp    = 0x305;
> +    rt     = 0x12345678;
> +    rs     = 0xffffffff87654321;
> +    result = 0x12345338;
> +    __asm
> +        ("wrdsp %2, 0x03\n\t"
> +         "insv  %0, %1\n\t"
> +         : "+r"(rt)
> +         : "r"(rs), "r"(dsp)
> +        );
> +    if (rt != result) {
> +        printf("insv wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/io.h b/tests/tcg/mips/mips64-dsp/io.h
> new file mode 100644
> index 0000000..b7db61d
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/io.h
> @@ -0,0 +1,22 @@
> +#ifndef _ASM_IO_H
> +#define _ASM_IO_H
> +extern int printf(const char *fmt, ...);
> +extern unsigned long get_ticks(void);
> +
> +#define _read(source)                \
> +({ unsigned long __res;                \
> +    __asm__ __volatile__(            \
> +        "mfc0\t%0, " #source "\n\t"    \
> +        : "=r" (__res));        \
> +    __res;                    \
> +})
> +
> +#define __read(source)                \
> +({ unsigned long __res;                \
> +    __asm__ __volatile__(            \
> +        "move\t%0, " #source "\n\t"    \
> +        : "=r" (__res));        \
> +    __res;                    \
> +})
> +
> +#endif
> diff --git a/tests/tcg/mips/mips64-dsp/lbux.c b/tests/tcg/mips/mips64-dsp/lbux.c
> new file mode 100644
> index 0000000..dbdc87b
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/lbux.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long value, rd;
> +    long long *p;
> +    unsigned long long addr, index;
> +    long long result;
> +
> +    value  = 0xBCDEF389;
> +    p = &value;
> +    addr = (unsigned long long)p;
> +    index  = 0;
> +    result = value & 0xFF;
> +    __asm
> +        ("lbux %0, %1(%2)\n\t"
> +         : "=r"(rd)
> +         : "r"(index), "r"(addr)
> +        );
> +    if (rd != result) {
> +        printf("lbux wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/ldx.c b/tests/tcg/mips/mips64-dsp/ldx.c
> new file mode 100644
> index 0000000..787d9f0
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/ldx.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long value, rd;
> +    long long *p;
> +    unsigned long long addr, index;
> +    long long result;
> +
> +    value  = 0xBCDEF389;
> +    p = &value;
> +    addr = (unsigned long long)p;
> +    index  = 0;
> +    result = 0xBCDEF389;
> +    __asm
> +        ("ldx %0, %1(%2)\n\t"
> +         : "=r"(rd)
> +         : "r"(index), "r"(addr)
> +        );
> +    if (rd != result) {
> +        printf("lwx wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/lhx.c b/tests/tcg/mips/mips64-dsp/lhx.c
> new file mode 100644
> index 0000000..2020e56
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/lhx.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long value, rd;
> +    long long *p;
> +    unsigned long long addr, index;
> +    long long result;
> +
> +    value  = 0xBCDEF389;
> +    p = &value;
> +    addr = (unsigned long long)p;
> +    index  = 0;
> +    result = 0xFFFFFFFFFFFFF389;
> +    __asm
> +        ("lhx %0, %1(%2)\n\t"
> +         : "=r"(rd)
> +         : "r"(index), "r"(addr)
> +        );
> +    if (rd != result) {
> +        printf("lhx wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/lwx.c b/tests/tcg/mips/mips64-dsp/lwx.c
> new file mode 100644
> index 0000000..6a81414
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/lwx.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long value, rd;
> +    long long *p;
> +    unsigned long long addr, index;
> +    long long result;
> +
> +    value  = 0xBCDEF389;
> +    p = &value;
> +    addr = (unsigned long long)p;
> +    index  = 0;
> +    result = 0xFFFFFFFFBCDEF389;
> +    __asm
> +        ("lwx %0, %1(%2)\n\t"
> +         : "=r"(rd)
> +         : "r"(index), "r"(addr)
> +        );
> +    if (rd != result) {
> +        printf("lwx wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/madd.c b/tests/tcg/mips/mips64-dsp/madd.c
> new file mode 100644
> index 0000000..de6e44f
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/madd.c
> @@ -0,0 +1,33 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs;
> +    long long achi, acli;
> +    long long acho, aclo;
> +    long long resulth, resultl;
> +
> +    achi = 0x05;
> +    acli = 0xB4CB;
> +    rs  = 0x01;
> +    rt  = 0x01;
> +    resulth = 0x05;
> +    resultl = 0xB4CC;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "madd $ac1, %4, %5\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +    if ((resulth != acho) || (resultl != aclo)) {
> +        printf("madd wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/maddu.c b/tests/tcg/mips/mips64-dsp/maddu.c
> new file mode 100644
> index 0000000..e9f426a
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/maddu.c
> @@ -0,0 +1,33 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs;
> +    long long achi, acli;
> +    long long acho, aclo;
> +    long long resulth, resultl;
> +
> +    achi = 0x05;
> +    acli = 0xB4CB;
> +    rs  = 0x01;
> +    rt  = 0x01;
> +    resulth = 0x05;
> +    resultl = 0xB4CC;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "madd $ac1, %4, %5\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +    if ((resulth != acho) || (resultl != aclo)) {
> +        printf("maddu wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/maq_s_l_pwl.c b/tests/tcg/mips/mips64-dsp/maq_s_l_pwl.c
> new file mode 100644
> index 0000000..c196b43
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/maq_s_l_pwl.c
> @@ -0,0 +1,56 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs, dsp;
> +    long long achi, acli;
> +    long long acho, aclo;
> +    long long resulth, resultl;
> +
> +    achi = 0x05;
> +    acli = 0xB4CB;
> +    rs  = 0x98765432FF060000;
> +    rt  = 0xfdeca987CB000000;
> +    resulth = 0x05;
> +    resultl = 0x18278587;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "maq_s.l.pwl $ac1, %4, %5\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +    if ((resulth != acho) || (resultl != aclo)) {
> +        printf("maq_s_l.w.pwl wrong 1\n");
> +
> +        return -1;
> +    }
> +
> +    achi = 0x05;
> +    acli = 0xB4CB;
> +    rs  = 0x80000000FF060000;
> +    rt  = 0x80000000CB000000;
> +    resulth = 0x05;
> +    resultl = 0xb4ca;
> +
> +    __asm
> +        ("mthi %3, $ac1\n\t"
> +         "mtlo %4, $ac1\n\t"
> +         "maq_s.l.pwl $ac1, %5, %6\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         "rddsp %2\n\t"
> +         : "=r"(acho), "=r"(aclo), "=r"(dsp)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 17) & 0x1;
> +    if ((dsp != 0x1) || (resulth != acho) || (resultl != aclo)) {
> +        printf("maq_s_l.w.pwl wrong 2\n");
> +
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/maq_s_l_pwr.c b/tests/tcg/mips/mips64-dsp/maq_s_l_pwr.c
> new file mode 100644
> index 0000000..e2af69f
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/maq_s_l_pwr.c
> @@ -0,0 +1,56 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs, dsp;
> +    long long achi, acli;
> +    long long acho, aclo;
> +    long long resulth, resultl;
> +
> +    achi = 0x05;
> +    acli = 0xB4CB;
> +    rs  = 0x87898765432;
> +    rt  = 0x7878fdeca987;
> +    resulth = 0x05;
> +    resultl = 0x18278587;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "maq_s.l.pwr $ac1, %4, %5\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +    if ((resulth != acho) || (resultl != aclo)) {
> +        printf("maq_s.w.pwr wrong\n");
> +
> +        return -1;
> +    }
> +
> +    achi = 0x05;
> +    acli = 0xB4CB;
> +    rs  = 0x89899980000000;
> +    rt  = 0x88780000000;
> +    resulth = 0x05;
> +    resultl = 0xb4ca;
> +
> +    __asm
> +        ("mthi %3, $ac1\n\t"
> +         "mtlo %4, $ac1\n\t"
> +         "maq_s.l.pwr $ac1, %5, %6\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         "rddsp %2\n\t"
> +         : "=r"(acho), "=r"(aclo), "=r"(dsp)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 17) & 0x1;
> +    if ((dsp != 0x1) || (resulth != acho) || (resultl != aclo)) {
> +        printf("maq_s.w.pwr wrong\n");
> +
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/maq_s_w_phl.c b/tests/tcg/mips/mips64-dsp/maq_s_w_phl.c
> new file mode 100644
> index 0000000..2f511d9
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/maq_s_w_phl.c
> @@ -0,0 +1,33 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs;
> +    long long achi, acli;
> +    long long acho, aclo;
> +    long long resulth, resultl;
> +
> +    achi = 0x05;
> +    acli = 0xB4CB;
> +    rs  = 0xFF060000;
> +    rt  = 0xCB000000;
> +    resulth = 0x04;
> +    resultl = 0xFFFFFFFF947438CB;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "maq_s.w.phl $ac1, %4, %5\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +    if ((resulth != acho) || (resultl != aclo)) {
> +        printf("maq_s.w.phl wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/maq_s_w_phr.c b/tests/tcg/mips/mips64-dsp/maq_s_w_phr.c
> new file mode 100644
> index 0000000..4c8f899
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/maq_s_w_phr.c
> @@ -0,0 +1,33 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs;
> +    long long achi, acli;
> +    long long acho, aclo;
> +    long long resulth, resultl;
> +
> +    achi = 0x05;
> +    acli = 0xB4CB;
> +    rs  = 0xFF06;
> +    rt  = 0xCB00;
> +    resulth = 0x04;
> +    resultl = 0xFFFFFFFF947438CB;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "maq_s.w.phr $ac1, %4, %5\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +    if ((resulth != acho) || (resultl != aclo)) {
> +        printf("maq_s.w.phr wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/maq_s_w_qhll.c b/tests/tcg/mips/mips64-dsp/maq_s_w_qhll.c
> new file mode 100644
> index 0000000..234a0af
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/maq_s_w_qhll.c
> @@ -0,0 +1,62 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs, dsp;
> +    long long achi, acli;
> +    long long acho, aclo;
> +    long long resulth, resultl;
> +
> +    achi = 0x05;
> +    acli = 0x05;
> +
> +    rs  = 0x1234888899990000;
> +    rt  = 0x9876888899990000;
> +
> +    resulth = 0x05;
> +    resultl = 0x15ae87f5;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "maq_s.w.qhll $ac1, %4, %5\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +
> +    if ((resulth != acho) || (resultl != aclo)) {
> +        printf("maq_s.w.qhll wrong\n");
> +
> +        return -1;
> +    }
> +
> +
> +    achi = 0x04;
> +    acli = 0x06;
> +    rs  = 0x8000888899990000;
> +    rt  = 0x8000888899990000;
> +
> +    resulth = 0x04;
> +    resultl = 0xffffffff80000005;
> +
> +    __asm
> +        ("mthi %3, $ac1\n\t"
> +         "mtlo %4, $ac1\n\t"
> +         "maq_s.w.qhll $ac1, %5, %6\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         "rddsp %2\n\t"
> +         : "=r"(acho), "=r"(aclo), "=r"(dsp)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +
> +    dsp = (dsp >> 17) & 0x1;
> +    if ((dsp != 0x1) || (resulth != acho) || (resultl != aclo)) {
> +        printf("maq_s.w.qhll wrong\n");
> +
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/maq_s_w_qhlr.c b/tests/tcg/mips/mips64-dsp/maq_s_w_qhlr.c
> new file mode 100644
> index 0000000..8768cba
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/maq_s_w_qhlr.c
> @@ -0,0 +1,62 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs, dsp;
> +    long long achi, acli;
> +    long long acho, aclo;
> +    long long resulth, resultl;
> +
> +    achi = 0x05;
> +    acli = 0x05;
> +
> +    rs  = 0x1234123412340000;
> +    rt  = 0x9876987698760000;
> +
> +    resulth = 0x05;
> +    resultl = 0x15ae87f5;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "maq_s.w.qhlr $ac1, %4, %5\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +
> +    if ((resulth != acho) || (resultl != aclo)) {
> +        printf("1 maq_s.w.qhlr wrong\n");
> +
> +        return -1;
> +    }
> +
> +
> +    achi = 0x04;
> +    acli = 0x06;
> +    rs  = 0x8000800080000000;
> +    rt  = 0x8000800080000000;
> +
> +    resulth = 0x04;
> +    resultl = 0xffffffff80000005;
> +
> +    __asm
> +        ("mthi %3, $ac1\n\t"
> +         "mtlo %4, $ac1\n\t"
> +         "maq_s.w.qhlr $ac1, %5, %6\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         "rddsp %2\n\t"
> +         : "=r"(acho), "=r"(aclo), "=r"(dsp)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +
> +    dsp = (dsp >> 17) & 0x1;
> +    if ((dsp != 0x1) || (resulth != acho) || (resultl != aclo)) {
> +        printf("2 maq_s.w.qhlr wrong\n");
> +
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/maq_s_w_qhrl.c b/tests/tcg/mips/mips64-dsp/maq_s_w_qhrl.c
> new file mode 100644
> index 0000000..5006e2b
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/maq_s_w_qhrl.c
> @@ -0,0 +1,63 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs, dsp;
> +    long long achi, acli;
> +    long long acho, aclo;
> +    long long resulth, resultl;
> +
> +    achi = 0x05;
> +    acli = 0x05;
> +
> +    rs  = 0x1234888812340000;
> +    rt  = 0x9876888898760000;
> +
> +    resulth = 0x05;
> +    resultl = 0x15ae87f5;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "maq_s.w.qhrl $ac1, %4, %5\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +
> +    if ((resulth != acho) || (resultl != aclo)) {
> +        printf("1 maq_s.w.qhrl wrong\n");
> +
> +        return -1;
> +    }
> +
> +
> +    achi = 0x04;
> +    acli = 0x06;
> +    rs  = 0x8888999980000000;
> +    rt  = 0x8888999980000000;
> +
> +    resulth = 0x04;
> +    resultl = 0xffffffff80000005;
> +
> +    __asm
> +        ("mthi %3, $ac1\n\t"
> +         "mtlo %4, $ac1\n\t"
> +         "maq_s.w.qhrl $ac1, %5, %6\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         "rddsp %2\n\t"
> +         : "=r"(acho), "=r"(aclo), "=r"(dsp)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +
> +    dsp = (dsp >> 17) & 0x1;
> +    if ((dsp != 0x1) || (resulth != acho) || (resultl != aclo)) {
> +        printf("2 maq_s.w.qhrl wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/maq_s_w_qhrr.c b/tests/tcg/mips/mips64-dsp/maq_s_w_qhrr.c
> new file mode 100644
> index 0000000..1d213a5
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/maq_s_w_qhrr.c
> @@ -0,0 +1,63 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs, dsp;
> +    long long achi, acli;
> +    long long acho, aclo;
> +    long long resulth, resultl;
> +
> +    achi = 0x05;
> +    acli = 0x05;
> +
> +    rs  = 0x1234888812341234;
> +    rt  = 0x9876888898769876;
> +
> +    resulth = 0x05;
> +    resultl = 0x15ae87f5;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "maq_s.w.qhrr $ac1, %4, %5\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +
> +    if ((resulth != acho) || (resultl != aclo)) {
> +        printf("1 maq_s.w.qhrr wrong\n");
> +
> +        return -1;
> +    }
> +
> +
> +    achi = 0x04;
> +    acli = 0x06;
> +    rs  = 0x8000888899998000;
> +    rt  = 0x8000888899998000;
> +
> +    resulth = 0x04;
> +    resultl = 0xffffffff80000005;
> +
> +    __asm
> +        ("mthi %3, $ac1\n\t"
> +         "mtlo %4, $ac1\n\t"
> +         "maq_s.w.qhrr $ac1, %5, %6\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         "rddsp %2\n\t"
> +         : "=r"(acho), "=r"(aclo), "=r"(dsp)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +
> +    dsp = (dsp >> 17) & 0x1;
> +    if ((dsp != 0x1) || (resulth != acho) || (resultl != aclo)) {
> +        printf("2 maq_s.w.qhrr wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/maq_sa_w_phl.c b/tests/tcg/mips/mips64-dsp/maq_sa_w_phl.c
> new file mode 100644
> index 0000000..b8101f7
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/maq_sa_w_phl.c
> @@ -0,0 +1,33 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs;
> +    long long achi, acli;
> +    long long acho, aclo;
> +    long long resulth, resultl;
> +
> +    achi = 0x05;
> +    acli = 0xB4CB;
> +    rs  = 0xFF060000;
> +    rt  = 0xCB000000;
> +    resulth = 0xFFFFFFFFFFFFFFFF;
> +    resultl = 0xFFFFFFFF947438cb;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "maq_sa.w.phl $ac1, %4, %5\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +    if ((resulth != acho) || (resultl != aclo)) {
> +        printf("maq_sa.w.phl wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/maq_sa_w_phr.c b/tests/tcg/mips/mips64-dsp/maq_sa_w_phr.c
> new file mode 100644
> index 0000000..7da8cf6
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/maq_sa_w_phr.c
> @@ -0,0 +1,33 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs;
> +    long long achi, acli;
> +    long long acho, aclo;
> +    long long resulth, resultl;
> +
> +    achi = 0x05;
> +    acli = 0xB4CB;
> +    rs  = 0xFF06;
> +    rt  = 0xCB00;
> +    resulth = 0xFFFFFFFFFFFFFFFF;
> +    resultl = 0xFFFFFFFF947438cb;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "maq_sa.w.phr $ac1, %4, %5\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +    if ((resulth != acho) || (resultl != aclo)) {
> +        printf("maq_sa.w.phr wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/maq_sa_w_qhll.c b/tests/tcg/mips/mips64-dsp/maq_sa_w_qhll.c
> new file mode 100644
> index 0000000..e467aa2
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/maq_sa_w_qhll.c
> @@ -0,0 +1,62 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs, dsp;
> +    long long achi, acli;
> +    long long acho, aclo;
> +    long long resulth, resultl;
> +
> +    achi = 0x05;
> +    acli = 0x05;
> +
> +    rs  = 0x1234888899990000;
> +    rt  = 0x9876888899990000;
> +
> +    resulth = 0x00;
> +    resultl = 0x15ae87f5;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "maq_sa.w.qhll $ac1, %4, %5\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +
> +    if ((resulth != acho) || (resultl != aclo)) {
> +        printf("1 maq_sa.w.qhll wrong\n");
> +
> +        return -1;
> +    }
> +
> +
> +    achi = 0x04;
> +    acli = 0x06;
> +    rs  = 0x8000888899990000;
> +    rt  = 0x8000888899990000;
> +
> +    resulth = 0xffffffffffffffff;
> +    resultl = 0xffffffff80000000;
> +
> +    __asm
> +        ("mthi %3, $ac1\n\t"
> +         "mtlo %4, $ac1\n\t"
> +         "maq_sa.w.qhll $ac1, %5, %6\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         "rddsp %2\n\t"
> +         : "=r"(acho), "=r"(aclo), "=r"(dsp)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +
> +    dsp = (dsp >> 17) & 0x1;
> +    if ((dsp != 0x1) || (resulth != acho) || (resultl != aclo)) {
> +        printf("2 maq_sa.w.qhll wrong\n");
> +
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/maq_sa_w_qhlr.c b/tests/tcg/mips/mips64-dsp/maq_sa_w_qhlr.c
> new file mode 100644
> index 0000000..40eefca
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/maq_sa_w_qhlr.c
> @@ -0,0 +1,64 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs, dsp;
> +    long long achi, acli;
> +    long long acho, aclo;
> +    long long resulth, resultl;
> +
> +    achi = 0x05;
> +    acli = 0x05;
> +
> +    rs  = 0x1234123412340000;
> +    rt  = 0x9876987699990000;
> +
> +    resulth = 0x0;
> +    resultl = 0x15ae87f5;
> +
> +    __asm
> +        ("mthi %3, $ac1\n\t"
> +         "mtlo %4, $ac1\n\t"
> +         "maq_sa.w.qhlr $ac1, %5, %6\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         "rddsp %2\n\t"
> +         : "=r"(acho), "=r"(aclo), "=r"(dsp)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +
> +    dsp = (dsp >> 17) & 0x1;
> +    if ((dsp != 0x0) || (resulth != acho) || (resultl != aclo)) {
> +        printf("maq_sa.w.qhlr wrong\n");
> +
> +        return -1;
> +    }
> +
> +
> +    achi = 0x04;
> +    acli = 0x06;
> +    rs  = 0x8000800099990000;
> +    rt  = 0x8000800099990000;
> +
> +    resulth = 0xffffffffffffffff;
> +    resultl = 0xffffffff80000000;
> +
> +    __asm
> +        ("mthi %3, $ac1\n\t"
> +         "mtlo %4, $ac1\n\t"
> +         "maq_sa.w.qhlr $ac1, %5, %6\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         "rddsp %2\n\t"
> +         : "=r"(acho), "=r"(aclo), "=r"(dsp)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +
> +    dsp = (dsp >> 17) & 0x1;
> +    if ((dsp != 0x1) || (resulth != acho) || (resultl != aclo)) {
> +        printf("maq_sa.w.qhlr wrong\n");
> +
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/maq_sa_w_qhrl.c b/tests/tcg/mips/mips64-dsp/maq_sa_w_qhrl.c
> new file mode 100644
> index 0000000..0f970fc
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/maq_sa_w_qhrl.c
> @@ -0,0 +1,64 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs, dsp;
> +    long long achi, acli;
> +    long long acho, aclo;
> +    long long resulth, resultl;
> +
> +    achi = 0x05;
> +    acli = 0x05;
> +
> +    rs  = 0x1234123412340000;
> +    rt  = 0x9876987698760000;
> +
> +    resulth = 0x0;
> +    resultl = 0x15ae87f5;
> +
> +    __asm
> +        ("mthi %3, $ac1\n\t"
> +         "mtlo %4, $ac1\n\t"
> +         "maq_sa.w.qhrl $ac1, %5, %6\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         "rddsp %2\n\t"
> +         : "=r"(acho), "=r"(aclo), "=r"(dsp)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +
> +    dsp = (dsp >> 17) & 0x1;
> +    if ((dsp != 0x0) || (resulth != acho) || (resultl != aclo)) {
> +        printf("1 maq_sa.w.qhrl wrong\n");
> +
> +        return -1;
> +    }
> +
> +
> +    achi = 0x04;
> +    acli = 0x06;
> +    rs  = 0x8000800080000000;
> +    rt  = 0x8000800080000000;
> +
> +    resulth = 0xffffffffffffffff;
> +    resultl = 0xffffffff80000000;
> +
> +    __asm
> +        ("mthi %3, $ac1\n\t"
> +         "mtlo %4, $ac1\n\t"
> +         "maq_sa.w.qhrl $ac1, %5, %6\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         "rddsp %2\n\t"
> +         : "=r"(acho), "=r"(aclo), "=r"(dsp)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +
> +    dsp = (dsp >> 17) & 0x1;
> +    if ((dsp != 0x1) || (resulth != acho) || (resultl != aclo)) {
> +        printf("2 maq_sa.w.qhrl wrong\n");
> +
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/maq_sa_w_qhrr.c b/tests/tcg/mips/mips64-dsp/maq_sa_w_qhrr.c
> new file mode 100644
> index 0000000..1f75665
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/maq_sa_w_qhrr.c
> @@ -0,0 +1,64 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs, dsp;
> +    long long achi, acli;
> +    long long acho, aclo;
> +    long long resulth, resultl;
> +
> +    achi = 0x05;
> +    acli = 0x05;
> +
> +    rs  = 0x1234123412341234;
> +    rt  = 0x9876987698769876;
> +
> +    resulth = 0x0;
> +    resultl = 0x15ae87f5;
> +
> +    __asm
> +        ("mthi %3, $ac1\n\t"
> +         "mtlo %4, $ac1\n\t"
> +         "maq_sa.w.qhrr $ac1, %5, %6\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         "rddsp %2\n\t"
> +         : "=r"(acho), "=r"(aclo), "=r"(dsp)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +
> +    dsp = (dsp >> 17) & 0x1;
> +    if ((dsp != 0x0) || (resulth != acho) || (resultl != aclo)) {
> +        printf("1 maq_sa.w.qhrr wrong\n");
> +
> +        return -1;
> +    }
> +
> +
> +    achi = 0x04;
> +    acli = 0x06;
> +    rs  = 0x8000800080008000;
> +    rt  = 0x8000800080008000;
> +
> +    resulth = 0xffffffffffffffff;
> +    resultl = 0xffffffff80000000;
> +
> +    __asm
> +        ("mthi %3, $ac1\n\t"
> +         "mtlo %4, $ac1\n\t"
> +         "maq_sa.w.qhrr $ac1, %5, %6\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         "rddsp %2\n\t"
> +         : "=r"(acho), "=r"(aclo), "=r"(dsp)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +
> +    dsp = (dsp >> 17) & 0x1;
> +    if ((dsp != 0x1) || (resulth != acho) || (resultl != aclo)) {
> +        printf("2 maq_sa.w.qhrr wrong\n");
> +
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/mfhi.c b/tests/tcg/mips/mips64-dsp/mfhi.c
> new file mode 100644
> index 0000000..ee915f7
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/mfhi.c
> @@ -0,0 +1,24 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long achi, acho;
> +    long long result;
> +
> +    achi   = 0x004433;
> +    result = 0x004433;
> +
> +    __asm
> +        ("mthi %1, $ac1\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         : "=r"(acho)
> +         : "r"(achi)
> +        );
> +    if (result != acho) {
> +        printf("mfhi wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/mflo.c b/tests/tcg/mips/mips64-dsp/mflo.c
> new file mode 100644
> index 0000000..cdc646b
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/mflo.c
> @@ -0,0 +1,24 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long acli, aclo;
> +    long long result;
> +
> +    acli   = 0x004433;
> +    result = 0x004433;
> +
> +    __asm
> +        ("mtlo %1, $ac1\n\t"
> +         "mflo %0, $ac1\n\t"
> +         : "=r"(aclo)
> +         : "r"(acli)
> +        );
> +    if (result != aclo) {
> +        printf("mflo wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/mips_boot.lds b/tests/tcg/mips/mips64-dsp/mips_boot.lds
> new file mode 100644
> index 0000000..bd7c0c0
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/mips_boot.lds
> @@ -0,0 +1,31 @@
> +OUTPUT_ARCH(mips)
> +SECTIONS
> +{
> +    . = 0xffffffff80100000;
> +    . = ALIGN((1 << 13));
> +    .text :
> +    {
> +        *(.text)
> +        *(.rodata)
> +        *(.rodata.*)
> +    }
> +
> +    __init_begin = .;
> +    . = ALIGN((1 << 12));
> +    .init.text : AT(ADDR(.init.text) - 0)
> +    {
> +        *(.init.text)
> +    }
> +    .init.data : AT(ADDR(.init.data) - 0)
> +    {
> +        *(.init.data)
> +    }
> +    . = ALIGN((1 << 12));
> +    __init_end = .;
> +
> +    . = ALIGN((1 << 13));
> +    .data :
> +    {
> +        *(.data)
> +    }
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/modsub.c b/tests/tcg/mips/mips64-dsp/modsub.c
> new file mode 100644
> index 0000000..2c91cb4
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/modsub.c
> @@ -0,0 +1,37 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt;
> +    long long result;
> +
> +    rs     = 0xFFFFFFFF;
> +    rt     = 0x000000FF;
> +    result = 0xFFFFFF00;
> +    __asm
> +        ("modsub %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if (result != rd) {
> +        printf("modsub wrong\n");
> +
> +        return -1;
> +    }
> +
> +    rs     = 0x00000000;
> +    rt     = 0x00CD1FFF;
> +    result = 0x0000CD1F;
> +    __asm
> +        ("modsub %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if (result != rd) {
> +        printf("modsub wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/msub.c b/tests/tcg/mips/mips64-dsp/msub.c
> new file mode 100644
> index 0000000..75066b5
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/msub.c
> @@ -0,0 +1,32 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long achi, acli, rs, rt;
> +    long long acho, aclo;
> +    long long resulth, resultl;
> +
> +    rs      = 0x00BBAACC;
> +    rt      = 0x0B1C3D2F;
> +    achi    = 0x00004433;
> +    acli    = 0xFFCC0011;
> +    resulth = 0xFFFFFFFFFFF81F29;
> +    resultl = 0xFFFFFFFFB355089D;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "msub $ac1, %4, %5\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +    if ((acho != resulth) || (aclo != resultl)) {
> +        printf("msub wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/msubu.c b/tests/tcg/mips/mips64-dsp/msubu.c
> new file mode 100644
> index 0000000..55f8ae0
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/msubu.c
> @@ -0,0 +1,32 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long achi, acli, rs, rt;
> +    long long acho, aclo;
> +    long long resulth, resultl;
> +
> +    rs      = 0x00BBAACC;
> +    rt      = 0x0B1C3D2F;
> +    achi    = 0x00004433;
> +    acli    = 0xFFCC0011;
> +    resulth = 0xFFFFFFFFFFF81F29;
> +    resultl = 0xFFFFFFFFB355089D;
> +
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "msubu $ac1, %4, %5\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +    if ((acho != resulth) || (aclo != resultl)) {
> +        printf("msubu wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/mthi.c b/tests/tcg/mips/mips64-dsp/mthi.c
> new file mode 100644
> index 0000000..8570051
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/mthi.c
> @@ -0,0 +1,24 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long achi, acho;
> +    long long result;
> +
> +    achi   = 0x004433;
> +    result = 0x004433;
> +
> +    __asm
> +        ("mthi %1, $ac1\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         : "=r"(acho)
> +         : "r"(achi)
> +        );
> +    if (result != acho) {
> +        printf("mthi wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/mthlip.c b/tests/tcg/mips/mips64-dsp/mthlip.c
> new file mode 100644
> index 0000000..5373bd4
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/mthlip.c
> @@ -0,0 +1,35 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, ach, acl, dsp;
> +    long long result, resulth, resultl;
> +
> +    dsp = 0x07;
> +    ach = 0x05;
> +    acl = 0xB4CB;
> +    rs  = 0x00FFBBAA;
> +    resulth = 0xB4CB;
> +    resultl = 0x00FFBBAA;
> +    result  = 0x27;
> +
> +    __asm
> +        ("wrdsp %0, 0x01\n\t"
> +         "mthi %1, $ac1\n\t"
> +         "mtlo %2, $ac1\n\t"
> +         "mthlip %3, $ac1\n\t"
> +         "mfhi %1, $ac1\n\t"
> +         "mflo %2, $ac1\n\t"
> +         "rddsp %0\n\t"
> +         : "+r"(dsp), "+r"(ach), "+r"(acl)
> +         : "r"(rs)
> +        );
> +    dsp = dsp & 0x3F;
> +    if ((dsp != result) || (ach != resulth) || (acl != resultl)) {
> +        printf("mthlip wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/mtlo.c b/tests/tcg/mips/mips64-dsp/mtlo.c
> new file mode 100644
> index 0000000..304fffb
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/mtlo.c
> @@ -0,0 +1,22 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long acli, aclo;
> +    long long result;
> +
> +    acli   = 0x004433;
> +    result = 0x004433;
> +
> +    __asm
> +        ("mthi %1, $ac1\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         : "=r"(aclo)
> +         : "r"(acli)
> +        );
> +    if (result != aclo) {
> +        printf("mtlo wrong\n");
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/muleq_s_pw_qhl.c b/tests/tcg/mips/mips64-dsp/muleq_s_pw_qhl.c
> new file mode 100644
> index 0000000..be38570
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/muleq_s_pw_qhl.c
> @@ -0,0 +1,55 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, result;
> +    rd = 0;
> +    rs = 0x45BCFFFF12345678;
> +    rt = 0x98529AD287654321;
> +    result = 0x52fbec7035a2ca5c;
> +
> +    __asm
> +        ("muleq_s.pw.qhl %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    if (result != rd) {
> +        printf("muleq_s.pw.qhl error\n");
> +
> +        return -1;
> +    }
> +
> +    rd = 0;
> +    rs = 0x45BC800012345678;
> +    rt = 0x9852800087654321;
> +    result = 0x52fbec707FFFFFFF;
> +
> +    __asm
> +        ("muleq_s.pw.qhl %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    if (result != rd) {
> +        printf("muleq_s.pw.qhl dspcontrol overflown flag error\n");
> +
> +        return -1;
> +    }
> +
> +    rd = 0;
> +    __asm
> +        ("rddsp %0\n\t"
> +         : "=r"(rd)
> +        );
> +    rd = rd >> 21;
> +    rd = rd & 0x1;
> +
> +    if (rd != 1) {
> +        printf("muleq_s.pw.qhl dspcontrol bit not set error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/muleq_s_pw_qhr.c b/tests/tcg/mips/mips64-dsp/muleq_s_pw_qhr.c
> new file mode 100644
> index 0000000..d0a84d4
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/muleq_s_pw_qhr.c
> @@ -0,0 +1,24 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, result;
> +    rd = 0;
> +    rs = 0x1234567845BCFFFF;
> +    rt = 0x8765432198529AD2;
> +    result = 0x52fbec7035a2ca5c;
> +
> +    __asm
> +        ("muleq_s.pw.qhr %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    if (result != rd) {
> +        printf("muleq_s.pw.qhr error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/muleq_s_w_phl.c b/tests/tcg/mips/mips64-dsp/muleq_s_w_phl.c
> new file mode 100644
> index 0000000..76c615b
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/muleq_s_w_phl.c
> @@ -0,0 +1,46 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, dsp;
> +    long long result, resultdsp;
> +
> +    rs = 0x80009988;
> +    rt = 0x80009988;
> +    result = 0x7FFFFFFF;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("muleq_s.w.phl %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 21) & 0x01;
> +    if ((rd  != result) || (dsp != resultdsp)) {
> +        printf("muleq_s.w.phr wrong\n");
> +
> +        return -1;
> +    }
> +
> +    rs = 0x12343322;
> +    rt = 0x43213322;
> +    result = 0x98be968;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("muleq_s.w.phl %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 21) & 0x01;
> +    if ((rd  != result) || (dsp != resultdsp)) {
> +        printf("muleq_s.w.phr wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> +
> diff --git a/tests/tcg/mips/mips64-dsp/muleq_s_w_phr.c b/tests/tcg/mips/mips64-dsp/muleq_s_w_phr.c
> new file mode 100644
> index 0000000..0e59479
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/muleq_s_w_phr.c
> @@ -0,0 +1,45 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, dsp;
> +    long long result, resultdsp;
> +
> +    rs = 0x8000;
> +    rt = 0x8000;
> +    result = 0x7FFFFFFF;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("muleq_s.w.phr %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 21) & 0x01;
> +    if ((rd  != result) || (dsp != resultdsp)) {
> +        printf("muleq_s.w.phr wrong\n");
> +
> +        return -1;
> +    }
> +
> +    rs = 0x1234;
> +    rt = 0x4321;
> +    result = 0x98be968;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("muleq_s.w.phr %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 21) & 0x01;
> +    if ((rd  != result) || (dsp != resultdsp)) {
> +        printf("muleq_s.w.phr wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/muleu_s_ph_qbl.c b/tests/tcg/mips/mips64-dsp/muleu_s_ph_qbl.c
> new file mode 100644
> index 0000000..2f444c9
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/muleu_s_ph_qbl.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, dsp;
> +    long long result, resultdsp;
> +
> +    rs = 0x80001234;
> +    rt = 0x80004321;
> +    result = 0xFFFFFFFFFFFF0000;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("muleu_s.ph.qbl %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 21) & 0x01;
> +    if ((rd  != result) || (dsp != resultdsp)) {
> +        printf("muleu_s.ph.qbl wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/muleu_s_ph_qbr.c b/tests/tcg/mips/mips64-dsp/muleu_s_ph_qbr.c
> new file mode 100644
> index 0000000..8bd0e99
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/muleu_s_ph_qbr.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, dsp;
> +    long long result, resultdsp;
> +
> +    rs = 0x8000;
> +    rt = 0x80004321;
> +    result = 0xFFFFFFFFFFFF0000;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("muleu_s.ph.qbr %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 21) & 0x01;
> +    if ((rd  != result) || (dsp != resultdsp)) {
> +        printf("muleu_s.ph.qbr wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/muleu_s_qh_obl.c b/tests/tcg/mips/mips64-dsp/muleu_s_qh_obl.c
> new file mode 100644
> index 0000000..63b3ad5
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/muleu_s_qh_obl.c
> @@ -0,0 +1,25 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, result;
> +
> +    rd = 0;
> +    rs = 0x1234567802020202;
> +    rt = 0x0034432112344321;
> +    result = 0x03A8FFFFFFFFFFFF;
> +
> +    __asm
> +        ("muleu_s.qh.obl %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    if (rd != result) {
> +        printf("muleu_s.qh.obl error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/muleu_s_qh_obr.c b/tests/tcg/mips/mips64-dsp/muleu_s_qh_obr.c
> new file mode 100644
> index 0000000..f6289ee
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/muleu_s_qh_obr.c
> @@ -0,0 +1,25 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, result;
> +
> +    rd = 0;
> +    rs = 0x1234567802020204;
> +    rt = 0x0034432112344321;
> +    result = 0x006886422468FFFF;
> +
> +    __asm
> +        ("muleu_s.qh.obr %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    if (rd != result) {
> +        printf("muleu_s.qh.obr error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/mulq_rs_ph.c b/tests/tcg/mips/mips64-dsp/mulq_rs_ph.c
> new file mode 100644
> index 0000000..fd6233d
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/mulq_rs_ph.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, dsp;
> +    long long result, resultdsp;
> +
> +    rs = 0x80001234;
> +    rt = 0x80004321;
> +    result = 0x7FFF098C;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("mulq_rs.ph %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 21) & 0x01;
> +    if ((rd  != result) || (dsp != resultdsp)) {
> +        printf("mulq_rs.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/mulq_rs_qh.c b/tests/tcg/mips/mips64-dsp/mulq_rs_qh.c
> new file mode 100644
> index 0000000..7863c05
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/mulq_rs_qh.c
> @@ -0,0 +1,33 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, result, dsp, dspresult;
> +    rt = 0x80003698CE8F9201;
> +    rs = 0x800034634BCDE321;
> +    result = 0x7fff16587a530313;
> +
> +    dspresult = 0x01;
> +
> +    __asm
> +        ("mulq_rs.qh %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rt), "r"(rs)
> +        );
> +
> +    if (rd != result) {
> +        printf("mulq_rs.qh error\n");
> +
> +        return -1;
> +    }
> +
> +    dsp = (dsp >> 21) & 0x01;
> +    if (dsp != dspresult) {
> +        printf("mulq_rs.qh DSPControl Reg ouflag error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/mulsaq_s_l_pw.c b/tests/tcg/mips/mips64-dsp/mulsaq_s_l_pw.c
> new file mode 100644
> index 0000000..02548f8
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/mulsaq_s_l_pw.c
> @@ -0,0 +1,59 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt, dsp;
> +    long long achi, acli;
> +    long long acho, aclo;
> +    long long resl, resh;
> +
> +    achi = 0x4;
> +    acli = 0x4;
> +
> +    rs = 0x1234567887654321;
> +    rt = 0x8765432112345678;
> +
> +    resh = 0x4;
> +    resl = 0x4;
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "mulsaq_s.l.pw $ac1, %4, %5\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +
> +    if ((acho != resh) || (aclo != resl)) {
> +        printf("1 mulsaq_s.l.pw wrong\n");
> +
> +        return -1;
> +    }
> +
> +    achi = 0x4;
> +    acli = 0x4;
> +
> +    rs = 0x8000000087654321;
> +    rt = 0x8000000012345678;
> +
> +    resh = 0x4;
> +    resl = 0x1e8ee513;
> +    __asm
> +        ("mthi %3, $ac1\n\t"
> +         "mtlo %4, $ac1\n\t"
> +         "mulsaq_s.l.pw $ac1, %5, %6\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         "rddsp %2\n\t"
> +         : "=r"(acho), "=r"(aclo), "=r"(dsp)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 17) & 0x1;
> +    if ((dsp != 0x1) || (acho != resh) || (aclo != resl)) {
> +        printf("2 mulsaq_s.l.pw wrong\n");
> +
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/mulsaq_s_w_qh.c b/tests/tcg/mips/mips64-dsp/mulsaq_s_w_qh.c
> new file mode 100644
> index 0000000..92d7a0b
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/mulsaq_s_w_qh.c
> @@ -0,0 +1,57 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt, dsp;
> +    long long achi, acli;
> +    long long acho, aclo;
> +    long long resl, resh;
> +
> +    achi = 0x4;
> +    acli = 0x4;
> +
> +    rs = 0x5678123443218765;
> +    rt = 0x4321876556781234;
> +
> +    resh = 0x4;
> +    resl = 0x342fcbd4;
> +    __asm
> +        ("mthi %2, $ac1\n\t"
> +         "mtlo %3, $ac1\n\t"
> +         "mulsaq_s.w.qh $ac1, %4, %5\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(acho), "=r"(aclo)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +
> +    if ((acho != resh) || (aclo != resl)) {
> +        printf("1 mulsaq_s.w.qh wrong\n");
> +        return -1;
> +    }
> +
> +    achi = 0x4;
> +    acli = 0x4;
> +
> +    rs = 0x8000800087654321;
> +    rt = 0x8000800012345678;
> +
> +    resh = 0x3;
> +    resl = 0xffffffffe5e81a1c;
> +    __asm
> +        ("mthi %3, $ac1\n\t"
> +         "mtlo %4, $ac1\n\t"
> +         "mulsaq_s.w.qh $ac1, %5, %6\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         "rddsp %2\n\t"
> +         : "=r"(acho), "=r"(aclo), "=r"(dsp)
> +         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 17) & 0x1;
> +    if ((dsp != 0x1) || (acho != resh) || (aclo != resl)) {
> +        printf("2 mulsaq_s.w.qh wrong\n");
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/mult.c b/tests/tcg/mips/mips64-dsp/mult.c
> new file mode 100644
> index 0000000..4a294d1
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/mult.c
> @@ -0,0 +1,26 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt, ach, acl;
> +    long long result, resulth, resultl;
> +
> +    rs  = 0x00FFBBAA;
> +    rt  = 0x4B231000;
> +    resulth = 0x4b0f01;
> +    resultl = 0x71f8a000;
> +    __asm
> +        ("mult $ac1, %2, %3\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(ach), "=r"(acl)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if ((ach != resulth) || (acl != resultl)) {
> +        printf("mult wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/multu.c b/tests/tcg/mips/mips64-dsp/multu.c
> new file mode 100644
> index 0000000..ea51cfa
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/multu.c
> @@ -0,0 +1,26 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt, ach, acl;
> +    long long result, resulth, resultl;
> +
> +    rs  = 0x00FFBBAA;
> +    rt  = 0x4B231000;
> +    resulth = 0x4b0f01;
> +    resultl = 0x71f8a000;
> +    __asm
> +        ("mult $ac1, %2, %3\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "=r"(ach), "=r"(acl)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if ((ach != resulth) || (acl != resultl)) {
> +        printf("multu wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/packrl_ph.c b/tests/tcg/mips/mips64-dsp/packrl_ph.c
> new file mode 100644
> index 0000000..3722b0a
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/packrl_ph.c
> @@ -0,0 +1,24 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt;
> +    long long result;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result = 0x56788765;
> +
> +    __asm
> +        ("packrl.ph %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if (result != rd) {
> +        printf("packrl.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/packrl_pw.c b/tests/tcg/mips/mips64-dsp/packrl_pw.c
> new file mode 100644
> index 0000000..7807418
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/packrl_pw.c
> @@ -0,0 +1,24 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt;
> +    long long res;
> +
> +    rs = 0x1234567887654321;
> +    rt = 0xabcdef9812345678;
> +
> +    res = 0x87654321abcdef98;
> +
> +    __asm
> +        ("packrl.pw %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if (rd != res) {
> +        printf("packrl.pw error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/pick_ob.c b/tests/tcg/mips/mips64-dsp/pick_ob.c
> new file mode 100644
> index 0000000..93bcc85
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/pick_ob.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, dsp;
> +    long long res;
> +    dsp = 0xff000000;
> +
> +    rs = 0x1234567812345678;
> +    rt = 0x8765432187654321;
> +
> +    res = 0x1234567812345678;
> +
> +    __asm
> +        ("wrdsp %1, 0x10\n\t"
> +         "pick.ob %0, %2, %3\n\t"
> +         : "=r"(rd)
> +         : "r"(dsp), "r"(rs), "r"(rt)
> +        );
> +
> +    if (rd != res) {
> +        printf("pick.ob error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/pick_ph.c b/tests/tcg/mips/mips64-dsp/pick_ph.c
> new file mode 100644
> index 0000000..f7bde08
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/pick_ph.c
> @@ -0,0 +1,26 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, dsp;
> +    long long result;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    dsp = 0x0A000000;
> +    result = 0x12344321;
> +
> +    __asm
> +        ("wrdsp %3, 0x10\n\t"
> +         "pick.ph %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt), "r"(dsp)
> +        );
> +    if (rd != result) {
> +        printf("pick.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/pick_pw.c b/tests/tcg/mips/mips64-dsp/pick_pw.c
> new file mode 100644
> index 0000000..277606b
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/pick_pw.c
> @@ -0,0 +1,28 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, dsp;
> +    long long res;
> +    dsp = 0xff000000;
> +
> +    rs = 0x1234567812345678;
> +    rt = 0x8765432187654321;
> +
> +    res = 0x1234567812345678;
> +
> +    __asm
> +        ("wrdsp %1, 0x10\n\t"
> +         "wrdsp %1\n\t"
> +         "pick.pw %0, %2, %3\n\t"
> +         : "=r"(rd), "+r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    if (rd != res) {
> +        printf("pick.pw error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/pick_qb.c b/tests/tcg/mips/mips64-dsp/pick_qb.c
> new file mode 100644
> index 0000000..b0c4a17
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/pick_qb.c
> @@ -0,0 +1,26 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, dsp;
> +    long long result;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    dsp = 0x0A000000;
> +    result = 0x12655621;
> +
> +    __asm
> +        ("wrdsp %3, 0x10\n\t"
> +         "pick.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt), "r"(dsp)
> +        );
> +    if (rd != result) {
> +        printf("pick.qb wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/pick_qh.c b/tests/tcg/mips/mips64-dsp/pick_qh.c
> new file mode 100644
> index 0000000..11391b5
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/pick_qh.c
> @@ -0,0 +1,28 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, dsp;
> +    long long res;
> +    dsp = 0xff000000;
> +
> +    rs = 0x1234567812345678;
> +    rt = 0x8765432187654321;
> +
> +    res = 0x1234567812345678;
> +
> +    __asm
> +        ("wrdsp %1, 0x10\n\t"
> +         "wrdsp %1\n\t"
> +         "pick.qh %0, %2, %3\n\t"
> +         : "=r"(rd), "+r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    if (rd != res) {
> +        printf("pick.qh error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/preceq_l_pwl.c b/tests/tcg/mips/mips64-dsp/preceq_l_pwl.c
> new file mode 100644
> index 0000000..6455100
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/preceq_l_pwl.c
> @@ -0,0 +1,24 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt;
> +    long long result;
> +    rt = 0xFFFFFFFF11111111;
> +    result = 0xFFFFFFFF00000000;
> +
> +    __asm
> +        ("preceq.l.pwl %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +
> +    if (result != rd) {
> +        printf("preceq.l.pwl wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> +
> diff --git a/tests/tcg/mips/mips64-dsp/preceq_l_pwr.c b/tests/tcg/mips/mips64-dsp/preceq_l_pwr.c
> new file mode 100644
> index 0000000..1e05339
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/preceq_l_pwr.c
> @@ -0,0 +1,24 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt;
> +    long long result;
> +    rt = 0xFFFFFFFF11111111;
> +    result = 0x1111111100000000;
> +
> +    __asm
> +        ("preceq.l.pwl %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +
> +    if (result != rd) {
> +        printf("preceq.l.pwr wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> +
> diff --git a/tests/tcg/mips/mips64-dsp/preceq_pw_qhl.c b/tests/tcg/mips/mips64-dsp/preceq_pw_qhl.c
> new file mode 100644
> index 0000000..f44b940
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/preceq_pw_qhl.c
> @@ -0,0 +1,21 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, result;
> +    rt = 0x0123456789ABCDEF;
> +    result = 0x0123000045670000;
> +
> +    __asm
> +        ("preceq.pw.qhl %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    if (result != rd) {
> +        printf("preceq.pw.qhl error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/preceq_pw_qhla.c b/tests/tcg/mips/mips64-dsp/preceq_pw_qhla.c
> new file mode 100644
> index 0000000..f0f78f4
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/preceq_pw_qhla.c
> @@ -0,0 +1,23 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, result;
> +
> +    rt = 0x123456789ABCDEF0;
> +    result = 0x123400009ABC0000;
> +
> +    __asm
> +        ("preceq.pw.qhla %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +
> +    if (result != rd) {
> +        printf("preceq.pw.qhla error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/preceq_pw_qhr.c b/tests/tcg/mips/mips64-dsp/preceq_pw_qhr.c
> new file mode 100644
> index 0000000..709d4f9
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/preceq_pw_qhr.c
> @@ -0,0 +1,21 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, result;
> +    rt = 0x0123456789ABCDEF;
> +    result = 0x89AB0000CDEF0000;
> +
> +    __asm
> +        ("preceq.pw.qhr %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    if (result != rd) {
> +        printf("preceq.pw.qhr error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/preceq_pw_qhra.c b/tests/tcg/mips/mips64-dsp/preceq_pw_qhra.c
> new file mode 100644
> index 0000000..4d071ec
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/preceq_pw_qhra.c
> @@ -0,0 +1,23 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, result;
> +
> +    rt = 0x123456789ABCDEF0;
> +    result = 0x56780000DEF00000;
> +
> +    __asm
> +        ("preceq.pw.qhra %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +
> +    if (result != rd) {
> +        printf("preceq.pw.qhra error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/preceq_w_phl.c b/tests/tcg/mips/mips64-dsp/preceq_w_phl.c
> new file mode 100644
> index 0000000..4ed3fc0
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/preceq_w_phl.c
> @@ -0,0 +1,23 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt;
> +    long long result;
> +
> +    rt = 0x87654321;
> +    result = 0xFFFFFFFF87650000;
> +
> +    __asm
> +        ("preceq.w.phl %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    if (result != rd) {
> +        printf("preceq.w.phl wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/preceq_w_phr.c b/tests/tcg/mips/mips64-dsp/preceq_w_phr.c
> new file mode 100644
> index 0000000..e2ea093
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/preceq_w_phr.c
> @@ -0,0 +1,23 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt;
> +    long long result;
> +
> +    rt = 0x87654321;
> +    result = 0x43210000;
> +
> +    __asm
> +        ("preceq.w.phr %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    if (result != rd) {
> +        printf("preceq.w.phr wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/precequ_ph_qbl.c b/tests/tcg/mips/mips64-dsp/precequ_ph_qbl.c
> new file mode 100644
> index 0000000..17b7331
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/precequ_ph_qbl.c
> @@ -0,0 +1,23 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt;
> +    long long result;
> +
> +    rt = 0x87654321;
> +    result = 0x43803280;
> +
> +    __asm
> +        ("precequ.ph.qbl %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    if (result != rd) {
> +        printf("precequ.ph.qbl wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/precequ_ph_qbla.c b/tests/tcg/mips/mips64-dsp/precequ_ph_qbla.c
> new file mode 100644
> index 0000000..15e9494
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/precequ_ph_qbla.c
> @@ -0,0 +1,23 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt;
> +    long long result;
> +
> +    rt = 0x87654321;
> +    result = 0x43802180;
> +
> +    __asm
> +        ("precequ.ph.qbla %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    if (result != rd) {
> +        printf("precequ.ph.qbla wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/precequ_ph_qbr.c b/tests/tcg/mips/mips64-dsp/precequ_ph_qbr.c
> new file mode 100644
> index 0000000..495368c
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/precequ_ph_qbr.c
> @@ -0,0 +1,23 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt;
> +    long long result;
> +
> +    rt = 0x87654321;
> +    result = 0x21801080;
> +
> +    __asm
> +        ("precequ.ph.qbr %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    if (result != rd) {
> +        printf("precequ.ph.qbr wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/precequ_ph_qbra.c b/tests/tcg/mips/mips64-dsp/precequ_ph_qbra.c
> new file mode 100644
> index 0000000..7c66369
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/precequ_ph_qbra.c
> @@ -0,0 +1,23 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt;
> +    long long result;
> +
> +    rt = 0x87654321;
> +    result = 0x32801080;
> +
> +    __asm
> +        ("precequ.ph.qbra %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    if (result != rd) {
> +        printf("precequ.ph.qbra wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/precequ_qh_obl.c b/tests/tcg/mips/mips64-dsp/precequ_qh_obl.c
> new file mode 100644
> index 0000000..176d236
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/precequ_qh_obl.c
> @@ -0,0 +1,22 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, result;
> +    rt = 0x123456789ABCDEF0;
> +    result = 0x09001A002B003C00;
> +
> +    __asm
> +        ("precequ.qh.obla %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +
> +    if (result != rd) {
> +        printf("precequ.qh.obla error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/precequ_qh_obla.c b/tests/tcg/mips/mips64-dsp/precequ_qh_obla.c
> new file mode 100644
> index 0000000..93a36a4
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/precequ_qh_obla.c
> @@ -0,0 +1,22 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, result;
> +    rt = 0x123456789ABCDEF0;
> +    result = 0x09002B004D006F00;
> +
> +    __asm
> +        ("precequ.qh.obla %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +
> +    if (result != rd) {
> +        printf("precequ.qh.obla error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/precequ_qh_obr.c b/tests/tcg/mips/mips64-dsp/precequ_qh_obr.c
> new file mode 100644
> index 0000000..1214730
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/precequ_qh_obr.c
> @@ -0,0 +1,24 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, result;
> +
> +    rt = 0x123456789ABCDEF0;
> +    result = 0x4D005E006F007000;
> +
> +    __asm
> +        ("precequ.qh.obr %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +
> +    if (result != rd) {
> +        printf("precequ.qh.obr error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> +
> diff --git a/tests/tcg/mips/mips64-dsp/precequ_qh_obra.c b/tests/tcg/mips/mips64-dsp/precequ_qh_obra.c
> new file mode 100644
> index 0000000..3aa0e09
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/precequ_qh_obra.c
> @@ -0,0 +1,24 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, result;
> +
> +    rt = 0x123456789ABCDEF0;
> +    result = 0x1A003C005D007000;
> +
> +    __asm
> +        ("precequ.qh.obra %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +
> +    if (result != rd) {
> +        printf("precequ.qh.obra error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> +
> diff --git a/tests/tcg/mips/mips64-dsp/preceu_ph_qbl.c b/tests/tcg/mips/mips64-dsp/preceu_ph_qbl.c
> new file mode 100644
> index 0000000..81f7917
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/preceu_ph_qbl.c
> @@ -0,0 +1,23 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt;
> +    long long result;
> +
> +    rt = 0x87654321;
> +    result = 0x00870065;
> +
> +    __asm
> +        ("preceu.ph.qbl %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    if (result != rd) {
> +        printf("preceu.ph.qbl wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/preceu_ph_qbla.c b/tests/tcg/mips/mips64-dsp/preceu_ph_qbla.c
> new file mode 100644
> index 0000000..38cf6a6
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/preceu_ph_qbla.c
> @@ -0,0 +1,23 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt;
> +    long long result;
> +
> +    rt = 0x87654321;
> +    result = 0x00870043;
> +
> +    __asm
> +        ("preceu.ph.qbla %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    if (result != rd) {
> +        printf("preceu.ph.qbla wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/preceu_ph_qbr.c b/tests/tcg/mips/mips64-dsp/preceu_ph_qbr.c
> new file mode 100644
> index 0000000..70c32b6
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/preceu_ph_qbr.c
> @@ -0,0 +1,23 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt;
> +    long long result;
> +
> +    rt = 0x87654321;
> +    result = 0x00430021;
> +
> +    __asm
> +        ("preceu.ph.qbr %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    if (result != rd) {
> +        printf("preceu.ph.qbr wrong");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/preceu_ph_qbra.c b/tests/tcg/mips/mips64-dsp/preceu_ph_qbra.c
> new file mode 100644
> index 0000000..c6638aa
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/preceu_ph_qbra.c
> @@ -0,0 +1,23 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt;
> +    long long result;
> +
> +    rt = 0x87654321;
> +    result = 0x00650021;
> +
> +    __asm
> +        ("preceu.ph.qbra %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    if (result != rd) {
> +        printf("preceu.ph.qbra wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/preceu_qh_obl.c b/tests/tcg/mips/mips64-dsp/preceu_qh_obl.c
> new file mode 100644
> index 0000000..63f9373
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/preceu_qh_obl.c
> @@ -0,0 +1,22 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, result;
> +    rt = 0x123456789ABCDEF0;
> +    result = 0x0012003400560078;
> +
> +    __asm
> +        ("preceu.qh.obl %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +
> +    if (result != rd) {
> +        printf("preceu.qh.obl error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/preceu_qh_obla.c b/tests/tcg/mips/mips64-dsp/preceu_qh_obla.c
> new file mode 100644
> index 0000000..5fb65e4
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/preceu_qh_obla.c
> @@ -0,0 +1,22 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, result;
> +    rt = 0x123456789ABCDEF0;
> +    result = 0x00120056009A00DE;
> +
> +    __asm
> +        ("preceu.qh.obla %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +
> +    if (result != rd) {
> +        printf("preceu.qh.obla error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/preceu_qh_obr.c b/tests/tcg/mips/mips64-dsp/preceu_qh_obr.c
> new file mode 100644
> index 0000000..9af3b63
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/preceu_qh_obr.c
> @@ -0,0 +1,23 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, result;
> +
> +    rt = 0x123456789ABCDEF0;
> +    result = 0x009A00BC00DE00F0;
> +
> +    __asm
> +        ("preceu.qh.obr %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +
> +    if (result != rd) {
> +        printf("preceu.qh.obr error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/preceu_qh_obra.c b/tests/tcg/mips/mips64-dsp/preceu_qh_obra.c
> new file mode 100644
> index 0000000..fd04083
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/preceu_qh_obra.c
> @@ -0,0 +1,23 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, result;
> +
> +    rt = 0x123456789ABCDEF0;
> +    result = 0x0034007800BC00F0;
> +
> +    __asm
> +        ("preceu.qh.obra %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +
> +    if (result != rd) {
> +        printf("preceu.qh.obra error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/precr_ob_qh.c b/tests/tcg/mips/mips64-dsp/precr_ob_qh.c
> new file mode 100644
> index 0000000..ce2da79
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/precr_ob_qh.c
> @@ -0,0 +1,25 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt;
> +    long long res;
> +
> +    rs = 0x1234567812345678;
> +    rt = 0x8765432187654321;
> +
> +    res = 0x3478347865216521;
> +
> +    __asm
> +        ("precr.ob.qh %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    if (rd != res) {
> +        printf("precr.ob.qh error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/precr_sra_qh_pw.c b/tests/tcg/mips/mips64-dsp/precr_sra_qh_pw.c
> new file mode 100644
> index 0000000..8bb16de
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/precr_sra_qh_pw.c
> @@ -0,0 +1,40 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt;
> +    long long res;
> +
> +    rt = 0x8765432187654321;
> +    rs = 0x1234567812345678;
> +
> +    res = 0x4321432156785678;
> +
> +    __asm
> +        ("precr_sra.qh.pw %0, %1, 0x0\n\t"
> +         : "=r"(rt)
> +         : "r"(rs)
> +        );
> +
> +    if (rt != res) {
> +        printf("precr_sra.qh.pw error\n");
> +        return -1;
> +    }
> +
> +    rt = 0x8765432187654321;
> +    rs = 0x1234567812345678;
> +
> +    res = 0x5432543245674567;
> +
> +    __asm
> +        ("precr_sra.qh.pw %0, %1, 0x4\n\t"
> +         : "=r"(rt)
> +         : "r"(rs)
> +        );
> +
> +    if (rt != res) {
> +        printf("precr_sra.qh.pw error\n");
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/precr_sra_r_qh_pw.c b/tests/tcg/mips/mips64-dsp/precr_sra_r_qh_pw.c
> new file mode 100644
> index 0000000..734ac32
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/precr_sra_r_qh_pw.c
> @@ -0,0 +1,40 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, rt;
> +    long long res;
> +
> +    rt = 0x8765432187654321;
> +    rs = 0x1234567812345678;
> +
> +    res = 0x4321432156785678;
> +
> +    __asm
> +        ("precr_sra_r.qh.pw %0, %1, 0x0\n\t"
> +         : "=r"(rt)
> +         : "r"(rs)
> +        );
> +
> +    if (rt != res) {
> +        printf("precr_sra_r.qh.pw error\n");
> +        return -1;
> +    }
> +
> +    rt = 0x8765432187654321;
> +    rs = 0x1234567812345678;
> +
> +    res = 0x5432543245684568;
> +
> +    __asm
> +        ("precr_sra_r.qh.pw %0, %1, 0x4\n\t"
> +         : "=r"(rt)
> +         : "r"(rs)
> +        );
> +
> +    if (rt != res) {
> +        printf("precr_sra_r.qh.pw error\n");
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/precrq_ob_qh.c b/tests/tcg/mips/mips64-dsp/precrq_ob_qh.c
> new file mode 100644
> index 0000000..4f61b17
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/precrq_ob_qh.c
> @@ -0,0 +1,25 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt;
> +    long long res;
> +
> +    rs = 0x1234567812345678;
> +    rt = 0x8765432187654321;
> +
> +    res = 0x1256125687438743;
> +
> +    __asm
> +        ("precrq.ob.qh %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    if (rd != res) {
> +        printf("precrq.ob.qh error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/precrq_ph_w.c b/tests/tcg/mips/mips64-dsp/precrq_ph_w.c
> new file mode 100644
> index 0000000..f0946ab
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/precrq_ph_w.c
> @@ -0,0 +1,24 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt;
> +    long long result;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result = 0x12348765;
> +
> +    __asm
> +        ("precrq.ph.w %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if (result != rd) {
> +        printf("precrq.ph.w wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/precrq_pw_l.c b/tests/tcg/mips/mips64-dsp/precrq_pw_l.c
> new file mode 100644
> index 0000000..da957c0
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/precrq_pw_l.c
> @@ -0,0 +1,25 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt;
> +    long long res;
> +
> +    rs = 0x1234567812345678;
> +    rt = 0x8765432187654321;
> +
> +    res = 0x1234567887654321;
> +
> +    __asm
> +        ("precrq.pw.l %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    if (rd != res) {
> +        printf("precrq.pw.l error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/precrq_qb_ph.c b/tests/tcg/mips/mips64-dsp/precrq_qb_ph.c
> new file mode 100644
> index 0000000..f417c9f
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/precrq_qb_ph.c
> @@ -0,0 +1,24 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt;
> +    long long result;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result = 0x12568743;
> +
> +    __asm
> +        ("precrq.qb.ph %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if (result != rd) {
> +        printf("precrq.qb.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/precrq_qh_pw.c b/tests/tcg/mips/mips64-dsp/precrq_qh_pw.c
> new file mode 100644
> index 0000000..4a4ffef
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/precrq_qh_pw.c
> @@ -0,0 +1,25 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt;
> +    long long res;
> +
> +    rs = 0x1234567812345678;
> +    rt = 0x8765432187654321;
> +
> +    res = 0x1234123487658765;
> +
> +    __asm
> +        ("precrq.qh.pw %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    if (rd != res) {
> +        printf("precrq.qh.pw error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/precrq_rs_ph_w.c b/tests/tcg/mips/mips64-dsp/precrq_rs_ph_w.c
> new file mode 100644
> index 0000000..42e674b
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/precrq_rs_ph_w.c
> @@ -0,0 +1,24 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt;
> +    long long result;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result = 0x12348765;
> +
> +    __asm
> +        ("precrq_rs.ph.w %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if (result != rd) {
> +        printf("precrq_rs.ph.w wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/precrq_rs_qh_pw.c b/tests/tcg/mips/mips64-dsp/precrq_rs_qh_pw.c
> new file mode 100644
> index 0000000..9826510
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/precrq_rs_qh_pw.c
> @@ -0,0 +1,25 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt;
> +    long long res;
> +
> +    rs = 0x1234567812345678;
> +    rt = 0x8765432187654321;
> +
> +    res = 0x1234123487658765;
> +
> +    __asm
> +        ("precrq_rs.qh.pw %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +
> +    if (rd != res) {
> +        printf("precrq_rs.qh.pw error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/precrqu_s_ob_qh.c b/tests/tcg/mips/mips64-dsp/precrqu_s_ob_qh.c
> new file mode 100644
> index 0000000..dc8a643
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/precrqu_s_ob_qh.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, dsp;
> +    long long res, resdsp;
> +
> +    rs = 0x1234567812345678;
> +    rt = 0x8765432187654321;
> +
> +    res = 0x24ac24ac00860086;
> +    resdsp = 0x1;
> +
> +    __asm
> +        ("precrqu_s.ob.qh %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 22) & 0x1;
> +    if ((rd != res) || (dsp != resdsp)) {
> +        printf("precrq_s.ob.qh error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/precrqu_s_qb_ph.c b/tests/tcg/mips/mips64-dsp/precrqu_s_qb_ph.c
> new file mode 100644
> index 0000000..a3ab898
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/precrqu_s_qb_ph.c
> @@ -0,0 +1,24 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt;
> +    long long result;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result = 0x24AC0086;
> +
> +    __asm
> +        ("precrqu_s.qb.ph %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs), "r"(rt)
> +        );
> +    if (result != rd) {
> +        printf("precrqu_s.qb.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/prependd.c b/tests/tcg/mips/mips64-dsp/prependd.c
> new file mode 100644
> index 0000000..b4208c2
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/prependd.c
> @@ -0,0 +1,37 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs;
> +    long long res;
> +    rt = 0x1234567887654321;
> +    rs = 0xabcd1234abcd8765;
> +
> +    res = 0x1234567887654321;
> +    __asm
> +        ("prependd %0, %1, 0x0\n\t"
> +         : "=r"(rt)
> +         : "r"(rs)
> +        );
> +
> +    if (rt != res) {
> +        printf("prependd error\n");
> +        return -1;
> +    }
> +
> +    rt = 0x1234567887654321;
> +    rs = 0xabcd1234abcd8765;
> +
> +    res = 0xd876512345678876;
> +    __asm
> +        ("prependd %0, %1, 0x4\n\t"
> +         : "=r"(rt)
> +         : "r"(rs)
> +        );
> +
> +    if (rt != res) {
> +        printf("prependd error\n");
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/prependw.c b/tests/tcg/mips/mips64-dsp/prependw.c
> new file mode 100644
> index 0000000..d91bd20
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/prependw.c
> @@ -0,0 +1,37 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rt, rs;
> +    long long res;
> +    rt = 0x1234567887654321;
> +    rs = 0xabcd1234abcd8765;
> +
> +    res = 0x1234567887654321;
> +    __asm
> +        ("prependw %0, %1, 0x0\n\t"
> +         : "=r"(rt)
> +         : "r"(rs)
> +        );
> +
> +    if (rt != res) {
> +        printf("prependw error\n");
> +        return -1;
> +    }
> +
> +    rt = 0x1234567887654321;
> +    rs = 0xabcd1234abcd8765;
> +
> +    res = 0x5123456788765432;
> +    __asm
> +        ("prependw %0, %1, 0x4\n\t"
> +         : "=r"(rt)
> +         : "r"(rs)
> +        );
> +
> +    if (rt != res) {
> +        printf("prependw error\n");
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/printf.c b/tests/tcg/mips/mips64-dsp/printf.c
> new file mode 100644
> index 0000000..cf8676d
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/printf.c
> @@ -0,0 +1,266 @@
> +
> +typedef unsigned long va_list;
> +
> +#define ACC    4
> +#define __read(source)                    \
> +({ va_list __res;                    \
> +    __asm__ __volatile__(                \
> +        "move\t%0, " #source "\n\t"        \
> +        : "=r" (__res));            \
> +    __res;                        \
> +})
> +
> +enum format_type {
> +    FORMAT_TYPE_NONE,
> +    FORMAT_TYPE_HEX,
> +    FORMAT_TYPE_ULONG,
> +    FORMAT_TYPE_FLOAT
> +};
> +
> +struct printf_spec {
> +    char    type;
> +};
> +
> +static int format_decode(char *fmt, struct printf_spec *spec)
> +{
> +    char *start = fmt;
> +
> +    for (; *fmt ; ++fmt) {
> +        if (*fmt == '%') {
> +            break;
> +        }
> +    }
> +
> +    switch (*++fmt) {
> +    case 'x':
> +        spec->type = FORMAT_TYPE_HEX;
> +        break;
> +
> +    case 'd':
> +        spec->type = FORMAT_TYPE_ULONG;
> +        break;
> +
> +    case 'f':
> +        spec->type = FORMAT_TYPE_FLOAT;
> +        break;
> +
> +    default:
> +        spec->type = FORMAT_TYPE_NONE;
> +    }
> +
> +    return ++fmt - start;
> +}
> +
> +void *memcpy(void *dest, void *src, int n)
> +{
> +    int i;
> +    char *s = src;
> +    char *d = dest;
> +
> +    for (i = 0; i < n; i++) {
> +        d[i] = s[i];
> +    }
> +    return dest;
> +}
> +
> +char *number(char *buf, va_list num)
> +{
> +    int i;
> +    char *str = buf;
> +    static char digits[16] = "0123456789abcdef";
> +    str = str + sizeof(num) * 2;
> +
> +    for (i = 0; i < sizeof(num) * 2; i++) {
> +        *--str = digits[num & 15];
> +        num >>= 4;
> +    }
> +
> +    return buf + sizeof(num) * 2;
> +}
> +
> +char *__number(char *buf, va_list num)
> +{
> +    int i;
> +    va_list mm = num;
> +    char *str = buf;
> +
> +    if (!num) {
> +        *str++ = '0';
> +        return str;
> +    }
> +
> +    for (i = 0; mm; mm = mm/10, i++) {
> +        /* Do nothing. */
> +    }
> +
> +    str = str + i;
> +
> +    while (num) {
> +        *--str = num % 10 + 48;
> +        num = num / 10;
> +    }
> +
> +    return str + i;
> +}
> +
> +va_list modf(va_list args, va_list *integer, va_list *num)
> +{
> +    int i;
> +    double dot_v = 0;
> +    va_list E, DOT, DOT_V;
> +
> +    if (!args) {
> +        return 0;
> +    }
> +
> +    for (i = 0, args = args << 1 >> 1; i < 52; i++) {
> +        if ((args >> i) & 0x1) {
> +            break;
> +        }
> +    }
> +
> +    *integer = 0;
> +
> +    if ((args >> 56 != 0x3f) || (args >> 52 == 0x3ff)) {
> +        E = (args >> 52) - 1023;
> +        DOT = 52 - E - i;
> +        DOT_V = args << (12 + E) >> (12 + E) >> i;
> +        *integer = ((args << 12 >> 12) >> (i + DOT)) | (1 << E);
> +    } else {
> +        E = ~((args >> 52) - 1023) + 1;
> +        DOT_V = args << 12 >> 12;
> +
> +        dot_v += 1.0 / (1 << E);
> +
> +        for (i = 1; i <= 16; i++) {
> +            if ((DOT_V >> (52 - i)) & 0x1) {
> +                dot_v += 1.0 / (1 << E + i);
> +            }
> +        }
> +
> +        for (i = 1, E = 0; i <= ACC; i++) {
> +            dot_v *= 10;
> +            if (!(va_list)dot_v) {
> +                E++;
> +            }
> +    }
> +
> +    *num = E;
> +
> +    return dot_v;
> +    }
> +
> +    if (args & 0xf) {
> +        for (i = 1; i <= 16; i++) {
> +            if ((DOT_V >> (DOT - i)) & 0x1) {
> +                dot_v += 1.0 / (1 << i);
> +            }
> +        }
> +
> +        for (i = 1, E = 0; i <= ACC; i++) {
> +            dot_v *= 10;
> +            if (!(va_list)dot_v) {
> +                E++;
> +            }
> +        }
> +
> +        *num = E;
> +
> +        return dot_v;
> +    } else if (DOT) {
> +        for (i = 1; i <= DOT; i++) {
> +            if ((DOT_V >> (DOT - i)) & 0x1) {
> +                dot_v += 1.0 / (1 << i);
> +            }
> +        }
> +
> +        for (i = 1; i <= ACC; i++) {
> +            dot_v = dot_v * 10;
> +        }
> +
> +    return dot_v;
> +    }
> +
> +    return 0;
> +}
> +
> +int vsnprintf(char *buf, int size, char *fmt, va_list args)
> +{
> +    char *str, *mm;
> +    struct printf_spec spec = {0};
> +
> +    str = mm = buf;
> +
> +    while (*fmt) {
> +        char *old_fmt = fmt;
> +        int read = format_decode(fmt, &spec);
> +
> +        fmt += read;
> +
> +        switch (spec.type) {
> +        case FORMAT_TYPE_NONE: {
> +            memcpy(str, old_fmt, read);
> +            str += read;
> +            break;
> +        }
> +        case FORMAT_TYPE_HEX: {
> +            memcpy(str, old_fmt, read);
> +            str = number(str + read, args);
> +            for (; *mm ; ++mm) {
> +                if (*mm == '%') {
> +                    *mm = '0';
> +                break;
> +                }
> +            }
> +        break;
> +        }
> +        case FORMAT_TYPE_ULONG: {
> +            memcpy(str, old_fmt, read - 2);
> +            str = __number(str + read - 2, args);
> +            break;
> +        }
> +        case FORMAT_TYPE_FLOAT: {
> +            va_list integer, dot_v, num;
> +            dot_v = modf(args, &integer, &num);
> +            memcpy(str, old_fmt, read - 2);
> +            str += read - 2;
> +            if ((args >> 63 & 0x1)) {
> +                *str++ = '-';
> +            }
> +            str = __number(str, integer);
> +            if (dot_v) {
> +                *str++ = '.';
> +                while (num--) {
> +                    *str++ = '0';
> +                }
> +                str = __number(str, dot_v);
> +            }
> +            break;
> +        }
> +        }
> +    }
> +    *str = '\0';
> +
> +    return str - buf;
> +}
> +
> +static void serial_out(char *str)
> +{
> +    while (*str) {
> +        *(char *)0xffffffffb80003f8 = *str++;
> +    }
> +}
> +
> +int vprintf(char *fmt, va_list args)
> +{
> +    int printed_len = 0;
> +    static char printf_buf[512];
> +    printed_len = vsnprintf(printf_buf, sizeof(printf_buf), fmt, args);
> +    serial_out(printf_buf);
> +    return printed_len;
> +}
> +
> +int printf(char *fmt, ...)
> +{
> +    return vprintf(fmt, __read($5));
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/raddu_l_ob.c b/tests/tcg/mips/mips64-dsp/raddu_l_ob.c
> new file mode 100644
> index 0000000..76ddf25
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/raddu_l_ob.c
> @@ -0,0 +1,22 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, result;
> +    rs = 0x12345678ABCDEF0;
> +    result = 0x000000000001E258;
> +
> +    __asm
> +        ("raddu.l.ob %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rs)
> +        );
> +
> +    if (rd != result) {
> +        printf("raddu.l.ob error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/raddu_w_qb.c b/tests/tcg/mips/mips64-dsp/raddu_w_qb.c
> new file mode 100644
> index 0000000..c9d6535
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/raddu_w_qb.c
> @@ -0,0 +1,23 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs;
> +    long long result;
> +
> +    rs = 0x12345678;
> +    result = 0x114;
> +
> +    __asm
> +        ("raddu.w.qb %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rs)
> +        );
> +    if (rd != result) {
> +        printf("raddu.w.qb wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/rddsp.c b/tests/tcg/mips/mips64-dsp/rddsp.c
> new file mode 100644
> index 0000000..7165572
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/rddsp.c
> @@ -0,0 +1,53 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long dsp_i, dsp_o;
> +    long long ccond_i, outflag_i, efi_i, c_i, scount_i, pos_i;
> +    long long ccond_o, outflag_o, efi_o, c_o, scount_o, pos_o;
> +    long long ccond_r, outflag_r, efi_r, c_r, scount_r, pos_r;
> +
> +    ccond_i   = 0x000000BC;/* 4 */
> +    outflag_i = 0x0000001B;/* 3 */
> +    efi_i     = 0x00000001;/* 5 */
> +    c_i       = 0x00000001;/* 2 */
> +    scount_i  = 0x0000000F;/* 1 */
> +    pos_i     = 0x0000000C;/* 0 */
> +
> +    dsp_i = (ccond_i   << 24) | \
> +            (outflag_i << 16) | \
> +            (efi_i     << 14) | \
> +            (c_i       << 13) | \
> +            (scount_i  <<  7) | \
> +            pos_i;
> +
> +    ccond_r   = ccond_i;
> +    outflag_r = outflag_i;
> +    efi_r     = efi_i;
> +    c_r       = c_i;
> +    scount_r  = scount_i;
> +    pos_r     = pos_i;
> +
> +    __asm
> +        ("wrdsp %1, 0x3F\n\t"
> +         "rddsp %0, 0x3F\n\t"
> +         : "=r"(dsp_o)
> +         : "r"(dsp_i)
> +        );
> +
> +    ccond_o   = (dsp_o >> 24) & 0xFF;
> +    outflag_o = (dsp_o >> 16) & 0xFF;
> +    efi_o     = (dsp_o >> 14) & 0x01;
> +    c_o       = (dsp_o >> 14) & 0x01;
> +    scount_o  = (dsp_o >>  7) & 0x3F;
> +    pos_o     =  dsp_o & 0x1F;
> +
> +    if ((ccond_o != ccond_r) || (outflag_o != outflag_r) || (efi_o != efi_r) \
> +            || (c_o != c_r) || (scount_o != scount_r) || (pos_o != pos_r)) {
> +        printf("rddsp wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/repl_ob.c b/tests/tcg/mips/mips64-dsp/repl_ob.c
> new file mode 100644
> index 0000000..20cb780
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/repl_ob.c
> @@ -0,0 +1,21 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, result;
> +    rd = 0;
> +    result = 0xFFFFFFFFFFFFFFFF;
> +
> +    __asm
> +        ("repl.ob %0, 0xFF\n\t"
> +         : "=r"(rd)
> +        );
> +
> +    if (result != rd) {
> +        printf("repl.ob error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/repl_ph.c b/tests/tcg/mips/mips64-dsp/repl_ph.c
> new file mode 100644
> index 0000000..11d29bd
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/repl_ph.c
> @@ -0,0 +1,30 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, result;
> +
> +    result = 0x01BF01BF;
> +    __asm
> +        ("repl.ph %0, 0x1BF\n\t"
> +         : "=r"(rd)
> +        );
> +    if (rd != result) {
> +        printf("repl.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    result = 0x01FF01FF;
> +    __asm
> +        ("repl.ph %0, 0x01FF\n\t"
> +         : "=r"(rd)
> +        );
> +    if (rd != result) {
> +        printf("repl.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/repl_pw.c b/tests/tcg/mips/mips64-dsp/repl_pw.c
> new file mode 100644
> index 0000000..d35376a
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/repl_pw.c
> @@ -0,0 +1,34 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, result;
> +    rd = 0;
> +    result = 0x000001FF000001FF;
> +
> +    __asm
> +        ("repl.pw %0, 0x1FF\n\t"
> +         : "=r"(rd)
> +        );
> +
> +    if (result != rd) {
> +        printf("repl.pw error1\n");
> +
> +        return -1;
> +    }
> +
> +    rd = 0;
> +    result = 0xFFFFFE00FFFFFE00;
> +    __asm
> +        ("repl.pw %0, 0xFFFFFFFFFFFFFE00\n\t"
> +         : "=r"(rd)
> +        );
> +
> +    if (result != rd) {
> +        printf("repl.pw error2\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/repl_qb.c b/tests/tcg/mips/mips64-dsp/repl_qb.c
> new file mode 100644
> index 0000000..592feae
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/repl_qb.c
> @@ -0,0 +1,19 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, result;
> +
> +    result = 0xFFFFFFFFBFBFBFBF;
> +    __asm
> +        ("repl.qb %0, 0xBF\n\t"
> +         : "=r"(rd)
> +        );
> +    if (rd != result) {
> +        printf("repl.qb wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/repl_qh.c b/tests/tcg/mips/mips64-dsp/repl_qh.c
> new file mode 100644
> index 0000000..82afc37
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/repl_qh.c
> @@ -0,0 +1,34 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, result;
> +    rd = 0;
> +    result = 0x01FF01FF01FF01FF;
> +
> +    __asm
> +        ("repl.qh %0, 0x1FF\n\t"
> +         : "=r"(rd)
> +        );
> +
> +    if (result != rd) {
> +        printf("repl.qh error 1\n");
> +
> +        return -1;
> +    }
> +
> +    rd = 0;
> +    result = 0xFE00FE00FE00FE00;
> +    __asm
> +        ("repl.qh %0, 0xFFFFFFFFFFFFFE00\n\t"
> +         : "=r"(rd)
> +        );
> +
> +    if (result != rd) {
> +        printf("repl.qh error 2\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/replv_ob.c b/tests/tcg/mips/mips64-dsp/replv_ob.c
> new file mode 100644
> index 0000000..31ff318
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/replv_ob.c
> @@ -0,0 +1,23 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, result;
> +
> +    rt = 0xFF;
> +    result = 0xFFFFFFFFFFFFFFFF;
> +
> +    __asm
> +        ("replv.ob %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +
> +    if (result != rd) {
> +        printf("replv.ob error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/replv_ph.c b/tests/tcg/mips/mips64-dsp/replv_ph.c
> new file mode 100644
> index 0000000..0af7a36
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/replv_ph.c
> @@ -0,0 +1,22 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt;
> +    long long result;
> +
> +    rt = 0x12345678;
> +    result = 0x56785678;
> +    __asm
> +        ("replv.ph %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    if (rd != result) {
> +        printf("replv.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/replv_pw.c b/tests/tcg/mips/mips64-dsp/replv_pw.c
> new file mode 100644
> index 0000000..e1789af
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/replv_pw.c
> @@ -0,0 +1,23 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, result;
> +    rd = 0;
> +    rt = 0xFFFFFFFF;
> +    result = 0xFFFFFFFFFFFFFFFF;
> +
> +    __asm
> +        ("replv.pw %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +
> +    if (result != rd) {
> +        printf("replv.pw error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/replv_qb.c b/tests/tcg/mips/mips64-dsp/replv_qb.c
> new file mode 100644
> index 0000000..d99298c
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/replv_qb.c
> @@ -0,0 +1,22 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt;
> +    long long result;
> +
> +    rt     = 0x12345678;
> +    result = 0x78787878;
> +    __asm
> +        ("replv.qb %0, %1\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    if (rd != result) {
> +        printf("replv.qb wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shilo.c b/tests/tcg/mips/mips64-dsp/shilo.c
> new file mode 100644
> index 0000000..5f454f6
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shilo.c
> @@ -0,0 +1,29 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long ach, acl;
> +    long long resulth, resultl;
> +
> +    ach = 0xBBAACCFF;
> +    acl = 0x1C3B001D;
> +
> +    resulth = 0x17755;
> +    resultl = 0xFFFFFFFF99fe3876;
> +
> +    __asm
> +        ("mthi %0, $ac1\n\t"
> +         "mtlo %1, $ac1\n\t"
> +         "shilo $ac1, 0x0F\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "+r"(ach), "+r"(acl)
> +        );
> +    if ((ach != resulth) || (acl != resultl)) {
> +        printf("shilo wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shilov.c b/tests/tcg/mips/mips64-dsp/shilov.c
> new file mode 100644
> index 0000000..e82615a
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shilov.c
> @@ -0,0 +1,31 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rs, ach, acl;
> +    long long resulth, resultl;
> +
> +    rs  = 0x0F;
> +    ach = 0xBBAACCFF;
> +    acl = 0x1C3B001D;
> +
> +    resulth = 0x17755;
> +    resultl = 0xFFFFFFFF99fe3876;
> +
> +    __asm
> +        ("mthi %0, $ac1\n\t"
> +         "mtlo %1, $ac1\n\t"
> +         "shilov $ac1, %2\n\t"
> +         "mfhi %0, $ac1\n\t"
> +         "mflo %1, $ac1\n\t"
> +         : "+r"(ach), "+r"(acl)
> +         : "r"(rs)
> +        );
> +    if ((ach != resulth) || (acl != resultl)) {
> +        printf("shilov wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shll_ob.c b/tests/tcg/mips/mips64-dsp/shll_ob.c
> new file mode 100644
> index 0000000..de9e6d0
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shll_ob.c
> @@ -0,0 +1,26 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, dsp;
> +    long long res, resdsp;
> +
> +    rt = 0x9ba8765433456789;
> +    res = 0xd840b0a098283848;
> +    resdsp = 0x1;
> +    __asm
> +        ("shll.ob %0, %2, 0x3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rt)
> +        );
> +
> +    dsp = (dsp >> 22) & 0x1;
> +
> +    if ((dsp != resdsp) || (rd != res)) {
> +        printf("shll.ob error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shll_ph.c b/tests/tcg/mips/mips64-dsp/shll_ph.c
> new file mode 100644
> index 0000000..2a30c1a
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shll_ph.c
> @@ -0,0 +1,26 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, dsp;
> +    long long result, resultdsp;
> +
> +    rt        = 0x12345678;
> +    result    = 0xFFFFFFFFA000C000;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("shll.ph %0, %2, 0x0B\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rt)
> +        );
> +    dsp = (dsp >> 22) & 0x01;
> +    if ((dsp != resultdsp) || (rd  != result)) {
> +        printf("shll.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shll_pw.c b/tests/tcg/mips/mips64-dsp/shll_pw.c
> new file mode 100644
> index 0000000..63dbae5
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shll_pw.c
> @@ -0,0 +1,26 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, dsp;
> +    long long result, resultdsp;
> +
> +    rt        = 0x8765432112345678;
> +    result    = 0x6543210034567800;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("shll.pw %0, %2, 0x8\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rt)
> +        );
> +
> +    dsp = (dsp >> 22) & 0x01;
> +    if ((dsp != resultdsp) || (rd  != result)) {
> +        printf("shll.pw wrong\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shll_qb.c b/tests/tcg/mips/mips64-dsp/shll_qb.c
> new file mode 100644
> index 0000000..c21ab66
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shll_qb.c
> @@ -0,0 +1,26 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, dsp;
> +    long long result, resultdsp;
> +
> +    rt     = 0x87654321;
> +    result = 0x38281808;
> +    resultdsp = 0x01;
> +
> +    __asm
> +        ("shll.qb %0, %2, 0x03\n\t"
> +         "rddsp   %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rt)
> +        );
> +    dsp = (dsp >> 22) & 0x01;
> +    if (rd != result) {
> +        printf("shll.qb wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shll_qh.c b/tests/tcg/mips/mips64-dsp/shll_qh.c
> new file mode 100644
> index 0000000..067a6e5
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shll_qh.c
> @@ -0,0 +1,26 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, dsp;
> +    long long res, resdsp;
> +
> +    rt = 0x9ba8765433456789;
> +    res = 0xdd40b2a09a283c48;
> +    resdsp = 0x1;
> +    __asm
> +        ("shll.qh %0, %2, 0x3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rt)
> +        );
> +
> +    dsp = (dsp >> 22) & 0x1;
> +
> +    if ((dsp != resdsp) || (rd != res)) {
> +        printf("shll.qh error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shll_s_ph.c b/tests/tcg/mips/mips64-dsp/shll_s_ph.c
> new file mode 100644
> index 0000000..3d96f6e
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shll_s_ph.c
> @@ -0,0 +1,26 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, dsp;
> +    long long result, resultdsp;
> +
> +    rt        = 0x12345678;
> +    result    = 0x7FFF7FFF;
> +    resultdsp = 0x01;
> +
> +    __asm
> +        ("shll_s.ph %0, %2, 0x0B\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rt)
> +        );
> +    dsp = (dsp >> 22) & 0x01;
> +    if ((dsp != resultdsp) || (rd  != result)) {
> +        printf("shll_s.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shll_s_pw.c b/tests/tcg/mips/mips64-dsp/shll_s_pw.c
> new file mode 100644
> index 0000000..e5190ed
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shll_s_pw.c
> @@ -0,0 +1,26 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, dsp;
> +    long long result, resultdsp;
> +
> +    rt        = 0x8765432112345678;
> +    result    = 0x800000007fffffff;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("shll_s.pw %0, %2, 0x8\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rt)
> +        );
> +
> +    dsp = (dsp >> 22) & 0x01;
> +    if ((dsp != resultdsp) || (rd  != result)) {
> +        printf("shll_s.pw wrong\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shll_s_qh.c b/tests/tcg/mips/mips64-dsp/shll_s_qh.c
> new file mode 100644
> index 0000000..eae0fd9
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shll_s_qh.c
> @@ -0,0 +1,26 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, dsp;
> +    long long res, resdsp;
> +
> +    rt = 0x9ba8765433456789;
> +    res = 0x80007fff7fff7fff;
> +    resdsp = 0x1;
> +    __asm
> +        ("shll_s.qh %0, %2, 0x3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rt)
> +        );
> +
> +    dsp = (dsp >> 22) & 0x1;
> +
> +    if ((dsp != resdsp) || (rd != res)) {
> +        printf("shll_s.qh error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shll_s_w.c b/tests/tcg/mips/mips64-dsp/shll_s_w.c
> new file mode 100644
> index 0000000..5780061
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shll_s_w.c
> @@ -0,0 +1,26 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, dsp;
> +    long long result, resultdsp;
> +
> +    rt        = 0x12345678;
> +    result    = 0x7FFFFFFF;
> +    resultdsp = 0x01;
> +
> +    __asm
> +        ("shll_s.w %0, %2, 0x0B\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rt)
> +        );
> +    dsp = (dsp >> 22) & 0x01;
> +    if ((dsp != resultdsp) || (rd  != result)) {
> +        printf("shll_s.w wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shllv_ob.c b/tests/tcg/mips/mips64-dsp/shllv_ob.c
> new file mode 100644
> index 0000000..fe9bd4e
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shllv_ob.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, rs, dsp;
> +    long long result, resultdsp;
> +
> +    rt        = 0x8765432112345678;
> +    rs = 0x4;
> +    result    = 0x7050301020406080;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("shllv.ob %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rt), "r"(rs)
> +        );
> +
> +    dsp = (dsp >> 22) & 0x01;
> +    if ((dsp != resultdsp) || (rd  != result)) {
> +        printf("shllv.ob wrong\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shllv_ph.c b/tests/tcg/mips/mips64-dsp/shllv_ph.c
> new file mode 100644
> index 0000000..532291f
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shllv_ph.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, dsp;
> +    long long result, resultdsp;
> +
> +    rs        = 0x0B;
> +    rt        = 0x12345678;
> +    result    = 0xFFFFFFFFA000C000;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("shllv.ph %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rt), "r"(rs)
> +        );
> +    dsp = (dsp >> 22) & 0x01;
> +    if ((dsp != resultdsp) || (rd  != result)) {
> +        printf("shllv.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shllv_pw.c b/tests/tcg/mips/mips64-dsp/shllv_pw.c
> new file mode 100644
> index 0000000..59bf607
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shllv_pw.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, rs, dsp;
> +    long long result, resultdsp;
> +
> +    rt        = 0x8765432112345678;
> +    rs = 0x8;
> +    result    = 0x6543210034567800;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("shllv.pw %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rt), "r"(rs)
> +        );
> +
> +    dsp = (dsp >> 22) & 0x01;
> +    if ((dsp != resultdsp) || (rd  != result)) {
> +        printf("shllv.pw wrong\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shllv_qb.c b/tests/tcg/mips/mips64-dsp/shllv_qb.c
> new file mode 100644
> index 0000000..e49356b
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shllv_qb.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, dsp;
> +    long long result, resultdsp;
> +
> +    rs     = 0x03;
> +    rt     = 0x87654321;
> +    result = 0x38281808;
> +    resultdsp = 0x01;
> +
> +    __asm
> +        ("shllv.qb %0, %2, %3\n\t"
> +         "rddsp   %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rt), "r"(rs)
> +        );
> +    dsp = (dsp >> 22) & 0x01;
> +    if (rd != result) {
> +        printf("shllv.qb wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shllv_qh.c b/tests/tcg/mips/mips64-dsp/shllv_qh.c
> new file mode 100644
> index 0000000..2ba3ef1
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shllv_qh.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, rs, dsp;
> +    long long result, resultdsp;
> +
> +    rt        = 0x8765432112345678;
> +    rs = 0x4;
> +    result    = 0x7650321023406780;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("shllv.qh %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rt), "r"(rs)
> +        );
> +
> +    dsp = (dsp >> 22) & 0x01;
> +    if ((dsp != resultdsp) || (rd  != result)) {
> +        printf("shllv.qh wrong\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shllv_s_ph.c b/tests/tcg/mips/mips64-dsp/shllv_s_ph.c
> new file mode 100644
> index 0000000..7e69f94
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shllv_s_ph.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, dsp;
> +    long long result, resultdsp;
> +
> +    rs        = 0x0B;
> +    rt        = 0x12345678;
> +    result    = 0x7FFF7FFF;
> +    resultdsp = 0x01;
> +
> +    __asm
> +        ("shllv_s.ph %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rt), "r"(rs)
> +        );
> +    dsp = (dsp >> 22) & 0x01;
> +    if ((dsp != resultdsp) || (rd  != result)) {
> +        printf("shllv_s.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shllv_s_pw.c b/tests/tcg/mips/mips64-dsp/shllv_s_pw.c
> new file mode 100644
> index 0000000..215fc80
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shllv_s_pw.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, rs, dsp;
> +    long long result, resultdsp;
> +
> +    rt        = 0x8765432112345678;
> +    rs = 0x8;
> +    result    = 0x800000007fffffff;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("shllv_s.pw %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rt), "r"(rs)
> +        );
> +
> +    dsp = (dsp >> 22) & 0x01;
> +    if ((dsp != resultdsp) || (rd  != result)) {
> +        printf("shllv_s.pw wrong\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shllv_s_qh.c b/tests/tcg/mips/mips64-dsp/shllv_s_qh.c
> new file mode 100644
> index 0000000..ff2c868
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shllv_s_qh.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, rs, dsp;
> +    long long result, resultdsp;
> +
> +    rt        = 0x8765432112345678;
> +    rs = 0x4;
> +    result    = 0x80007fff7fff7fff;
> +    resultdsp = 1;
> +
> +    __asm
> +        ("shllv_s.qh %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rt), "r"(rs)
> +        );
> +
> +    dsp = (dsp >> 22) & 0x01;
> +    if ((dsp != resultdsp) || (rd  != result)) {
> +        printf("shllv_s.qh wrong\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shllv_s_w.c b/tests/tcg/mips/mips64-dsp/shllv_s_w.c
> new file mode 100644
> index 0000000..5f6af8b
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shllv_s_w.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, dsp;
> +    long long result, resultdsp;
> +
> +    rs        = 0x0B;
> +    rt        = 0x12345678;
> +    result    = 0x7FFFFFFF;
> +    resultdsp = 0x01;
> +
> +    __asm
> +        ("shllv_s.w %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rt), "r"(rs)
> +        );
> +    dsp = (dsp >> 22) & 0x01;
> +    if ((dsp != resultdsp) || (rd  != result)) {
> +        printf("shllv_s.w wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shra_ob.c b/tests/tcg/mips/mips64-dsp/shra_ob.c
> new file mode 100644
> index 0000000..95f0724
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shra_ob.c
> @@ -0,0 +1,22 @@
> +#include "io.h"
> +
> +int main()
> +{
> +    long long rd, rt;
> +    long long res;
> +
> +    rt = 0xbc98756abc654389;
> +    res = 0xfbf9f7f6fb0604f8;
> +
> +    __asm
> +        ("shra.ob %0, %1, 0x4\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +
> +    if (rd != res) {
> +        printf("shra.ob error\n");
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shra_ph.c b/tests/tcg/mips/mips64-dsp/shra_ph.c
> new file mode 100644
> index 0000000..a2dc014
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shra_ph.c
> @@ -0,0 +1,23 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt;
> +    long long result;
> +
> +    rt     = 0x87654321;
> +    result = 0xFFFFFFFFF0EC0864;
> +
> +    __asm
> +        ("shra.ph %0, %1, 0x03\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    if (rd != result) {
> +        printf("shra.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shra_pw.c b/tests/tcg/mips/mips64-dsp/shra_pw.c
> new file mode 100644
> index 0000000..693b7d5
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shra_pw.c
> @@ -0,0 +1,22 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt;
> +    long long res;
> +
> +    rt = 0x1234567887654321;
> +    res = 0x01234567f8765432;
> +
> +    __asm
> +        ("shra.pw %0, %1, 0x4"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +
> +    if (rd != res) {
> +        printf("shra.pw error\n");
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shra_qh.c b/tests/tcg/mips/mips64-dsp/shra_qh.c
> new file mode 100644
> index 0000000..89dd370
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shra_qh.c
> @@ -0,0 +1,24 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt;
> +    long long res;
> +
> +    rt = 0x8512345654323454;
> +
> +    res = 0xf851034505430345;
> +
> +    __asm
> +        ("shra.qh %0, %1, 0x4\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +
> +    if (rd != res) {
> +        printf("shra.qh error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shra_r_ob.c b/tests/tcg/mips/mips64-dsp/shra_r_ob.c
> new file mode 100644
> index 0000000..1847094
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shra_r_ob.c
> @@ -0,0 +1,22 @@
> +#include "io.h"
> +
> +int main()
> +{
> +    long long rd, rt;
> +    long long res;
> +
> +    rt = 0xbc98756abc654389;
> +    res = 0xfcfaf8f7fc0705f9;
> +
> +    __asm
> +        ("shra_r.ob %0, %1, 0x4\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +
> +    if (rd != res) {
> +        printf("shra_r.ob error\n");
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shra_r_ph.c b/tests/tcg/mips/mips64-dsp/shra_r_ph.c
> new file mode 100644
> index 0000000..e0943ad
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shra_r_ph.c
> @@ -0,0 +1,23 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt;
> +    long long result;
> +
> +    rt     = 0x87654321;
> +    result = 0xFFFFFFFFF0ED0864;
> +
> +    __asm
> +        ("shra_r.ph %0, %1, 0x03\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    if (rd != result) {
> +        printf("shra_r.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shra_r_pw.c b/tests/tcg/mips/mips64-dsp/shra_r_pw.c
> new file mode 100644
> index 0000000..e87a1d3
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shra_r_pw.c
> @@ -0,0 +1,22 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt;
> +    long long res;
> +
> +    rt = 0x1234567887654321;
> +    res = 0x01234568f8765432;
> +
> +    __asm
> +        ("shra_r.pw %0, %1, 0x4"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +
> +    if (rd != res) {
> +        printf("shra_r.pw error\n");
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shra_r_qh.c b/tests/tcg/mips/mips64-dsp/shra_r_qh.c
> new file mode 100644
> index 0000000..cc11dca
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shra_r_qh.c
> @@ -0,0 +1,23 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt;
> +    long long res;
> +
> +    rt = 0x8512345654323454;
> +    res = 0xf0a2068b0a86068b;
> +
> +    __asm
> +        ("shra_r.qh %0, %1, 0x3\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +
> +    if (rd != res) {
> +        printf("shra_r.qh error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shra_r_w.c b/tests/tcg/mips/mips64-dsp/shra_r_w.c
> new file mode 100644
> index 0000000..36d2c9c
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shra_r_w.c
> @@ -0,0 +1,23 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt;
> +    long long result;
> +
> +    rt     = 0x87654321;
> +    result = 0xFFFFFFFFF0ECA864;
> +
> +    __asm
> +        ("shra_r.w %0, %1, 0x03\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    if (rd != result) {
> +        printf("shra_r.w wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shrav_ph.c b/tests/tcg/mips/mips64-dsp/shrav_ph.c
> new file mode 100644
> index 0000000..1b4e983
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shrav_ph.c
> @@ -0,0 +1,24 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt;
> +    long long result;
> +
> +    rs     = 0x03;
> +    rt     = 0x87654321;
> +    result = 0xFFFFFFFFF0EC0864;
> +
> +    __asm
> +        ("shrav.ph %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rt), "r"(rs)
> +        );
> +    if (rd != result) {
> +        printf("shrav.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shrav_pw.c b/tests/tcg/mips/mips64-dsp/shrav_pw.c
> new file mode 100644
> index 0000000..acec0bc
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shrav_pw.c
> @@ -0,0 +1,23 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, rs;
> +    long long res;
> +
> +    rt = 0x1234567887654321;
> +    rs = 0x4;
> +    res = 0x01234567f8765432;
> +
> +    __asm
> +        ("shrav.pw %0, %1, %2"
> +         : "=r"(rd)
> +         : "r"(rt), "r"(rs)
> +        );
> +
> +    if (rd != res) {
> +        printf("shrav.pw error\n");
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shrav_qh.c b/tests/tcg/mips/mips64-dsp/shrav_qh.c
> new file mode 100644
> index 0000000..110891c
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shrav_qh.c
> @@ -0,0 +1,24 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, rs;
> +    long long res;
> +
> +    rt = 0x8512345654323454;
> +    rs = 0x4;
> +    res = 0xf851034505430345;
> +
> +    __asm
> +        ("shrav.qh %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rt), "r"(rs)
> +        );
> +
> +    if (rd != res) {
> +        printf("shrav.qh error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shrav_r_ph.c b/tests/tcg/mips/mips64-dsp/shrav_r_ph.c
> new file mode 100644
> index 0000000..350d529
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shrav_r_ph.c
> @@ -0,0 +1,24 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt;
> +    long long result;
> +
> +    rs     = 0x03;
> +    rt     = 0x87654321;
> +    result = 0xFFFFFFFFF0ED0864;
> +
> +    __asm
> +        ("shrav_r.ph %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rt), "r"(rs)
> +        );
> +    if (rd != result) {
> +        printf("shrav_r.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shrav_r_pw.c b/tests/tcg/mips/mips64-dsp/shrav_r_pw.c
> new file mode 100644
> index 0000000..1dc3e36
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shrav_r_pw.c
> @@ -0,0 +1,23 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, rs;
> +    long long res;
> +
> +    rt = 0x1234567887654321;
> +    rs = 0x4;
> +    res = 0x01234568f8765432;
> +
> +    __asm
> +        ("shrav_r.pw %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rt), "r"(rs)
> +        );
> +
> +    if (rd != res) {
> +        printf("shrav_r.pw error\n");
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shrav_r_qh.c b/tests/tcg/mips/mips64-dsp/shrav_r_qh.c
> new file mode 100644
> index 0000000..65930ea
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shrav_r_qh.c
> @@ -0,0 +1,24 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, rs;
> +    long long res;
> +
> +    rt = 0x8512345654323454;
> +    rs = 0x3;
> +    res = 0xf0a2068b0a86068b;
> +
> +    __asm
> +        ("shrav_r.qh %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rt), "r"(rs)
> +        );
> +
> +    if (rd != res) {
> +        printf("shrav_r.qh error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shrav_r_w.c b/tests/tcg/mips/mips64-dsp/shrav_r_w.c
> new file mode 100644
> index 0000000..3766c72
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shrav_r_w.c
> @@ -0,0 +1,24 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt;
> +    long long result;
> +
> +    rs     = 0x03;
> +    rt     = 0x87654321;
> +    result = 0xFFFFFFFFF0ECA864;
> +
> +    __asm
> +        ("shrav_r.w %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rt), "r"(rs)
> +        );
> +    if (rd != result) {
> +        printf("shrav_r.w wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shrl_ob.c b/tests/tcg/mips/mips64-dsp/shrl_ob.c
> new file mode 100644
> index 0000000..4771a31
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shrl_ob.c
> @@ -0,0 +1,23 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt;
> +    long long res;
> +
> +    rt = 0xab76543212345678;
> +    res = 0x150e0a0602060a0f;
> +
> +    __asm
> +        ("shrl.ob %0, %1, 0x3\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +
> +    if (rd != res) {
> +        printf("shrl.ob error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shrl_qb.c b/tests/tcg/mips/mips64-dsp/shrl_qb.c
> new file mode 100644
> index 0000000..c0e36db
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shrl_qb.c
> @@ -0,0 +1,23 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt;
> +    long long result;
> +
> +    rt     = 0x12345678;
> +    result = 0x00010203;
> +
> +    __asm
> +        ("shrl.qb %0, %1, 0x05\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +    if (rd != result) {
> +        printf("shrl.qb wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shrl_qh.c b/tests/tcg/mips/mips64-dsp/shrl_qh.c
> new file mode 100644
> index 0000000..c156246
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shrl_qh.c
> @@ -0,0 +1,22 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt;
> +    long long res;
> +
> +    rt = 0x8765679abc543786;
> +    res = 0x087606790bc50378;
> +
> +    __asm
> +        ("shrl.qh %0, %1, 0x4\n\t"
> +         : "=r"(rd)
> +         : "r"(rt)
> +        );
> +
> +    if (rd != res) {
> +        printf("shrl.qh error\n");
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shrlv_ob.c b/tests/tcg/mips/mips64-dsp/shrlv_ob.c
> new file mode 100644
> index 0000000..5e7e468
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shrlv_ob.c
> @@ -0,0 +1,24 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, rs;
> +    long long res;
> +
> +    rt = 0xab76543212345678;
> +    rs = 0x3;
> +    res = 0x150e0a0602060a0f;
> +
> +    __asm
> +        ("shrlv.ob %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rt), "r"(rs)
> +        );
> +
> +    if (rd != res) {
> +        printf("shrlv.ob error\n");
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shrlv_qb.c b/tests/tcg/mips/mips64-dsp/shrlv_qb.c
> new file mode 100644
> index 0000000..5616aa9
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shrlv_qb.c
> @@ -0,0 +1,24 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt;
> +    long long result;
> +
> +    rs     = 0x05;
> +    rt     = 0x12345678;
> +    result = 0x00010203;
> +
> +    __asm
> +        ("shrlv.qb %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rt), "r"(rs)
> +        );
> +    if (rd != result) {
> +        printf("shrlv.qb wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/shrlv_qh.c b/tests/tcg/mips/mips64-dsp/shrlv_qh.c
> new file mode 100644
> index 0000000..05de2fd
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/shrlv_qh.c
> @@ -0,0 +1,23 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rt, rs;
> +    long long res;
> +
> +    rt = 0x8765679abc543786;
> +    rs = 0x4;
> +    res = 0x087606790bc50378;
> +
> +    __asm
> +        ("shrlv.qh %0, %1, %2\n\t"
> +         : "=r"(rd)
> +         : "r"(rt), "r"(rs)
> +        );
> +
> +    if (rd != res) {
> +        printf("shrlv.qh error\n");
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/subq_ph.c b/tests/tcg/mips/mips64-dsp/subq_ph.c
> new file mode 100644
> index 0000000..6a1b186
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/subq_ph.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, dsp;
> +    long long result, resultdsp;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result    = 0xFFFFFFFF8ACF1357;
> +    resultdsp = 0x01;
> +
> +    __asm
> +        ("subq.ph %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 20) & 0x01;
> +    if ((dsp != resultdsp) || (rd  != result)) {
> +        printf("subq.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/subq_pw.c b/tests/tcg/mips/mips64-dsp/subq_pw.c
> new file mode 100644
> index 0000000..32f96ba
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/subq_pw.c
> @@ -0,0 +1,44 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, result, dspreg, dspresult;
> +    rt = 0x123456789ABCDEF0;
> +    rs = 0x123456789ABCDEF0;
> +    result = 0x0;
> +    dspresult = 0x0;
> +
> +    __asm
> +        ("subq.pw %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dspreg)
> +         : "r"(rs), "r"(rt)
> +         );
> +    dspreg = (dspreg >> 20) & 0x1;
> +    if ((rd != result) || (dspreg != dspresult)) {
> +        printf("subq.pw error1\n\t");
> +
> +        return -1;
> +    }
> +
> +    rt = 0x123456789ABCDEF1;
> +    rs = 0x123456789ABCDEF2;
> +    result =  0x0000000000000001;
> +    dspresult = 0x0;
> +
> +    __asm
> +        ("subq.pw %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dspreg)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dspreg = (dspreg >> 20) & 0x1;
> +    if ((rd != result) || (dspreg != dspresult)) {
> +        printf("subq.pw error2\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> +
> diff --git a/tests/tcg/mips/mips64-dsp/subq_qh.c b/tests/tcg/mips/mips64-dsp/subq_qh.c
> new file mode 100644
> index 0000000..76d5f0a
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/subq_qh.c
> @@ -0,0 +1,26 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, result, dspreg, dspresult;
> +    rt = 0x123456789ABCDEF0;
> +    rs = 0x123456789ABCDEF0;
> +    result = 0x0;
> +    dspresult = 0x0;
> +
> +    __asm
> +        ("subq.qh %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dspreg)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dspreg = (dspreg >> 20) & 0x1;
> +    if ((rd != result) || (dspreg != dspresult)) {
> +        printf("subq.qh error\n\t");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> +
> diff --git a/tests/tcg/mips/mips64-dsp/subq_s_ph.c b/tests/tcg/mips/mips64-dsp/subq_s_ph.c
> new file mode 100644
> index 0000000..0b162f0
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/subq_s_ph.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, dsp;
> +    long long result, resultdsp;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result    = 0x7FFF1357;
> +    resultdsp = 0x01;
> +
> +    __asm
> +        ("subq_s.ph %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 20) & 0x01;
> +    if ((dsp != resultdsp) || (rd  != result)) {
> +        printf("subq_s.ph wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/subq_s_pw.c b/tests/tcg/mips/mips64-dsp/subq_s_pw.c
> new file mode 100644
> index 0000000..944d63f
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/subq_s_pw.c
> @@ -0,0 +1,45 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, result, dspreg, dspresult;
> +    rt = 0x9FFFFFFD9FFFFFFD;
> +    rs = 0x4000000080000000;
> +    result = 0x7fffffffe0000003;
> +    dspresult = 0x1;
> +
> +    __asm
> +        ("subq_s.pw %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dspreg)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dspreg = (dspreg >> 20) & 0x1;
> +    if ((rd != result) || (dspreg != dspresult)) {
> +        printf("subq_s.pw error1\n");
> +
> +        return -1;
> +    }
> +
> +    rt = 0x123456789ABCDEF1;
> +    rs = 0x123456789ABCDEF2;
> +    result =  0x0000000000000001;
> +    /* This time we do not set dspctrl, but it setted in pre-action. */
> +    dspresult = 0x1;
> +
> +    __asm
> +        ("subq_s.pw %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dspreg)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dspreg = (dspreg >> 20) & 0x1;
> +    if ((rd != result) || (dspreg != dspresult)) {
> +        printf("subq_s.pw error2\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> +
> diff --git a/tests/tcg/mips/mips64-dsp/subq_s_qh.c b/tests/tcg/mips/mips64-dsp/subq_s_qh.c
> new file mode 100644
> index 0000000..d02a459
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/subq_s_qh.c
> @@ -0,0 +1,44 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, result, dspreg, dspresult;
> +    rs = 0x123456789ABCDEF0;
> +    rt = 0x123456789ABCDEF0;
> +    result = 0x0;
> +    dspresult = 0x0;
> +
> +    __asm
> +        ("subq_s.qh %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dspreg)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dspreg = (dspreg >> 20) & 0x1;
> +    if ((rd != result) || (dspreg != dspresult)) {
> +        printf("subq_s.qh error1\n");
> +
> +        return -1;
> +    }
> +
> +    rs = 0x4000000080000000;
> +    rt = 0x9FFD00009FFC0000;
> +    result =  0x7FFF0000E0040000;
> +    dspresult = 0x1;
> +
> +    __asm
> +        ("subq_s.qh %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dspreg)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dspreg = (dspreg >> 20) & 0x1;
> +    if ((rd != result) || (dspreg != dspresult)) {
> +        printf("subq_s.qh error2\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> +
> diff --git a/tests/tcg/mips/mips64-dsp/subq_s_w.c b/tests/tcg/mips/mips64-dsp/subq_s_w.c
> new file mode 100644
> index 0000000..91d32da
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/subq_s_w.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, dsp;
> +    long long result, resultdsp;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result    = 0x7FFFFFFF;
> +    resultdsp = 0x01;
> +
> +    __asm
> +        ("subq_s.w %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 20) & 0x01;
> +    if ((dsp != resultdsp) || (rd  != result)) {
> +        printf("subq_s.w wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/subu_ob.c b/tests/tcg/mips/mips64-dsp/subu_ob.c
> new file mode 100644
> index 0000000..f670967
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/subu_ob.c
> @@ -0,0 +1,26 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, result, dspreg, dspresult;
> +    rs = 0x6F6F6F6F6F6F6F6F;
> +    rt = 0x5E5E5E5E5E5E5E5E;
> +    result = 0x1111111111111111;
> +    dspresult = 0x0;
> +
> +    __asm
> +        ("subu.ob %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dspreg)
> +         : "r"(rs), "r"(rt)
> +         );
> +
> +    if ((rd != result) || (dspreg != dspresult)) {
> +        printf("subu.ob error\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> +
> diff --git a/tests/tcg/mips/mips64-dsp/subu_qb.c b/tests/tcg/mips/mips64-dsp/subu_qb.c
> new file mode 100644
> index 0000000..9eb80df
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/subu_qb.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, dsp;
> +    long long result, resultdsp;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result    = 0xFFFFFFFF8BCF1357;
> +    resultdsp = 0x01;
> +
> +    __asm
> +        ("subu.qb %0, %2, %3\n\t"
> +         "rddsp   %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 20) & 0x01;
> +    if ((dsp != resultdsp) || (rd  != result)) {
> +        printf("subu.qb wrong\n");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/subu_s_ob.c b/tests/tcg/mips/mips64-dsp/subu_s_ob.c
> new file mode 100644
> index 0000000..5df64e5
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/subu_s_ob.c
> @@ -0,0 +1,26 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, dspreg, result, dspresult;
> +    rs = 0x12345678ABCDEF0;
> +    rt = 0x12345678ABCDEF1;
> +    result = 0x00000000000;
> +    dspresult = 0x01;
> +
> +    __asm
> +        ("subu_s.ob %0, %2, %3\n\t"
> +         "rddsp %1\n\t"
> +         : "=r"(rd), "=r"(dspreg)
> +         : "r"(rs), "r"(rt)
> +         );
> +
> +    dspreg = ((dspreg >> 20) & 0x01);
> +    if ((rd != result) || (dspreg != dspresult)) {
> +        printf("subu_s.ob error\n\t");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/subu_s_qb.c b/tests/tcg/mips/mips64-dsp/subu_s_qb.c
> new file mode 100644
> index 0000000..9de76f4
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/subu_s_qb.c
> @@ -0,0 +1,27 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long rd, rs, rt, dsp;
> +    long long result, resultdsp;
> +
> +    rs = 0x12345678;
> +    rt = 0x87654321;
> +    result    = 0x00001357;
> +    resultdsp = 0x01;
> +
> +    __asm
> +        ("subu_s.qb %0, %2, %3\n\t"
> +         "rddsp   %1\n\t"
> +         : "=r"(rd), "=r"(dsp)
> +         : "r"(rs), "r"(rt)
> +        );
> +    dsp = (dsp >> 20) & 0x01;
> +    if ((dsp != resultdsp) || (rd  != result)) {
> +        printf("subu_s_qb wrong");
> +
> +        return -1;
> +    }
> +
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dsp/wrdsp.c b/tests/tcg/mips/mips64-dsp/wrdsp.c
> new file mode 100644
> index 0000000..3033fd8
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dsp/wrdsp.c
> @@ -0,0 +1,48 @@
> +#include "io.h"
> +
> +int main(void)
> +{
> +    long long dsp_i, dsp_o;
> +    long long ccond_i, outflag_i, efi_i, c_i, scount_i, pos_i;
> +    long long ccond_o, outflag_o, efi_o, c_o, scount_o, pos_o;
> +    long long ccond_r, outflag_r, efi_r, c_r, scount_r, pos_r;
> +
> +    ccond_i = 0x000000BC;/* 4 */
> +    outflag_i = 0x0000001B;/* 3 */
> +    efi_i = 0x00000001;/* 5 */
> +    c_i = 0x00000001;/* 2 */
> +    scount_i = 0x0000000F;/* 1 */
> +    pos_i = 0x0000000C;/* 0 */
> +
> +    dsp_i = (ccond_i << 24) | (outflag_i << 16) | (efi_i << 14) | (c_i << 13)
> +            | (scount_i << 7) | pos_i;
> +
> +    ccond_r = ccond_i;
> +    outflag_r = outflag_i;
> +    efi_r = efi_i;
> +    c_r = c_i;
> +    scount_r = scount_i;
> +    pos_r = pos_i;
> +
> +    __asm
> +        ("wrdsp %1, 0x3F\n\t"
> +         "rddsp %0, 0x3F\n\t"
> +         : "=r"(dsp_o)
> +         : "r"(dsp_i)
> +        );
> +
> +    ccond_o = (dsp_o >> 24) & 0xFF;
> +    outflag_o = (dsp_o >> 16) & 0xFF;
> +    efi_o = (dsp_o >> 14) & 0x01;
> +    c_o = (dsp_o >> 14) & 0x01;
> +    scount_o = (dsp_o >> 7) & 0x3F;
> +    pos_o = dsp_o & 0x1F;
> +
> +    if ((ccond_o != ccond_r) || (outflag_o != outflag_r) || (efi_o != efi_r) \
> +            || (c_o != c_r) || (scount_o != scount_r) || (pos_o != pos_r)) {
> +        printf("wrddsp wrong\n");
> +
> +        return -1;
> +    }
> +    return 0;
> +}
> diff --git a/tests/tcg/mips/mips64-dspr2/.directory b/tests/tcg/mips/mips64-dspr2/.directory
> new file mode 100644
> index 0000000..c75a914
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dspr2/.directory
> @@ -0,0 +1,2 @@
> +[Dolphin]
> +Timestamp=2012,8,3,16,41,52
> diff --git a/tests/tcg/mips/mips64-dspr2/Makefile b/tests/tcg/mips/mips64-dspr2/Makefile
> new file mode 100644
> index 0000000..69f92be
> --- /dev/null
> +++ b/tests/tcg/mips/mips64-dspr2/Makefile
> @@ -0,0 +1,117 @@
> +CROSS_COMPILE	?= mips64el-unknown-linux-gnu-
> +
> +SIM = qemu-system-mips64el
> +SIMFLAGS = -nographic -cpu mips64dspr2 -kernel
> +
> +AS      = $(CROSS_COMPILE)as
> +LD      = $(CROSS_COMPILE)ld
> +CC      = $(CROSS_COMPILE)gcc
> +AR      = $(CROSS_COMPILE)ar
> +NM      = $(CROSS_COMPILE)nm
> +STRIP       = $(CROSS_COMPILE)strip
> +RANLIB      = $(CROSS_COMPILE)ranlib
> +OBJCOPY     = $(CROSS_COMPILE)objcopy
> +OBJDUMP     = $(CROSS_COMPILE)objdump
> +
> +VECTORS_OBJ ?= ./head.o ./printf.o
> +
> +HEAD_FLAGS ?= -nostdinc -mabi=64 -G 0 -mno-abicalls -fno-pic -pipe \
> +              -msoft-float -march=mips64 -Wa,-mips64 -Wa,--trap \