From patchwork Mon Oct 15 03:29:46 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 191460 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id DC1342C0094 for ; Mon, 15 Oct 2012 14:31:31 +1100 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TNbNC-0000mn-6C; Mon, 15 Oct 2012 03:29:46 +0000 Received: from mail-pb0-f49.google.com ([209.85.160.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TNbN9-0000mO-3A for linux-arm-kernel@lists.infradead.org; Mon, 15 Oct 2012 03:29:43 +0000 Received: by mail-pb0-f49.google.com with SMTP id xa7so4715897pbc.36 for ; Sun, 14 Oct 2012 20:29:41 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:x-gm-message-state; bh=s0wCE8aTH/HdUNFKO6MpOxJBAlxyNxRcVL04NukCY+w=; b=Py9qtOIx6xJdgFZ7ukiDhOIx9AJtodPvFcGtwpBVygEid/l+XBArKhRxMqdAlSj7y5 JE8jtUGA0V8cmuDcynNy1tswFyc5zg93MYbfXA5vdCWIziKNWBummgHLTSEEnt/6tDcc i11+cFGL9qKw0Dava9udpajeA/KTMB/hGxgQxQV7uFGkni17EscRvkVsBua+rJbHtPns ocKgpucbiPKkkSbsaq4Kszvb6HEfD0AQ/p53OKn3DJn6SjUDvjCU9PiHBL199fKcLGxd /emHglzNmkgAUZSE9asnKdV4ioAR9OmVASGgz0jPgFJjMbIJYqdSAQws4AxL3mrSPfA+ GFLA== Received: by 10.66.75.137 with SMTP id c9mr29181784paw.84.1350271781909; Sun, 14 Oct 2012 20:29:41 -0700 (PDT) Received: from S2101-09.ap.freescale.net ([117.81.35.66]) by mx.google.com with ESMTPS id bv6sm8353444pab.13.2012.10.14.20.29.39 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 14 Oct 2012 20:29:41 -0700 (PDT) From: Shawn Guo To: linux-arm-kernel@lists.infradead.org Subject: [PATCH] ARM: imx: enable cpufreq for imx6q Date: Mon, 15 Oct 2012 11:29:46 +0800 Message-Id: <1350271786-24150-1-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.7.9.5 X-Gm-Message-State: ALoCoQn/HMpBNakkw+HFLYP0MfALX5j7mVqHNCWq6ET7R5uVPZfR210QLviFZz1hiyT1EyCHoLva X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.160.49 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Shawn Guo X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org It enables cpufreq support for imx6q with generic cpufreq-cpu0 driver. Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q.dtsi | 10 +++++++++- arch/arm/mach-imx/Kconfig | 3 +++ arch/arm/mach-imx/clk-imx6q.c | 1 + 3 files changed, 13 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 255f56b..1565aea 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -36,6 +36,14 @@ compatible = "arm,cortex-a9"; reg = <0>; next-level-cache = <&L2>; + operating-points = < + /* kHz uV */ + 792000 1100000 + 396000 950000 + 198000 850000 + >; + clock-latency = <61036>; /* two CLK32 periods */ + cpu0-supply = <®_cpu>; }; cpu@1 { @@ -447,7 +455,7 @@ anatop-max-voltage = <2750000>; }; - regulator-vddcore@140 { + reg_cpu: regulator-vddcore@140 { compatible = "fsl,anatop-regulator"; regulator-name = "cpu"; regulator-min-microvolt = <725000>; diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 017296f..e1f78f5 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -829,6 +829,8 @@ config SOC_IMX53 config SOC_IMX6Q bool "i.MX6 Quad support" + select ARCH_HAS_CPUFREQ + select ARCH_HAS_OPP select ARM_CPU_SUSPEND if PM select ARM_GIC select COMMON_CLK @@ -842,6 +844,7 @@ config SOC_IMX6Q select MFD_SYSCON select PINCTRL select PINCTRL_IMX6Q + select PM_OPP if PM help This enables support for Freescale i.MX6 Quad processor. diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index e5a82bb..5f9f591 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -406,6 +406,7 @@ int __init mx6q_clocks_init(void) clk_register_clkdev(clk[cko1_sel], "cko1_sel", NULL); clk_register_clkdev(clk[ahb], "ahb", NULL); clk_register_clkdev(clk[cko1], "cko1", NULL); + clk_register_clkdev(clk[arm], NULL, "cpu0"); /* * The gpmi needs 100MHz frequency in the EDO/Sync mode,