From patchwork Mon Oct 15 03:29:46 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: ARM: imx: enable cpufreq for imx6q Date: Sun, 14 Oct 2012 17:29:46 -0000 From: Shawn Guo X-Patchwork-Id: 191460 Message-Id: <1350271786-24150-1-git-send-email-shawn.guo@linaro.org> To: linux-arm-kernel@lists.infradead.org Cc: Shawn Guo It enables cpufreq support for imx6q with generic cpufreq-cpu0 driver. Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q.dtsi | 10 +++++++++- arch/arm/mach-imx/Kconfig | 3 +++ arch/arm/mach-imx/clk-imx6q.c | 1 + 3 files changed, 13 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 255f56b..1565aea 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -36,6 +36,14 @@ compatible = "arm,cortex-a9"; reg = <0>; next-level-cache = <&L2>; + operating-points = < + /* kHz uV */ + 792000 1100000 + 396000 950000 + 198000 850000 + >; + clock-latency = <61036>; /* two CLK32 periods */ + cpu0-supply = <®_cpu>; }; cpu@1 { @@ -447,7 +455,7 @@ anatop-max-voltage = <2750000>; }; - regulator-vddcore@140 { + reg_cpu: regulator-vddcore@140 { compatible = "fsl,anatop-regulator"; regulator-name = "cpu"; regulator-min-microvolt = <725000>; diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 017296f..e1f78f5 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -829,6 +829,8 @@ config SOC_IMX53 config SOC_IMX6Q bool "i.MX6 Quad support" + select ARCH_HAS_CPUFREQ + select ARCH_HAS_OPP select ARM_CPU_SUSPEND if PM select ARM_GIC select COMMON_CLK @@ -842,6 +844,7 @@ config SOC_IMX6Q select MFD_SYSCON select PINCTRL select PINCTRL_IMX6Q + select PM_OPP if PM help This enables support for Freescale i.MX6 Quad processor. diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index e5a82bb..5f9f591 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -406,6 +406,7 @@ int __init mx6q_clocks_init(void) clk_register_clkdev(clk[cko1_sel], "cko1_sel", NULL); clk_register_clkdev(clk[ahb], "ahb", NULL); clk_register_clkdev(clk[cko1], "cko1", NULL); + clk_register_clkdev(clk[arm], NULL, "cpu0"); /* * The gpmi needs 100MHz frequency in the EDO/Sync mode,