From patchwork Fri Oct 12 15:08:46 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [U-Boot,1/6] Exynos: Exynos4x10: Add base addresses for Exynos4x10 From: Piotr Wilczek X-Patchwork-Id: 191139 Message-Id: <1350054531-24681-2-git-send-email-p.wilczek@samsung.com> To: u-boot@lists.denx.de Cc: Piotr Wilczek , Kyungmin Park Date: Fri, 12 Oct 2012 17:08:46 +0200 This patch add base addresses for Exynos4x10 registers. Signed-off-by: Piotr Wilczek Signed-off-by: Kyungmin Park CC: Minkyu Kang --- Depends on <1349171443-13624-1-git-send-email-chander.kashyap@linaro.org> arch/arm/include/asm/arch-exynos/cpu.h | 43 ++++++++++++++++++++++++++++--- 1 files changed, 38 insertions(+), 5 deletions(-) diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h index 3ecb7d5..76ee668 100644 --- a/arch/arm/include/asm/arch-exynos/cpu.h +++ b/arch/arm/include/asm/arch-exynos/cpu.h @@ -60,6 +60,36 @@ #define EXYNOS4_GPIO_PART4_BASE DEVICE_NOT_AVAILABLE #define EXYNOS4_DP_BASE DEVICE_NOT_AVAILABLE +/* EXYNOS4X10 */ +#define EXYNOS4X10_GPIO_PART3_BASE 0x03860000 +#define EXYNOS4X10_PRO_ID 0x10000000 +#define EXYNOS4X10_SYSREG_BASE 0x10010000 +#define EXYNOS4X10_POWER_BASE 0x10020000 +#define EXYNOS4X10_SWRESET 0x10020400 +#define EXYNOS4X10_CLOCK_BASE 0x10030000 +#define EXYNOS4X10_SYSTIMER_BASE 0x10050000 +#define EXYNOS4X10_WATCHDOG_BASE 0x10060000 +#define EXYNOS4X10_MIU_BASE 0x10600000 +#define EXYNOS4X10_DMC0_BASE 0x10400000 +#define EXYNOS4X10_DMC1_BASE 0x10410000 +#define EXYNOS4X10_GPIO_PART2_BASE 0x11000000 +#define EXYNOS4X10_GPIO_PART1_BASE 0x11400000 +#define EXYNOS4X10_FIMD_BASE 0x11C00000 +#define EXYNOS4X10_MIPI_DSIM_BASE 0x11C80000 +#define EXYNOS4X10_USBOTG_BASE 0x12480000 +#define EXYNOS4X10_MMC_BASE 0x12510000 +#define EXYNOS4X10_SROMC_BASE 0x12570000 +#define EXYNOS4X10_USB_HOST_EHCI_BASE 0x12580000 +#define EXYNOS4X10_USBPHY_BASE 0x125B0000 +#define EXYNOS4X10_UART_BASE 0x13800000 +#define EXYNOS4X10_I2C_BASE 0x13860000 +#define EXYNOS4X10_ADC_BASE 0x13910000 +#define EXYNOS4X10_PWMTIMER_BASE 0x139D0000 +#define EXYNOS4X10_MODEM_BASE 0x13A00000 + +#define EXYNOS4X10_GPIO_PART4_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS4X10_DP_BASE DEVICE_NOT_AVAILABLE + /* EXYNOS5 */ #define EXYNOS5_I2C_SPACING 0x10000 @@ -153,12 +183,15 @@ IS_EXYNOS_TYPE(exynos5250, 0x5250) #define SAMSUNG_BASE(device, base) \ static inline unsigned int samsung_get_base_##device(void) \ { \ - if (cpu_is_exynos4()) \ - return EXYNOS4_##base; \ - else if (cpu_is_exynos5()) \ + if (cpu_is_exynos4()) { \ + if (proid_is_exynos4210()) \ + return EXYNOS4X10_##base; \ + else \ + return EXYNOS4_##base; \ + } else if (cpu_is_exynos5()) { \ return EXYNOS5_##base; \ - else \ - return 0; \ + } \ + return 0; \ } SAMSUNG_BASE(adc, ADC_BASE)