From patchwork Wed Oct 10 23:13:00 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [U-Boot, v2, 09/10] x86: coreboot: Enable LPC TPM and CONFIG_NO_RESET_CODE From: Simon Glass X-Patchwork-Id: 190813 Message-Id: <1349910781-32088-10-git-send-email-sjg@chromium.org> To: U-Boot Mailing List Cc: Stefan Reinauer , Vadim Bendebury Date: Wed, 10 Oct 2012 16:13:00 -0700 Coreboot boards have an LPC TPM connected, so enable this. We also need to skip the reset code. Signed-off-by: Simon Glass --- include/configs/coreboot.h | 6 +++++- 1 files changed, 5 insertions(+), 1 deletions(-) diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 2c65d74..75db176 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -37,7 +37,7 @@ #define CONFIG_SYS_COREBOOT #undef CONFIG_SHOW_BOOT_PROGRESS #define CONFIG_LAST_STAGE_INIT - +#define CONFIG_NO_RESET_CODE /*----------------------------------------------------------------------- * Watchdog Configuration @@ -45,6 +45,10 @@ #undef CONFIG_WATCHDOG #undef CONFIG_HW_WATCHDOG +/* Generic TPM interfaced through LPC bus */ +#define CONFIG_GENERIC_LPC_TPM +#define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000 + /*----------------------------------------------------------------------- * Real Time Clock Configuration */