Patchwork [U-Boot,3/3] mx25pdk: Add FEC support

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Submitter Fabio Estevam
Date Oct. 11, 2012, 3:58 a.m.
Message ID <1349927934-3063-3-git-send-email-festevam@gmail.com>
Download mbox | patch
Permalink /patch/190796/
State Changes Requested
Delegated to: Stefano Babic
Headers show

Comments

Fabio Estevam - Oct. 11, 2012, 3:58 a.m.
From: Fabio Estevam <fabio.estevam@freescale.com>

mx25pdk has a Ethernet port that is connected to its internal FEC controller.

In order to power up the Ethernet PHY (DP83640) it is necessary to communicate
with the PMIC via I2C.

Make FEC ethernet functional.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
 board/freescale/mx25pdk/mx25pdk.c |   64 +++++++++++++++++++++++++++++++++++++
 include/configs/mx25pdk.h         |   15 +++++++++
 2 files changed, 79 insertions(+)
Stefano Babic - Oct. 11, 2012, 7:21 a.m.
Am 11/10/2012 05:58, schrieb Fabio Estevam:
> From: Fabio Estevam <fabio.estevam@freescale.com>
> 
> mx25pdk has a Ethernet port that is connected to its internal FEC controller.
> 
> In order to power up the Ethernet PHY (DP83640) it is necessary to communicate
> with the PMIC via I2C.
> 
> Make FEC ethernet functional.
> 
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> ---

Hi Fabio,


>  board/freescale/mx25pdk/mx25pdk.c |   64 +++++++++++++++++++++++++++++++++++++
>  include/configs/mx25pdk.h         |   15 +++++++++
>  2 files changed, 79 insertions(+)
> 
> diff --git a/board/freescale/mx25pdk/mx25pdk.c b/board/freescale/mx25pdk/mx25pdk.c
> index e850b3e..e1fa2be 100644
> --- a/board/freescale/mx25pdk/mx25pdk.c
> +++ b/board/freescale/mx25pdk/mx25pdk.c
> @@ -25,6 +25,13 @@
>  #include <asm/arch/sys_proto.h>
>  #include <mmc.h>
>  #include <fsl_esdhc.h>
> +#include <i2c.h>
> +
> +#define FEC_RESET_B		IMX_GPIO_NR(2, 3)
> +#define FEC_ENABLE_B		IMX_GPIO_NR(4, 8)
> +#define CARD_DETECT		IMX_GPIO_NR(2, 1)
> +#define PMIC_I2C_ADDR		0x54
> +#define REG_PHY_3V3		0x02
>  
>  #define CARD_DETECT		IMX_GPIO_NR(2, 1)
>  
> @@ -36,6 +43,47 @@ struct fsl_esdhc_cfg esdhc_cfg[1] = {
>  };
>  #endif
>  
> +static void mx25pdk_fec_init(void)
> +{
> +	struct iomuxc_mux_ctl *muxctl;
> +	struct iomuxc_pad_ctl *padctl;
> +	u32 gpio_mux_mode = MX25_PIN_MUX_MODE(5);
> +	u32 gpio_mux_mode0_sion = MX25_PIN_MUX_MODE(0) | MX25_PIN_MUX_SION;
> +
> +	/* FEC pin init is generic */
> +	mx25_fec_init_pins();
> +
> +	muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
> +	padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
> +	/*
> +	 * Set up FEC_RESET_B and FEC_ENABLE_B
> +	 *
> +	 * FEC_RESET_B: gpio2_3 is ALT 5 mode of pin D12
> +	 * FEC_ENABLE_B: gpio4_8 is ALT 5 mode of pin A17
> +	 */
> +	writel(gpio_mux_mode, &muxctl->pad_d12);
> +	writel(gpio_mux_mode, &muxctl->pad_a17);
> +
> +	writel(0x0, &padctl->pad_d12);
> +	writel(0x0, &padctl->pad_a17);
> +
> +	/* Assert RESET and ENABLE low */
> +	gpio_direction_output(FEC_RESET_B, 0);
> +	gpio_direction_output(FEC_ENABLE_B, 0);
> +
> +	udelay(10);
> +
> +	/* Deassert RESET and ENABLE */
> +	gpio_set_value(FEC_RESET_B, 1);
> +	gpio_set_value(FEC_ENABLE_B, 1);
> +
> +	/* Setup I2C pins so that PMIC can turn on PHY supply */
> +	writel(gpio_mux_mode0_sion, &muxctl->pad_i2c1_clk);
> +	writel(gpio_mux_mode0_sion, &muxctl->pad_i2c1_dat);
> +	writel(0x1E8, &padctl->pad_i2c1_clk);
> +	writel(0x1E8, &padctl->pad_i2c1_dat);
> +}
> +
>  int dram_init(void)
>  {
>  	/* dram_init must store complete ramsize in gd->ram_size */
> @@ -59,6 +107,22 @@ int board_init(void)
>  	return 0;
>  }
>  
> +int board_late_init(void)
> +{
> +	/* Turn on PHY supply via I2C command to PMIC */
> +	u8 reg[4];
> +	reg[0] = 0x09;
> +
> +	mx25pdk_fec_init();
> +
> +	if (i2c_write(PMIC_I2C_ADDR, REG_PHY_3V3, 1, reg, 1)) {
> +		printf("I2C write to PMIC failed\n");
> +		return -EINVAL;
> +	}

I do not know which PMIC is on this board. Anyway, we have accessors for
the PMICs. Please add register layout to your pmic (if it is not one of
the already supported) and use pmic_ functions (as in MX35 / MX5) to
modify the registers.

Best regards,
Stefano

Patch

diff --git a/board/freescale/mx25pdk/mx25pdk.c b/board/freescale/mx25pdk/mx25pdk.c
index e850b3e..e1fa2be 100644
--- a/board/freescale/mx25pdk/mx25pdk.c
+++ b/board/freescale/mx25pdk/mx25pdk.c
@@ -25,6 +25,13 @@ 
 #include <asm/arch/sys_proto.h>
 #include <mmc.h>
 #include <fsl_esdhc.h>
+#include <i2c.h>
+
+#define FEC_RESET_B		IMX_GPIO_NR(2, 3)
+#define FEC_ENABLE_B		IMX_GPIO_NR(4, 8)
+#define CARD_DETECT		IMX_GPIO_NR(2, 1)
+#define PMIC_I2C_ADDR		0x54
+#define REG_PHY_3V3		0x02
 
 #define CARD_DETECT		IMX_GPIO_NR(2, 1)
 
@@ -36,6 +43,47 @@  struct fsl_esdhc_cfg esdhc_cfg[1] = {
 };
 #endif
 
+static void mx25pdk_fec_init(void)
+{
+	struct iomuxc_mux_ctl *muxctl;
+	struct iomuxc_pad_ctl *padctl;
+	u32 gpio_mux_mode = MX25_PIN_MUX_MODE(5);
+	u32 gpio_mux_mode0_sion = MX25_PIN_MUX_MODE(0) | MX25_PIN_MUX_SION;
+
+	/* FEC pin init is generic */
+	mx25_fec_init_pins();
+
+	muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
+	padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
+	/*
+	 * Set up FEC_RESET_B and FEC_ENABLE_B
+	 *
+	 * FEC_RESET_B: gpio2_3 is ALT 5 mode of pin D12
+	 * FEC_ENABLE_B: gpio4_8 is ALT 5 mode of pin A17
+	 */
+	writel(gpio_mux_mode, &muxctl->pad_d12);
+	writel(gpio_mux_mode, &muxctl->pad_a17);
+
+	writel(0x0, &padctl->pad_d12);
+	writel(0x0, &padctl->pad_a17);
+
+	/* Assert RESET and ENABLE low */
+	gpio_direction_output(FEC_RESET_B, 0);
+	gpio_direction_output(FEC_ENABLE_B, 0);
+
+	udelay(10);
+
+	/* Deassert RESET and ENABLE */
+	gpio_set_value(FEC_RESET_B, 1);
+	gpio_set_value(FEC_ENABLE_B, 1);
+
+	/* Setup I2C pins so that PMIC can turn on PHY supply */
+	writel(gpio_mux_mode0_sion, &muxctl->pad_i2c1_clk);
+	writel(gpio_mux_mode0_sion, &muxctl->pad_i2c1_dat);
+	writel(0x1E8, &padctl->pad_i2c1_clk);
+	writel(0x1E8, &padctl->pad_i2c1_dat);
+}
+
 int dram_init(void)
 {
 	/* dram_init must store complete ramsize in gd->ram_size */
@@ -59,6 +107,22 @@  int board_init(void)
 	return 0;
 }
 
+int board_late_init(void)
+{
+	/* Turn on PHY supply via I2C command to PMIC */
+	u8 reg[4];
+	reg[0] = 0x09;
+
+	mx25pdk_fec_init();
+
+	if (i2c_write(PMIC_I2C_ADDR, REG_PHY_3V3, 1, reg, 1)) {
+		printf("I2C write to PMIC failed\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
 #ifdef CONFIG_FSL_ESDHC
 int board_mmc_getcd(struct mmc *mmc)
 {
diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h
index 1770521..9b010c2 100644
--- a/include/configs/mx25pdk.h
+++ b/include/configs/mx25pdk.h
@@ -41,6 +41,7 @@ 
 #define PHYS_SDRAM_1_SIZE	(64 * 1024 * 1024)
 
 #define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_LATE_INIT
 
 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x1000 - \
@@ -100,6 +101,20 @@ 
 
 #define CONFIG_DOS_PARTITION
 
+/* I2C Configs */
+#define CONFIG_CMD_I2C
+#define CONFIG_HARD_I2C
+#define CONFIG_I2C_MXC
+#define CONFIG_SYS_I2C_BASE		IMX_I2C_BASE
+#define CONFIG_SYS_I2C_SPEED		100000
+
+/* Ethernet Configs */
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+
 #define CONFIG_BOOTDELAY	3
 
 #define CONFIG_LOADADDR		0x81000000	/* loadaddr env var */