@@ -1552,6 +1552,11 @@ ARM target generates Thumb-2 code for @code{-mthumb}.
@item arm_vfp_ok
ARM target supports @code{-mfpu=vfp -mfloat-abi=softfp}.
Some multilibs may be incompatible with these options.
+
+@item arm_prefer_ldrd_strd
+ARM target prefers @code{LDRD} and @code{STRD} instructions over
+@code{LDM} and @code{STM} instructions.
+
@end table
@subsubsection MIPS-specific attributes
@@ -2462,6 +2462,18 @@ proc check_effective_target_arm_iwmmxt_ok { } {
}
}
+# Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
+# for an ARM target.
+proc check_effective_target_arm_prefer_ldrd_strd { } {
+ if { ![check_effective_target_arm32] } {
+ return 0;
+ }
+
+ return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
+ void foo (int *p) { p[0] = 1; p[1] = 0;}
+ } "-O2 -mthumb" ]
+}
+
# Return 1 if this is a PowerPC target with floating-point registers.
proc check_effective_target_powerpc_fprs { } {