From patchwork Tue Oct 9 22:44:29 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [U-Boot] ARM926: Add mb to the cache invalidate/flush Date: Tue, 09 Oct 2012 12:44:29 -0000 From: Marek Vasut X-Patchwork-Id: 190504 Message-Id: <1349822669-26274-1-git-send-email-marex@denx.de> To: u-boot@lists.denx.de Cc: Marek Vasut , Otavio Salvador Add memory barrier to cache invalidate and flush calls. Signed-off-by: Marek Vasut CC: Albert Aribaud Cc: Fabio Estevam Cc: Otavio Salvador Cc: Stefano Babic --- arch/arm/cpu/arm926ejs/cache.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c index 2740ad7..1c67608 100644 --- a/arch/arm/cpu/arm926ejs/cache.c +++ b/arch/arm/cpu/arm926ejs/cache.c @@ -30,7 +30,7 @@ void invalidate_dcache_all(void) { - asm volatile("mcr p15, 0, %0, c7, c6, 0\n" : : "r"(0)); + asm volatile("mcr p15, 0, %0, c7, c6, 0\n" : : "r"(0) : "memory"); } void flush_dcache_all(void) @@ -67,7 +67,8 @@ void invalidate_dcache_range(unsigned long start, unsigned long stop) return; while (start < stop) { - asm volatile("mcr p15, 0, %0, c7, c6, 1\n" : : "r"(start)); + asm volatile("mcr p15, 0, %0, c7, c6, 1\n" + : : "r"(start) : "memory"); start += CONFIG_SYS_CACHELINE_SIZE; } } @@ -78,11 +79,12 @@ void flush_dcache_range(unsigned long start, unsigned long stop) return; while (start < stop) { - asm volatile("mcr p15, 0, %0, c7, c14, 1\n" : : "r"(start)); + asm volatile("mcr p15, 0, %0, c7, c14, 1\n" + : : "r"(start) : "memory"); start += CONFIG_SYS_CACHELINE_SIZE; } - asm volatile("mcr p15, 0, %0, c7, c10, 4\n" : : "r"(0)); + asm volatile("mcr p15, 0, %0, c7, c10, 4\n" : : "r"(0) : "memory"); } void flush_cache(unsigned long start, unsigned long size)