From patchwork Tue Oct 9 22:04:16 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 190491 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 68BCD2C00AA for ; Wed, 10 Oct 2012 09:19:16 +1100 (EST) Received: from localhost ([::1]:50164 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TLhvX-0006AD-A7 for incoming@patchwork.ozlabs.org; Tue, 09 Oct 2012 18:05:23 -0400 Received: from eggs.gnu.org ([208.118.235.92]:47942) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TLhus-0004fO-Iy for qemu-devel@nongnu.org; Tue, 09 Oct 2012 18:04:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TLhur-0001jB-Gv for qemu-devel@nongnu.org; Tue, 09 Oct 2012 18:04:42 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:34860) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TLhur-0001fh-Af for qemu-devel@nongnu.org; Tue, 09 Oct 2012 18:04:41 -0400 Received: by mail-pb0-f45.google.com with SMTP id rp2so5751708pbb.4 for ; Tue, 09 Oct 2012 15:04:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=T4nlBtfeN3S+LGcBfjz3D4weue69xTkNbvXFnNU8aII=; b=HMEdQ/mIZ1duzXe6bmRyCoUHOvaeu7KQNJM8wihtVAKAXVcy5R7Ms68DxFubsHn9rH KPj0GO4fqmDiKD65fC5rYKQVAeiT6fR73wLBTEsJ57G+p8skHL+Ahj3FtgvA6yoI4+c/ elsbdYGpLlYZ/TJhJi92/YSpIFE957N17KZEE3dlZnGA9pSAPNUY/hWnssNH4KKCB8m1 3MkvbA++0U6VNogh204WKLa404fgctNZ4pkggsgdiDWGiQ0TS2qccNyvu2SgdHGFfFir 8OVN1ffiYAEb5ebvsB3dJEI0nt1n+6lHO66XVPRUAA4Xa0s7VLAPasVKW+pFqB+IP0n/ NFgA== Received: by 10.66.82.101 with SMTP id h5mr56673749pay.15.1349820281008; Tue, 09 Oct 2012 15:04:41 -0700 (PDT) Received: from anchor.twiddle.home.com (50-194-63-110-static.hfc.comcastbusiness.net. [50.194.63.110]) by mx.google.com with ESMTPS id tt6sm12970604pbc.51.2012.10.09.15.04.40 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 09 Oct 2012 15:04:40 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 9 Oct 2012 15:04:16 -0700 Message-Id: <1349820267-26320-10-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.11.4 In-Reply-To: <1349820267-26320-1-git-send-email-rth@twiddle.net> References: <1349820267-26320-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.160.45 Cc: Blue Swirl Subject: [Qemu-devel] [PATCH 09/20] target-sparc: Split out get_temp_i32 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson --- target-sparc/translate.c | 29 +++++++++++++++++------------ 1 file changed, 17 insertions(+), 12 deletions(-) diff --git a/target-sparc/translate.c b/target-sparc/translate.c index e3e4256..5296a37 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -125,6 +125,22 @@ static int sign_extend(int x, int len) #define IS_IMM (insn & (1<<13)) +static inline TCGv_i32 get_temp_i32(DisasContext *dc) +{ + TCGv_i32 t; + assert(dc->n_t32 < ARRAY_SIZE(dc->t32)); + dc->t32[dc->n_t32++] = t = tcg_temp_new_i32(); + return t; +} + +static inline TCGv get_temp_tl(DisasContext *dc) +{ + TCGv t; + assert(dc->n_ttl < ARRAY_SIZE(dc->ttl)); + dc->ttl[dc->n_ttl++] = t = tcg_temp_new(); + return t; +} + static inline void gen_update_fprs_dirty(int rd) { #if defined(TARGET_SPARC64) @@ -145,16 +161,13 @@ static TCGv_i32 gen_load_fpr_F(DisasContext *dc, unsigned int src) if (src & 1) { return MAKE_TCGV_I32(GET_TCGV_I64(cpu_fpr[src / 2])); } else { - TCGv_i32 ret = tcg_temp_new_i32(); + TCGv_i32 ret = get_temp_i32(dc); TCGv_i64 t = tcg_temp_new_i64(); tcg_gen_shri_i64(t, cpu_fpr[src / 2], 32); tcg_gen_trunc_i64_i32(ret, t); tcg_temp_free_i64(t); - dc->t32[dc->n_t32++] = ret; - assert(dc->n_t32 <= ARRAY_SIZE(dc->t32)); - return ret; } #endif @@ -265,14 +278,6 @@ static inline void gen_address_mask(DisasContext *dc, TCGv addr) #endif } -static inline TCGv get_temp_tl(DisasContext *dc) -{ - TCGv t; - assert(dc->n_ttl < ARRAY_SIZE(dc->ttl)); - dc->ttl[dc->n_ttl++] = t = tcg_temp_new(); - return t; -} - static inline TCGv gen_load_gpr(DisasContext *dc, int reg) { if (reg == 0 || reg >= 8) {