From patchwork Tue Oct 9 22:04:26 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 190483 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 416482C00A8 for ; Wed, 10 Oct 2012 09:06:40 +1100 (EST) Received: from localhost ([::1]:52941 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TLhwk-00080f-8o for incoming@patchwork.ozlabs.org; Tue, 09 Oct 2012 18:06:38 -0400 Received: from eggs.gnu.org ([208.118.235.92]:48075) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TLhv1-00058U-Bc for qemu-devel@nongnu.org; Tue, 09 Oct 2012 18:04:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TLhv0-0001oP-61 for qemu-devel@nongnu.org; Tue, 09 Oct 2012 18:04:51 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:34860) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TLhv0-0001fh-0n for qemu-devel@nongnu.org; Tue, 09 Oct 2012 18:04:50 -0400 Received: by mail-pb0-f45.google.com with SMTP id rp2so5751708pbb.4 for ; Tue, 09 Oct 2012 15:04:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=Wau7wVRKoMd+sLelueKrt/5OP2igbeRloIP0RAYpzfQ=; b=HhwzOgHX5fgLfW0l7FD4Q/UW0G87afbKuwVZNBDQg4lqHpvQM8qpP9MJQEuX5kZZRN hpEAOEI4KLg9U6a8lirv7Qsa7OFuT8XndCu8Gtic5C+5n/kq8iq5DhLNG3/5lQFjd5I4 mNPjbf4yx2BiRFRquTD+u3ftaOpKZm6UC6Dxngb6Ie+eH24R1ZiDuw2iBTAKeoyDeyqZ mZu//o/qBDlVNz7KcJviBGSwQDy7XZhEgDOfwm7UhUSKSNMKX4F+Vyy2fqSTjhv4fVno wNQKVZcYqPrqbkERL7AoPlLAKbUnnBZ7JHUPKhws8YcKPu138SDTZ/Xmj7KX8dkcucqy /RkQ== Received: by 10.68.232.70 with SMTP id tm6mr67580596pbc.104.1349820289717; Tue, 09 Oct 2012 15:04:49 -0700 (PDT) Received: from anchor.twiddle.home.com (50-194-63-110-static.hfc.comcastbusiness.net. [50.194.63.110]) by mx.google.com with ESMTPS id tt6sm12970604pbc.51.2012.10.09.15.04.48 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 09 Oct 2012 15:04:49 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 9 Oct 2012 15:04:26 -0700 Message-Id: <1349820267-26320-20-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.11.4 In-Reply-To: <1349820267-26320-1-git-send-email-rth@twiddle.net> References: <1349820267-26320-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.160.45 Cc: Blue Swirl Subject: [Qemu-devel] [PATCH 19/20] target-sparc: Make cpu_dst local to OP=2 insns X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org And initialize it such that it (may) write directly to rd. Signed-off-by: Richard Henderson --- target-sparc/translate.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 5b7e82b..8559cc3 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -48,7 +48,7 @@ static TCGv cpu_y; #ifndef CONFIG_USER_ONLY static TCGv cpu_tbr; #endif -static TCGv cpu_cond, cpu_dst; +static TCGv cpu_cond; #ifdef TARGET_SPARC64 static TCGv_i32 cpu_xcc, cpu_asi, cpu_fprs; static TCGv cpu_gsr; @@ -2511,7 +2511,6 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn) } opc = GET_FIELD(insn, 0, 1); - rd = GET_FIELD(insn, 2, 6); switch (opc) { @@ -2620,6 +2619,8 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn) case 2: /* FPU & Logical Operations */ { unsigned int xop = GET_FIELD(insn, 7, 12); + TCGv cpu_dst = gen_dest_gpr(dc, rd); + if (xop == 0x3a) { /* generate trap */ int cond = GET_FIELD(insn, 3, 6); TCGv_i32 trap; @@ -5258,12 +5259,10 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb, insn = cpu_ldl_code(env, dc->pc); cpu_tmp0 = tcg_temp_new(); - cpu_dst = tcg_temp_new(); disas_sparc_insn(dc, insn); num_insns++; - tcg_temp_free(cpu_dst); tcg_temp_free(cpu_tmp0); if (dc->is_br)