[09/14] target-mips: don't use local temps for store conditional

Submitted by Aurelien Jarno on Oct. 9, 2012, 8:27 p.m.

Details

Message ID 1349814458-21739-10-git-send-email-aurelien@aurel32.net
State New
Headers show

Commit Message

Aurelien Jarno Oct. 9, 2012, 8:27 p.m.
Store conditional operations only need local temps in user mode. Fix
the code to use temp local only in user mode, this spares two memory
stores in system mode.

At the same time remove a wrong a wrong copied & pasted comment,
store operations don't have a register destination.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 target-mips/translate.c |   11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

Comments

Richard Henderson Oct. 10, 2012, 8:31 p.m.
On 10/09/2012 01:27 PM, Aurelien Jarno wrote:
> Store conditional operations only need local temps in user mode. Fix
> the code to use temp local only in user mode, this spares two memory
> stores in system mode.
> 
> At the same time remove a wrong a wrong copied & pasted comment,
> store operations don't have a register destination.
> 
> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

Reviewed-by: Richard Henderson <rth@twiddle.net>


r~

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diff --git a/target-mips/translate.c b/target-mips/translate.c
index 8a7462b..b6eb46a 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -1375,13 +1375,14 @@  static void gen_st_cond (DisasContext *ctx, uint32_t opc, int rt,
     const char *opn = "st_cond";
     TCGv t0, t1;
 
+#ifdef CONFIG_USER_ONLY
     t0 = tcg_temp_local_new();
-
-    gen_base_offset_addr(ctx, t0, base, offset);
-    /* Don't do NOP if destination is zero: we must perform the actual
-       memory access. */
-
     t1 = tcg_temp_local_new();
+#else
+    t0 = tcg_temp_new();
+    t1 = tcg_temp_new();
+#endif
+    gen_base_offset_addr(ctx, t0, base, offset);
     gen_load_gpr(t1, rt);
     switch (opc) {
 #if defined(TARGET_MIPS64)