From patchwork Tue Oct 9 03:30:31 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [v2,10/21] pcie: pass pcie window size to pcie_host_mmcfg_update() From: Jason Baron X-Patchwork-Id: 190209 Message-Id: <618a00cbfe7f3d7eea937c4adeeaea39f6fe7cdc.1349749915.git.jbaron@redhat.com> To: qemu-devel@nongnu.org Cc: aliguori@us.ibm.com, juzhang@redhat.com, mst@redhat.com, jan.kiszka@siemens.com, armbru@redhat.com, agraf@suse.de, blauwirbel@gmail.com, yamahata@valinux.co.jp, alex.williamson@redhat.com, kevin@koconnor.net, avi@redhat.com, mkletzan@redhat.com, pbonzini@redhat.com, lcapitulino@redhat.com, afaerber@suse.de, kraxel@redhat.com Date: Mon, 8 Oct 2012 23:30:31 -0400 From: Jason Baron This allows q35 to pass/set the size of the pcie window in its update routine. Signed-off-by: Jason Baron Reviewed-by: Paolo Bonzini --- hw/pcie_host.c | 21 ++++++++++++--------- hw/pcie_host.h | 8 +++++--- 2 files changed, 17 insertions(+), 12 deletions(-) diff --git a/hw/pcie_host.c b/hw/pcie_host.c index 28bbe72..e2fd276 100644 --- a/hw/pcie_host.c +++ b/hw/pcie_host.c @@ -107,14 +107,9 @@ static const MemoryRegionOps pcie_mmcfg_ops = { /* pcie_host::base_addr == PCIE_BASE_ADDR_UNMAPPED when it isn't mapped. */ #define PCIE_BASE_ADDR_UNMAPPED ((target_phys_addr_t)-1ULL) -int pcie_host_init(PCIExpressHost *e, uint32_t size) +int pcie_host_init(PCIExpressHost *e) { - assert(!(size & (size - 1))); /* power of 2 */ - assert(size >= PCIE_MMCFG_SIZE_MIN); - assert(size <= PCIE_MMCFG_SIZE_MAX); e->base_addr = PCIE_BASE_ADDR_UNMAPPED; - e->size = size; - memory_region_init_io(&e->mmio, &pcie_mmcfg_ops, e, "pcie-mmcfg", e->size); return 0; } @@ -123,22 +118,30 @@ void pcie_host_mmcfg_unmap(PCIExpressHost *e) { if (e->base_addr != PCIE_BASE_ADDR_UNMAPPED) { memory_region_del_subregion(get_system_memory(), &e->mmio); + memory_region_destroy(&e->mmio); e->base_addr = PCIE_BASE_ADDR_UNMAPPED; } } -void pcie_host_mmcfg_map(PCIExpressHost *e, target_phys_addr_t addr) +void pcie_host_mmcfg_map(PCIExpressHost *e, target_phys_addr_t addr, + uint32_t size) { + assert(!(size & (size - 1))); /* power of 2 */ + assert(size >= PCIE_MMCFG_SIZE_MIN); + assert(size <= PCIE_MMCFG_SIZE_MAX); + e->size = size; + memory_region_init_io(&e->mmio, &pcie_mmcfg_ops, e, "pcie-mmcfg", e->size); e->base_addr = addr; memory_region_add_subregion(get_system_memory(), e->base_addr, &e->mmio); } void pcie_host_mmcfg_update(PCIExpressHost *e, int enable, - target_phys_addr_t addr) + target_phys_addr_t addr, + uint32_t size) { pcie_host_mmcfg_unmap(e); if (enable) { - pcie_host_mmcfg_map(e, addr); + pcie_host_mmcfg_map(e, addr, size); } } diff --git a/hw/pcie_host.h b/hw/pcie_host.h index 0074508..2faa54e 100644 --- a/hw/pcie_host.h +++ b/hw/pcie_host.h @@ -39,11 +39,13 @@ struct PCIExpressHost { MemoryRegion mmio; }; -int pcie_host_init(PCIExpressHost *e, uint32_t size); +int pcie_host_init(PCIExpressHost *e); void pcie_host_mmcfg_unmap(PCIExpressHost *e); -void pcie_host_mmcfg_map(PCIExpressHost *e, target_phys_addr_t addr); +void pcie_host_mmcfg_map(PCIExpressHost *e, target_phys_addr_t addr, + uint32_t size); void pcie_host_mmcfg_update(PCIExpressHost *e, int enable, - target_phys_addr_t addr); + target_phys_addr_t addr, + uint32_t size); #endif /* PCIE_HOST_H */