From patchwork Tue Oct 9 03:03:18 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [1/7] PCI: rework pci_enable_ari for support disable ari forwarding Date: Mon, 08 Oct 2012 17:03:18 -0000 From: Yijing Wang X-Patchwork-Id: 190171 Message-Id: <1349751804-7476-2-git-send-email-wangyijing@huawei.com> To: Bjorn Helgaas Cc: , Hanjun Guo , , Yinghai Lu , Yijing Wang pci_enable_ari will be called if an ARI pci device found, set its bridge ARI Forwarding Enable bit in Device Control 2 Register. But the bridge ARI Forwarding Enable bit will never be cleared when an ARI device hot removed. As PCIe Spec 2.0(6.13/441) recommends: "Following a hot-plug event below a Downstream Port, it is strongly recommended that software Clear the ARI Forwarding Enable bit in the Downstream Port until software determines that a newly added component is in fact an ARI Device" So, this patch rework pci_enable_ari for support disable ari forwarding when a pci device was hot removed. Signed-off-by: Yijing Wang --- drivers/pci/pci.c | 16 +++++++++++----- drivers/pci/pci.h | 2 +- drivers/pci/probe.c | 2 +- 3 files changed, 13 insertions(+), 7 deletions(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 5485883..27f57d7 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -2010,10 +2010,10 @@ void pci_free_cap_save_buffers(struct pci_dev *dev) } /** - * pci_enable_ari - enable ARI forwarding if hardware support it + * pci_configure_ari - enable or disable ARI forwarding if hardware support it * @dev: the PCI device */ -void pci_enable_ari(struct pci_dev *dev) +void pci_configure_ari(struct pci_dev *dev, bool enable) { u32 cap; struct pci_dev *bridge; @@ -2031,10 +2031,16 @@ void pci_enable_ari(struct pci_dev *dev) pcie_capability_read_dword(bridge, PCI_EXP_DEVCAP2, &cap); if (!(cap & PCI_EXP_DEVCAP2_ARI)) return; - - pcie_capability_set_word(bridge, PCI_EXP_DEVCTL2, PCI_EXP_DEVCTL2_ARI); - bridge->ari_enabled = 1; + + if (enable) { + pcie_capability_set_word(bridge, PCI_EXP_DEVCTL2, PCI_EXP_DEVCTL2_ARI); + bridge->ari_enabled = 1; + } else { + pcie_capability_clear_word(bridge, PCI_EXP_DEVCTL2, PCI_EXP_DEVCTL2_ARI); + bridge->ari_enabled = 0; + } } +EXPORT_SYMBOL(pci_configure_ari); /** * pci_enable_ido - enable ID-based Ordering on a device diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index bacbcba..3eb05d4 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -211,7 +211,7 @@ extern int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type, extern int pci_resource_bar(struct pci_dev *dev, int resno, enum pci_bar_type *type); extern int pci_bus_add_child(struct pci_bus *bus); -extern void pci_enable_ari(struct pci_dev *dev); +extern void pci_configure_ari(struct pci_dev *dev, bool enable); /** * pci_ari_enabled - query ARI forwarding status * @bus: the PCI bus diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index ec909af..9d6deb6 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -1282,7 +1282,7 @@ static void pci_init_capabilities(struct pci_dev *dev) pci_vpd_pci22_init(dev); /* Alternative Routing-ID Forwarding */ - pci_enable_ari(dev); + pci_configure_ari(dev, true); /* Single Root I/O Virtualization */ pci_iov_init(dev);