@@ -211,4 +211,11 @@
compatible = "nvidia,tegra20-nand";
reg = <0x70008000 0x100>;
};
+
+ pwm: pwm@7000a000 {
+ compatible = "nvidia,tegra20-pwm";
+ reg = <0x7000a000 0x100>;
+ #pwm-cells = <2>;
+ };
+
};
new file mode 100644
@@ -0,0 +1,18 @@
+Tegra SoC PWFM controller
+
+Required properties:
+- compatible: should be one of:
+ - "nvidia,tegra20-pwm"
+ - "nvidia,tegra30-pwm"
+- reg: physical base address and length of the controller's registers
+- #pwm-cells: On Tegra the number of cells used to specify a PWM is 2. The
+ first cell specifies the per-chip index of the PWM to use and the second
+ cell is the period in nanoseconds.
+
+Example:
+
+ pwm: pwm@7000a000 {
+ compatible = "nvidia,tegra20-pwm";
+ reg = <0x7000a000 0x100>;
+ #pwm-cells = <2>;
+ };
This binding will apparently soon be in linux-next. Bring it in now since we need to do something, and may as well try to target what Linux will have. Signed-off-by: Simon Glass <sjg@chromium.org> --- Changes in v5: - Update Tegra PWM binding s/duty cycle/period/ Changes in v3: - Add new commit for pwm binding and node arch/arm/dts/tegra20.dtsi | 7 +++++++ doc/device-tree-bindings/pwm/tegra20-pwm.txt | 18 ++++++++++++++++++ 2 files changed, 25 insertions(+), 0 deletions(-) create mode 100644 doc/device-tree-bindings/pwm/tegra20-pwm.txt